LTC1566-1
1
sn15661 1566-1fs
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
The LTC
1566-1 is a 7th order continuous time lowpass
filter with 12dB of passband gain. The selectivity, linearity
and dynamic range makes the LTC1566-1 suitable for
filtering in data communications or data acquisition
systems. The filter attenuation is 40dB at 1.5
f
CUTOFF
and
at least 60dB for frequencies above 10MHz.
The LTC1566-1 has an input referred noise of 62
V
RMS
in
a 2MHz bandwidth. In receiver applications where the
signal levels are small, the filter features 71dB of spurious
free dynamic range.
With 5% accuracy of the cutoff frequency, the LTC1566-1
can be used in applications requiring pairs of matched
filters, such as transceiver I and Q channels.
The differential inputs and outputs provide a simple inter-
face for wireless systems. The high impedance inputs are
easily coupled to differential demodulators or D/A con-
verters. The output DC common mode voltage and output
DC offset voltage are adjustable so the signal path can be
optimized for driving an A/D converter or differential
modulator.
Other cutoff frequencies and single-ended I/O can be
provided upon request. Please contact LTC Marketing.
s
WCDMA Basestations
s
Communication Filters
s
Antialiasing Filters
s
Smoothing or Reconstruction Filters
s
Matched Filter Pairs
s
Replacement for LC Filters
, LTC and LT are registered trademarks of Linear Technology Corporation.
s
7th Order, 2.3MHz Lowpass Filter in an SO-8
s
62
V
RMS
Input Referred Noise
s
Operates on a Single 5V or a
5V Supply
s
Differential Inputs and Outputs
s
Low Offset (3mV typical, 10mV
MAX
)
s
Adjustable Output Common Mode Voltage
s
40dB Attenuation at 1.5
f
CUTOFF
s
Requires No External Components
Low Noise 2.3MHz
Continuous Time Lowpass Filter
Frequency Response
Single 5V Supply, Differential
2.3MHz Lowpass Filter
LTC1566-1
1
2
3
4
OUT
+
OUT
V
+
V
ODC
IN
+
IN
GND
V
8
7
6
5
V
IN
V
OUT
+
+
5V
10k
10k
0.1
F
0.1
F
1566-1 TA01
FREQUENCY (MHz)
0.1
GAIN (dB)
20
10
0
10
20
30
40
50
60
70
80
1000
900
800
700
600
500
400
300
200
100
0
1.0
10
100
1566-1 G01
DELAY (ns)
DELAY
GAIN
LTC1566-1
2
sn15661 1566-1fs
Total Supply Voltage ................................................ 11V
Power Dissipation .............................................. 500mW
Operating Temperature Range
LTC1566-1CS .......................................... 0
C to 70
C
LTC1566-1IS ...................................... 40
C to 85
C
Storage Temperature Range ................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
ORDER PART
NUMBER
T
JMAX
= 125
C,
JA
= 80
C/W
(Note 4)
Consult factory for parts specified with wider operating temperature ranges.
LTC1566-1CS8
LTC1566-1IS8
ABSOLUTE AXI U
RATI GS
W
W
W
U
PACKAGE/ORDER I FOR ATIO
U
U
W
(Note 1)
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
S
= 5V (V
+
= 5V, V
= 0V), R
LOAD
= 10k from each output to AC ground,
Pin 5 connected to Pin 3, Pin 3 biased to mid supply, unless otherwise specified.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Filter Gain, V
S
= 5V
V
IN
= 0.25V
P-P
f
IN
= 20kHz to 100kHz
q
11.8
12.1
12.3
dB
f
IN
= 1.8MHz (Gain Relative to 100kHz)
q
0.35
0
0.5
dB
f
IN
= 2MHz (Gain Relative to 100kHz)
q
0.85
0.1
0.5
dB
f
IN
= 2.3MHz (Gain Relative to 100kHz)
q
7.5
3
0.95
dB
f
IN
= 3MHz (Gain Relative to 100kHz)
q
22
17
dB
f
IN
= 5MHz (Gain Relative to 100kHz)
42
dB
f
IN
= 10MHz (Gain Relative to 100kHz)
62
dB
Filter Phase, V
S
=
5V
V
IN
= 0.25V
P-P
f
IN
= 900kHz
q
160
150
135
deg
f
IN
= 1.8MHz
q
320
285
265
deg
Phase Linearity, V
S
=
5V
Ratio of phases: 1.8MHz/900kHz
q
1.9
1.95
2
Filter Gain, V
S
=
5V
V
IN
= 0.25V
P-P
f
IN
= 20kHz to 100kHz
q
11.9
12.1
12.3
dB
f
IN
= 900kHz (Gain Relative to 100kHz)
q
0.2
0
0.2
dB
f
IN
= 1.8MHz (Gain Relative to 100kHz)
q
0.3
0.1
0.7
dB
f
IN
= 2MHz (Gain Relative to 100kHz)
q
0.55
0.1
0.75
dB
f
IN
= 2.3MHz (Gain Relative to 100kHz)
q
6
2
0.3
dB
f
IN
= 3MHz (Gain Relative to 100kHz)
q
20
16
dB
f
IN
= 5MHz (Gain Relative to 100kHz)
61
dB
f
IN
= 10MHz (Gain Relative to 100kHz)
61
dB
Input Referred Wideband Noise
Noise BW = 50kHz to 2MHz
62
V
RMS
THD
f
IN
= 100kHz, V
OUT
= 2V
P-P
(Note 2)
80
dB
Filter Differential DC Swing
Maximum Difference Between Pins 7 and Pin 8
V
S
= 5V
q
1.3
1.7
V
P
with Pin 5, Pin 3 Biased to Mid Supply
V
S
=
5V
q
2.7
2.9
V
P
Input Bias Current
q
300
600
nA
Input Offset Current
10
nA
Input Resistance
Common Mode, V
IN
= 1.5V to 3.5V
70
M
Differential
140
M
Input Capacitance
2
pF
Output DC Offset
V
S
= 5V
3
10
mV
(Notes 3, 5)
V
S
=
5V
3
10
mV
TOP VIEW
OUT
+
OUT
V
+
V
ODC
IN
+
IN
GND
V
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
S8 PART MARKING
15661
15661I
LTC1566-1
3
sn15661 1566-1fs
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output DC Offset Drift
V
S
= 5V
160
V/
C
V
S
=
5V
160
V/
C
Output DC Common Mode Voltage
V
S
= 5V, V
S
=
2.5V
80
mV
Power Supply Current
V
S
= 5V
q
24
31
mA
V
S
=
5V
q
25
33
mA
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
S
= 5V (V
+
= 5V, V
= 0V), R
LOAD
= 10k from each output to AC ground,
and Pin 5 connected to Pin 3 unless otherwise specified
Note 4: Thermal resistance varies depending upon the amount of PC board
metal attached to the device.
JA
is specified for a 3.8 square inch test
board covered with 2oz copper on both sides.
Note 5: Output DC offset measurements are performed by automatic test
equipment approximately 0.5 seconds after application of power.
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
FREQUENCY (Hz)
10k
GAIN (dB)
12.4
12.0
11.6
11.2
10.8
10.4
100k
1M
5M
1566-1 G02
1
0
DELAY (
s)
T
A
= 25
C
GAIN
5V
GAIN 5V
DELAY
FREQUENCY (Hz)
10k
GAIN (dB)
12.4
12.0
11.6
11.2
10.8
10.4
100k
1M
5M
1566-1 G03
T
A
= 85
C
T
A
= 40
C
T
A
= 25
C
V
IN
(dbm)
25
40
20
0
20
40
60
80
100
10
0
1566-1
G07
20
15
5
5
10
V
OUT
(dBm)
500kHz
1MHz
1.5MHz
NOISE FLOOR
1dB COMPRESSION
Passband Gain and Delay
vs Frequency
Passband Gain
vs Frequency and Temperature
Stopband Gain vs Frequency
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Input and output voltages expressed as peak-to-peak numbers are
assumed to be fully differential.
Note 3: Output DC offset is measured between Pin 8 and Pin 7 with Pin 1,
Pin 2 and Pin 5 connected to Pin 3. Pin 3 biased to mid supply.
Stopband Gain vs Frequency
and Temperature
450k/2M Intermodulation, V
S
= 5V
500kHz Distortion
vs Input Level, V
S
= 5V
FREQUENCY (MHz)
3
GAIN (dB)
10
20
30
40
50
60
4
7
8
9
5
10
6
1566-1 G04
5V
5V
T
A
= 25
C
FREQUENCY (MHz)
3
GAIN (dB)
10
20
30
40
50
60
4
7
8
9
5
10
6
1566-1 G05
T
A
= 25
C
T
A
= 40, 85
C
V
S
= 5V
V
X
(dBm)
25
V
OUT
(dBm)
20
0
20
40
60
80
100
20
15
10
5
1566-1 G06
0
450k
1.55M
2M
2.45M
3.55M
NOISE FLOOR
1.1M
OIP
3
= 38dBm
OIP
2
= 74dBm
V
IN
= V
X
COS(2
450kHz) + V
X
COS (2
2MHz)
LTC1566-1
4
sn15661 1566-1fs
U
U
U
PI FU CTIO S
IN
+
, IN
(Pins 1, 2): Input Pins. Signals can be applied to
either or both input pins. The DC gain from differential
inputs (Pin 1 to Pin 2) to the differential outputs (Pin 8 to
Pin 7) is 4V/V. The input range is described in the Applica-
tions Information section.
GND (Pin 3): Ground. The ground pin is the reference
voltage for the filter. This is a high impedance input, which
requires an external biasing network. Biasing GND to
one-half the total power supply voltage of the filter maxi-
mizes the dynamic range. For single supply operation the
ground pin should be bypassed with a quality 0.1
F
ceramic capacitor to Pin 4. For dual supply operation,
connect Pin 3 to a high quality DC ground. A ground plane
should be used. A poor ground will increase noise and
distortion. Pin 3 also serves as the DC reference voltage for
Pin 7.
V
, V
+
(Pins 4, 6): Power Supply Pins. For a single 5V
supply (Pin 4 grounded) a quality 0.1
F ceramic bypass
capacitor is required from the positive supply pin (Pin 6)
to the negative supply pin (Pin 4). The bypass should be
as close as possible to the IC. For dual supply applications
(Pin 3 is grounded), bypass Pin 6 to Pin 3 and Pin 4 to
Pin 3 with a quality 0.1
F ceramic capacitor.
V
ODC
(Pin 5): Output DC Offset. Pin 5 is the DC reference
voltage for Pin 8. By applying a DC offset between Pin 3
and Pin 5, a DC offset will be added to the differential signal
between Pin 7 and Pin 8. Like the GND pin, the V
ODC
pin is
a high impedance which requires no bias current. Care
should be taken when biasing Pin 5 since noise between
Pin 3 and Pin 5 will appear at the filter output unattenuated.
The frequency response of Pin 5 is described in the
Applications Information section.
OUT
, OUT
+
(Pins 7, 8): Output Pins. Pins 7 and 8 are the
filter differential outputs. Each pin can drive 1k
or 300pF
loads. The DC reference voltage of Pin 8 is the same as the
voltage at Pin 5. The DC reference voltage of Pin 7 is the
same as the voltage at Pin 3.
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
TEMPERATURE (
C)
50
SUPPLY CURRENT (mA)
70
1566-1 G08
10
30
23
22
21
30
10
50
90
V
S
=
5V
V
S
= 5V
FREQUENCY (Hz)
CMRR (dB)
90
80
70
60
50
40
30
10k
100k
1M
10M
1566-1 G09
1k
V
IN
= 1V
P-P
V
S
= 5V
T
A
= 25
C
FREQUENCY (Hz)
PSRR (dB)
70
60
50
40
30
20
10k
100k
1M
10M
1566-1 G10
1k
V
IN
= 0.2V
P-P
V
S
= 5V
T
A
= 25
C
Supply Current vs Temperature
Common Mode Rejection Ratio
Power Supply Rejection Ratio
LTC1566-1
5
sn15661 1566-1fs
BLOCK DIAGRA
W
APPLICATIO S I FOR ATIO
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Interfacing to the LTC1566-1
The difference between the voltages at Pin 1 and Pin 2 is
the "differential input voltage." The average of the voltages
at Pin 1 and Pin 2 is the "common mode input voltage."
The difference between the voltages at Pin 7 and Pin 8 is
the "differential output voltage." The average of the volt-
ages at Pin 7 and Pin 8 is the "common mode output
voltage." The input and output common mode voltages
are independent. The input common mode voltage is set
by the signal source, if DC coupled, or by an external
Figure 1
biasing network, if AC coupled (Figures 1 and 2). The
output can also be AC coupled.
The output common mode voltage is equal to the voltage
of Pin 3, the GND pin, whenever Pin 5 is shorted to Pin 3.
In configurations where Pin 5, the V
ODC
pin, is not shorted
to Pin 3, the output common mode voltage is equal to the
average of the voltages at Pin 3 and Pin 5. The operation
of Pin 5 is described in the paragraph "Output DC Offset
Control". Pin 3 is a high impedance pin and must be biased
externally with an external resistor network or reference
voltage.
+
+
+
+
7th ORDER
FILTER NETWORK
WITH 12dB GAIN
8
1
2
3
4
7
6
5
1
1
1
1
UNITY GAIN OUTPUT
BUFFERS WITH DC
REFERENCE
ADJUSTMENT
INPUT AMPLIFIERS
WITH COMMON MODE
TRANSLATION CIRCUIT
IN
+
IN
GND
V
OUT
+
OUT
V
+
V
ODC
R
R
1566-1 BD
+
Figure 2
1
2
3
4
8
7
6
5
V
IN
+
V
IN
V
OUT
+
V
OUT
5V
10k
10k
0.1
F
0.1
F
1566-1 F01
+
+
DC COUPLED INPUT
V
IN
(COMMON MODE) =
V
IN
+ + V
IN
V
OUT
(COMMON MODE) =
V
OUT
+ + V
OUT
= V
+
2
2
2
LTC1566-1
OUT
+
OUT
V
+
V
ODC
IN
+
IN
GND
V
LTC1566-1
1
2
3
4
OUT
+
OUT
V
+
V
ODC
IN
+
IN
GND
V
8
7
6
5
V
IN
+
V
IN
V
OUT
+
V
OUT
5V
10k
10k
0.1
F
0.1
F
1566-1 F02
+
+
100k
100k
AC COUPLED INPUT
V
IN
(COMMON MODE) = V
OUT
(COMMON MODE) =
V+
2
0.1
F
0.1
F
LTC1566-1
6
sn15661 1566-1fs
a common mode voltage that is equal to one-half of the total
supply voltage. Figure 5 illustrates the THD versus output
common mode voltage for a 0.5V
P-P
/2.0V
P-P
differential
input/output voltage and a common mode input voltage
that is equal to one-half the total supply voltage.
Output DC Offset Control
A unique feature of the LTC1566-1 is the ability to introduce
a differential offset voltage at the output of the filter. As
seen in the "Block Diagram", if a DC voltage is applied to Pin
5 with respect to Pin 3, the same voltage will be added to
the differential voltage seen between Pins 8 and 7.
The output DC offset control pin can be used for sideband
suppression in differential modulators, calibration of A/D
converters, or simple signal summation. Since the voltage
summing occurs at the output of the filter, Pin 5 acts as a
unfiltered input. The response from Pin 5 to Pin 8 Pin 7
with Pins 1,2 and 3 grounded is shown in Figure 7. The
range of voltages that can be applied to Pin 5 is shown in
Figure 6 where THD is plotted versus output offset. Pin 3 is
biased to mid supply.
Output Drive
Pins 7 and 8 can drive a 1k
or 300pF load connected to
AC ground with a
0.5V signal (corresponding to a 2V
P-P
differential signal). For differential loads (loads connected
across Pins 7 and 8) the outputs can produce a 2V
P-P
differential signal across 2k
or 150pF. For smaller signal
amplitudes the outputs can drive correspondingly larger
loads.
5 4
2
0
2
4
30
40
50
60
70
80
90
3
1
1
3
1566-1 F03
5
INPUT COMMON MODE VOLTAGE (V)
THD (dB)
V
S
= 5V
V
S
=
5V
DIFFERENTIAL OUTPUT (V
P-P
)
0.5
THD, SNR (dB)
30
40
50
60
70
80
90
2.0
3.0
1566-1 F04
1.0
1.5
2.5
3.5
4.0
V
S
= 5V
V
S
=
5V
S/N
OUTPUT COMMON MODE VOLTAGE (V)
4
THD (dB)
30
40
50
60
70
80
90
1
2
1566-1 F05
3
2
1
0
3
4
V
S
= 5V
V
S
=
5V
Figure 3
Figure 4
Figure 5
APPLICATIO S I FOR ATIO
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Input Common Mode and Differential Voltage Range
The range of voltage each input can support while operat-
ing in its linear region is typically 0.8V to 3.7V for a single
5V supply and 4.2V to 3.2V for a
5V supply. Therefore,
the filter can accept a variety of common mode input
voltages. Figure 3 shows the total harmonic distortion of
the filter versus input common mode voltage with a
2V
P-P
differential output signal.
Figure 4 shows the total harmonic distortion and signal to
noise ratio versus differential output voltage level for both
a single 5V and a
5V supply. The common mode voltage
of the input signal is one-half the total power supply voltage
of the filter. The spurious free dynamic range (SFDR), the
level where the THD and S/N ratio are equal, is 72dB.
For best performance, the inputs should be driven differen-
tially. For single-ended signals, connect the unused input
to Pin 3 or a common mode reference.
The filter DC differential swings listed in the "Electrical
Characteristics" are measured with input differential volt-
ages of 0.9V
P-P
and 1.5V
P-P
for 5V and
5V supplies
respectively. Ideally the corresponding output levels would
be 3.6V
P-P
and 6V
P-P
. As seen in Figure 4, these levels are
above the range of linear operation. Input signals larger
than 0.9V
P-P
/1.5V
P-P
will result in phase inversion and
should be avoided.
Output Common Mode and Differential Voltage Range
The output is a fully differential signal with a common
mode level equal to the voltage at Pin 3 when Pin 5 is
shorted to Pin 3. The best performance is achieved using
LTC1566-1
7
sn15661 1566-1fs
Noise
The wideband noise of the filter is the RMS value of the
output noise power spectral density integrated over a
given bandwidth. Since the filter has a DC gain of 4, the
wideband noise is divided by 4 when referred to the input.
The input referred wideband noise is used to determine the
signal-to-noise ratio at a given distortion level and hence
the spurious free dynamic range. Most of the noise is
concentrated in the filter passband and cannot be removed
with post filtering (Table 1). The noise is mostly indepen-
dent of supply level (Table 2).
Table 1. Input Referred Wideband Noise vs Bandwidth,
Single 5V Supply
BANDWIDTH
TOTAL INTEGRATED NOISE
50kHz to 2MHz
62
V
RMS
50kHz to 4MHz
76
V
RMS
Table 2. Input Referred Wideband Noise vs Supply Voltage,
50kHz to 2MHz
BANDWIDTH
TOTAL INTEGRATED NOISE
V
S
= 5V
62
V
RMS
V
S
=
5V
63
V
RMS
PIN 5 DC VOLTAGE (V)
THD (dB)
30
40
50
60
70
80
90
2
2
3
1566-1 F06
3
1
0
1
4
V
S
= 5V
V
S
=
5V
FREQUENCY (Hz)
10k
2.5
0
2.5
100k
1M
10M
1566-1 F07
GAIN
PIN 8 PIN 7
(dB)
PIN 5
V
S
= 5V
V
S
=
5V
V
IN
= 200mV
P-P
Figure 6
Figure 7
APPLICATIO S I FOR ATIO
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U
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PACKAGE DESCRIPTIO
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.016 0.050
(0.406 1.270)
0.010 0.020
(0.254 0.508)
45
0
8
TYP
0.008 0.010
(0.203 0.254)
SO8 1298
0.053 0.069
(1.346 1.752)
0.014 0.019
(0.355 0.483)
TYP
0.004 0.010
(0.101 0.254)
0.050
(1.270)
BSC
1
2
3
4
0.150 0.157**
(3.810 3.988)
8
7
6
5
0.189 0.197*
(4.801 5.004)
0.228 0.244
(5.791 6.197)
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1566-1
8
sn15661 1566-1fs
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 2001
LT/TP 0101 4K PRINTED IN USA
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1560-1
1MHz/500kHz Continuous Time, Lowpass Elliptic Filter
f
CUTTOFF
= 500kHz or 1MHz
LTC1562/LTC1562-2
Universal 8th Order Active RC Filters
f
CUTOFF(MAX)
= 150kHz (LTC1562),
f
CUTOFF(MAX)
= 300kHz (LTC1562-2)
LTC1563-2/LTC1563-3 4th Order Active RC Lowpass Filters
f
CUTOFF(MAX)
= 256kHz
LTC1565-31
650kHz Continuous Time, Linear Phase Lowpass Filter
7th Order, Differential Inputs and Outputs
LTC1569-6/LTC1569-7 Self Clocked, 10th Order Linear Phase Lowpass Filters
f
CLK
/f
CUTOFF
= 64/1, f
CUTOFF(MAX)
= 75kHz (LTC1569-6),
f
CLK
/f
CUTOFF
= 32/1, f
CUTOFF(MAX)
= 300kHz (LTC1569-7)
Wideband CDMA Base Station Receiver Block Diagram
1566-1 TA01a
IN
+
IN
GND
V
8
7
6
5
OUT
+
OUT
V
+
V
ODC
1
2
3
4
LTC1566-1
50
50
10k
10k
1k
5k
5k
5k
5k
0.1
F
0.1
F
0.1
F
0
V
IN
V
OUT
MINICIRCUITS
SPLITTER
ZSCJ-2-2
+
15V
15V
LT1363
2.5V
2.5V
S2
S1
CLOSE SWITCH S1
AND APPLY A VOLTAGE
TO ALTER THE OUTPUT
COMMON MODE.
CLOSE SWITCH S2
AND APPLY A VOLTAGE
TO ADD A DC OFFSET.
CHANGE THE POWER SUPPLY VOLTAGES TO ALTER THE INPUT COMMON MODE VOLTAGE.
FOR EXAMPLE, V
S
= 3, 2 MAKES THE EFFECTIVE INPUT COMMON MODE 0.5V BELOW MID SUPPLY.
1566-1 TA02a
IN
+
IN
GND
V
8
7
6
5
OUT
+
OUT
V
+
V
ODC
1
2
3
4
LTC1566-1
0.1
F
0.1
F
V
OUT
+
10k
10k
2k
2k
5V
5V
5V
5Mbps
DATA
15k
LTC1566-1
LPF
ADC
ADC
0
/90
RF/IF
SECTION
LO
DSP
I
Q
0
90
1566-1 TA03
LTC1566-1
LPF
A Fixture for Evaluation with Single-Ended, Ground Referenced Test Equipment
Simple Pulse Shaping Circuit for Single 5V Operation, 5Mbps 2 Level Data
TYPICAL APPLICATIO S
U
1566-1 TA02b
50ns/DIV
0
300mV/
DIV
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