LTC1647-1/LTC1647-2/LTC1647-3
1
, LTC and LT are registered trademarks of Linear Technology Corporation.
Dual Hot Swap Controllers
The LTC
1647-1/LTC1647-2/LTC1647-3 are dual Hot
Swap
TM
controllers that permit a board to be safely in-
serted and removed from a live backplane.
Using external N-channel MOSFETs, the board supply
voltages can be ramped up at a programmable rate. A high
side switch driver controls the MOSFET gates for supply
voltages ranging from 2.7V to 16.5V. A programmable
electronic circuit breaker protects against overloads and
shorts. The ON pins are used to control board power or
clear a fault.
The LTC1647-1 is a dual Hot Swap controller with a
common V
CC
pin, separate ON pins and is available in an
SO-8 package. The LTC1647-2 is similar to the LTC1647-1
but combines a fault status flag with automatic retry at the
ON pins and is also available in the SO-8 package. The
LTC1647-3 has individual V
CC
pins, ON pins and FAULT
status pins for each channel and is available in a 16-lead
narrow SSOP package.
s
Hot Board Insertion
s
Electronic Circuit Breaker
s
Portable Computer Device Bays
s
Hot Plug Disk Drive
s
Allows Safe Board Insertion and Removal from a
Live Backplane
s
Programmable Electronic Circuit Breaker
s
FAULT Output Indication
s
Programmable Supply Voltage Power-Up Rate
s
High Side Drive for External MOSFET Switches
s
Controls Supply Voltages from 2.7V to 16.5V
s
Undervoltage Lockout
V
ID
Controller for Two Device Bays
Hot Swap is a trademark of Linear Technology Corporation.
V
CC
SENSE 1
1
8
6
ON1
C3
4.7nF
2
ON2
ON1
3.3V V
ID
SUPPLY
ON2
3
GND
4
GATE 1
SENSE 2
7
5
GATE 2
LTC1647-1
CONNECTOR #1
1394 PHY
AND/OR
USB PORT
DEVICE #1
C1
4.7nF
R2
10
R1
0.1
Q1
1/2 MMDF3N02HD
R5
0.1
Q2
1/2 MMDF3N02HD
R3**
R4**
C
LOAD
*
*
C
LOAD
IS USER-SELECTED BASED
ON THE DEVICE REQUIREMENTS
** R3, R4, R7 AND R8 ARE OPTIONAL DISCHARGE
RESISTORS WHEN DEVICES ARE POWERED-OFF
Q1, Q2: ON SEMICONDUCTOR
R6
10
+
CONNECTOR #2
1394 PHY
AND/OR
USB PORT
DEVICE #2
1647-1/2/3 TA01
R7**
R8**
C
LOAD
*
+
5ms/DIV
2.5V/DIV
1647-1/2/3 TA01a
V
ON
V
GATE
V
OUT
ON/OFF Sequence
APPLICATIO S
U
FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
LTC1647-1/LTC1647-2/LTC1647-3
2
Supply Voltage (V
CC
) ............................................... 17V
Input Voltage (SENSE) ................. 0.3V to (V
CC
+ 0.3V)
Input Voltage (ON) ..................................... 0.3V to 17V
Output Voltage (FAULT) ............................. 0.3V to 17V
Output Voltage (GATE) ......... Internally Limited (Note 3)
ABSOLUTE AXI U
RATI GS
W
W
W
U
PACKAGE/ORDER I FOR ATIO
U
U
W
(Note 1)
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
CC
= 5V unless otherwise noted. (Note 2)
Operating Temperature Range
Commercial ............................................. 0
C to 70
C
Industrial ............................................ 40
C to 85
C
Storage Temperature Range ................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
ORDER PART NUMBER
S8 PART MARKING
T
JMAX
= 150
C,
JA
= 130
C/W
Consult factory for Military grade parts.
16471
16471I
LTC1647-1CS8
LTC1647-1IS8
T
JMAX
= 150
C,
JA
= 130
C/W
T
JMAX
= 150
C,
JA
= 130
C/W
ORDER PART NUMBER
S8 PART MARKING
16472
16472I
LTC1647-2CS8
LTC1647-2IS8
ORDER PART NUMBER
GN PART MARKING
16473
16473I
LTC1647-3CGN
LTC1647-3IGN
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
V
CCX
Supply Range
Operating Range
q
2.7
16.5
V
I
CC
V
CC
Supply Current (Note 4)
ON1, ON2 = V
CC1
= V
CC2
, I
CC
= I
CC1
+ I
CC2
q
1.0
6
mA
I
CCX
V
CCX
Supply Current (Note 5, LTC1647-3)
ONX = V
CCX
, I
CCX
Individually Measured,
q
0.5
5
mA
V
CC1
= 5V, V
CC2
= 12V or V
CC1
= 12V, V
CC2
= 5V
V
LKO
V
CCX
Undervoltage Lockout
Coming Out of UVLO (Rising V
CCX
)
q
2.30
2.45
2.60
V
V
LKH
V
CCX
Undervoltage Lockout Hysteresis
210
mV
V
CB
Circuit Breaker Trip Voltage
V
CB
= V
CCX
V
SENSEX
q
40
50
60
mV
I
CP
GATE X Output Current
ONX High, FAULT X High, V
GATE
= GND (Sourcing)
q
6
10
14
A
ONX Low, FAULT X High, V
GATE
= V
CC
(Sinking)
50
A
ONX High, FAULT X Low, V
GATE
= 15V (Sinking)
50
mA
1
2
3
4
8
7
6
5
TOP VIEW
SENSE 1
SENSE 2
GATE 1
GATE 2
V
CC
ON1
ON2
GND
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
TOP VIEW
SENSE 1
SENSE 2
GATE 1
GATE 2
V
CC
ON1/FAULT 1
ON2/FAULT 2
GND
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
5
6
7
8
TOP VIEW
GN PACKAGE
16-LEAD PLASTIC SSOP
16
15
14
13
12
11
10
9
V
CC1
ON1
FAULT 1
ON2
FAULT 2
NC
NC
GND
V
CC2
SENSE 1
SENSE 2
GATE 1
GATE 2
NC
NC
NC
LTC1647-1/LTC1647-2/LTC1647-3
3
V
GATE
External MOSFET Gate Drive
(V
GATE
V
CC
), V
CC1
= V
CC2
= 5V
q
10
13
17
V
(V
GATE
V
CC
), V
CC1
= V
CC2
= 12V
q
10
15
19
V
V
ONHI
ONX Threshold High
q
1.20
1.29
1.38
V
V
ONLO
ONX Threshold Low
q
1.17
1.21
1.25
V
V
ONHYST
ONX Hysteresis
70
mV
I
IN
ONX Input Current
ON = GND or V
CC
q
1
10
A
V
OL
FAULT X Output Low Voltage
I
O
= 1mA, V
CC
= 5V
q
0.4
V
(LTC1647-2, LTC1647-3)
I
O
= 5mA, V
CC
= 5V
0.8
V
I
LEAK
FAULT X Output Leakage Current
No Fault, FAULT X = V
CC
= 5V
1
10
A
(LTC1647-3)
t
FAULT
Circuit Breaker Delay Time
V
CCX
V
SENSEX
= 0 to 100mV
0.3
s
t
RESET
Circuit Breaker Reset Time
ONX High to Low, to FAULT X High
q
50
100
s
t
ON
Turn-On Time
ONX Low to High, to GATE X On
2
s
t
OFF
Turn-Off Time
ONX High to Low, to GATE X Off
1
s
ELECTRICAL CHARACTERISTICS
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
CC
= 5V unless otherwise noted. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified.
Note 3: An internal Zener on the GATE pins clamp the charge pump
voltage to a typical maximum operating voltage of 28V. External overdrive
of the GATE pin beyond the internal Zener voltage may damage the device.
The GATE capacitance must be < 0.15
F at maximum V
CC
. If a lower GATE
pin clamp voltage is desired, use an external Zener diode.
Note 4: The total supply current I
CC
is measured with V
CC1
and V
CC2
connected internally (LTC1647-1, LTC1647-2) or externally (LTC1647-3).
Note 5: The individual supply current I
CCX
is measured on the LTC1647-3.
The lower of the two supplies, V
CC1
and V
CC2
, will have its channel's
current. The higher supply will carry the additional supply current of the
charge pump and the bias generator beside its channel's current.
LTC1647-1 Pinout
PIN
DESCRIPTION
1
V
CC
2
ON1
3
ON2
4
GND
LTC1647-3 Pinout
PIN
DESCRIPTION
1
V
CC1
2
ON1
3
FAULT 1
4
ON2
5
FAULT 2
6
NC
7
NC
8
GND
PIN
DESCRIPTION
5
GATE 2
6
GATE 1
7
SENSE 2
8
SENSE 1
PIN
DESCRIPTION
9
NC
10
NC
11
NC
12
GATE 2
13
GATE 1
14
SENSE 2
15
SENSE 1
16
V
CC2
LTC1647-2 Pinout
PIN
DESCRIPTION
1
V
CC
2
ON1 and FAULT 1
(Internally Tied Together)
3
ON2 and FAULT 2
(Internally Tied Together)
4
GND
PIN
DESCRIPTION
5
GATE 2
6
GATE 1
7
SENSE 2
8
SENSE 1
LTC1647-1 does not have the FAULT status feature.
The ONX/FAULT X must be connected to a driver via a resistor if the
autoretry feature is being used..
PI
U
TABLES
LTC1647-1/LTC1647-2/LTC1647-3
4
V
CC
(V)
2
6
10
14
18
4
8
12
16
I
CC
(mA)
1647-1/2/3 G01
6
5
4
3
2
1
0
T
A
= 25
C
I
CC
= I
CC1
+ I
CC2
V
CC
= V
CC1
= V
CC2
= ON1 = ON2
TEMPERATURE (
C)
75 50 25
0
25
50
75 100 125 150
I
CC
(mA)
1647-1/2/3 G02
6
5
4
3
2
1
0
I
CC
= I
CC1
+ I
CC2
V
CC
= V
CC1
= V
CC2
= ON1 = ON2
V
CC
= 15V
V
CC
= 12V
V
CC
= 3V
V
CC
= 5V
V
CC2
(V)
0
2
4
6
8
10 12 14 16 18 20
I
CC1
(mA)
1647-1/2/3 G03
5
4
3
2
1
0
T
A
= 25
C
V
CC1
= 15V
V
CC1
= 12V
V
CC1
= 3V
V
CC1
= 5V
V
CC2
(V)
0
2
4
6
8
10 12 14 16 18 20
I
CC2
(mA)
1647-1/2/3 G04
5
4
3
2
1
0
T
A
= 25
C
V
CC1
= 15V
V
CC1
= 12V
V
CC1
= 3V
V
CC1
= 5V
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
(V
GATE
V
CC
) (V)
1647-1/2/3 G05
20
18
16
14
12
10
8
6
4
2
0
T
A
= 25
C
V
CC
= V
CC1
= V
CC2
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
V
GATE
(V)
1647-1/2/3 G06
30
25
20
15
10
5
0
T
A
= 25
C
V
CC
= V
CC1
= V
CC2
TEMPERATURE (
C)
(V
GATE
V
CC
) (V)
1647-1/2/3 G07
20
18
16
14
12
10
8
6
4
2
0
V
CC
= V
CC1
= V
CC2
75 50 25
0
25
50
75 100 125 150
V
CC
= 15V
V
CC
= 12V
V
CC
= 3V
V
CC
= 5V
TEMPERATURE (
C)
V
GATE
(V)
1647-1/2/3 G08
35
30
25
20
15
10
5
0
V
CC
= V
CC1
= V
CC2
75 50 25
0
25
50
75 100 125 150
V
CC
= 15V
V
CC
= 12V
V
CC
= 3V
V
CC
= 5V
V
CC2
(V)
0
2
4
6
8
10 12 14 16 18 20
(V
GATE1
V
CC1
) (V)
1647-1/2/3 G09
20
18
16
14
12
10
8
6
4
2
0
V
CC1
= 15V
V
CC1
= 12V
V
CC1
= 3V
V
CC1
= 5V
T
A
= 25
C
(LTC1647-3)
I
CC
vs V
CC
I
CC
vs Temperature
I
CC1
vs V
CC2
I
CC2
vs V
CC2
(V
GATE
V
CC
) vs V
CC
V
GATE
vs V
CC
(V
GATE
V
CC
) vs Temperature
V
GATE
vs Temperature
(V
GATE1
V
CC1
) vs Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
LTC1647-1/LTC1647-2/LTC1647-3
5
V
CC2
(V)
0
2
4
6
8
10 12 14 16 18 20
V
GATE1
(V)
1647-1/2/3 G10
35
30
25
20
15
10
5
0
T
A
= 25
C
(LTC1647-3)
V
CC1
= 15V
V
CC1
= 12V
V
CC1
= 3V
V
CC1
= 5V
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
GATE OUTPUT SOURCE CURRENT (
A)
1647-1/2/3 G11
14
13
12
11
10
9
8
7
6
T
A
= 25
C
V
CC
= V
CC1
=V
CC2
TEMPERATURE (
C)
GATE OUTPUT SOURCE CURRENT (
A)
1647-1/2/3 G12
14
13
12
11
10
9
8
7
6
V
CC
= V
CC1
= V
CC2
= 5V
75 50 25
0
25
50
75 100 125 150
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
GATE OUTPUT SINK CURRENT (
A)
1647-1/2/3 G13
100
90
80
70
60
50
40
30
20
10
0
T
A
= 25
C
TEMPERATURE (
C)
GATE OUTPUT SINK CURRENT (
A)
1647-1/2/3 G14
55
54
53
52
51
50
49
48
47
46
45
V
CC
= 5V
75 50 25
0
25
50
75 100 125 150
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
GATE FAST PULL-DOWN CURRENT (mA)
1647-1/2/3 G15
60
55
50
45
40
35
30
T
A
= 25
C
TEMPERATURE (
C)
GATE FAST PULL-DOWN CURRENT (mA)
1647-1/2/3 G16
80
70
60
50
40
30
20
10
0
75 50 25
0
25
50
75 100 125 150
V
CC
= V
CC1
= V
CC2
= 5V
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
CIRCUIT BREAKER TRIP VOLTAGE (mV)
1647-1/2/3 G17
60
58
56
54
52
50
48
46
44
42
40
T
A
= 25
C
TEMPERATURE (
C)
CIRCUIT BREAKER TRIP VOLTAGE (mV)
1647-1/2/3 G18
60
58
56
54
52
50
48
46
44
42
40
75 50 25
0
25
50
75 100 125 150
V
CC
= 15V
V
CC
= 12V
V
CC
= 5V
V
CC
= 3V
V
GATE1
vs V
CC2
GATE Output Source Current vs
V
CC
GATE Output Source Current vs
Temperature
GATE Output Sink Current vs V
CC
GATE Output Sink Current vs
Temperature
GATE Fast Pull-Down Current vs
V
CC
GATE Fast Pull-Down Current vs
Temperature
Circuit Breaker Trip Voltage vs
V
CC
Circuit Breaker Trip Voltage vs
Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
LTC1647-1/LTC1647-2/LTC1647-3
6
Undervoltage Lockout Threshold
vs Temperature
ON Threshold Voltage vs V
CC
ON Threshold Voltage vs
Temperature
FAULT V
OL
vs V
CC
FAULT V
OL
vs Temperature
T
FAULT
vs V
CC
T
FAULT
vs Temperature
Circuit Breaker Reset Time vs V
CC
Circuit Breaker Reset Time vs
Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
TEMPERATURE (
C)
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
1647-1/2/3 G19
2.6
2.5
2.4
2.3
2.2
2.1
75 50 25
0
25
50
75 100 125 150
RISING EDGE
FALLING EDGE
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
ON THRESHOLD VOLTAGE (V)
1647-1/2/3 G20
1.35
1.30
1.25
1.20
1.15
T
A
= 25
C
HIGH
LOW
TEMPERATURE (
C)
ON THRESHOLD VOLTAGE (V)
1647-1/2/3 G21
1.35
1.30
1.25
1.20
1.15
75 50 25
0
25
50
75 100 125 150
V
CC
= 5V
HIGH
LOW
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
FAULT V
OL
(V)
1647-1/2/3 G22
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
T
A
= 25
C
I
OL
= 5mA
I
OL
= 1mA
TEMPERATURE (
C)
FAULT V
OL
(V)
1647-1/2/3 G23
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
CC
= 5V
I
OL
= 5mA
I
OL
= 1mA
75 50 25
0
25
50
75 100 125 150
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
T
FAULT
(
s)
1647-1/2/3 G24
1.0
0.8
0.6
0.4
0.2
0
T
A
= 25
C
TEMPERATURE (
C)
T
FAULT
(
s)
1647-1/2/3 G25
1.0
0.8
0.6
0.4
0.2
0
75 50 25
0
25
50
75 100 125 150
V
CC
= 15V
V
CC
= 12V
V
CC
= 3V
V
CC
= 5V
V
CC
(V)
0
2
4
6
8
10 12 14 16 18 20
CIRCUIT BREAKER RESET TIME (
s)
1647-1/2/3 G26
70
60
50
40
30
T
A
= 25
C
TEMPERATURE (
C)
CIRCUIT BREAKER RESET TIME (
s)
1647-1/2/3 G27
60
58
56
54
52
50
48
46
44
42
40
75 50 25
0
25
50
75 100 125 150
V
CC
= 3V
V
CC
= 5V
V
CC
= 12V
V
CC
= 15V
LTC1647-1/LTC1647-2/LTC1647-3
7
V
CC1
(LTC1647-3): Channel 1 Positive Supply Input. The
supply range for normal operation is 2.7V to 16.5V. The
supply current, I
CC1
, is typically 1mA. Channel 1's under-
voltage lockout (UVLO) circuit disables GATE 1 until the
supply voltage at V
CC1
is greater than V
LKO
(typically
2.47V). GATE 1 is held at ground potential until UVLO
deactivates. If ON1 is high and V
CC1
is above the UVLO
threshold voltage, GATE 1 is pulled high by a 10
A current
source. If V
CC1
falls below (V
LKO
V
LKH
), GATE 1 is pulled
immediately to ground. The internal reference and the
common charge pump are powered from the higher of the
two V
CC
inputs, V
CC1
or V
CC2
.
V
CC2
(LTC1647-3): Channel 2 Positive Supply Input. See
V
CC1
for functional description.
V
CC
: The Common Positive Supply Input for the LTC1647-1
and the LTC1647-2. V
CC1
and V
CC2
are internally con-
nected together.
GND: Chip Ground.
ON1: Channel 1 ON Input. The threshold at the ON1 pin is
set at 1.28V with 70mV hysteresis. If UVLO and the circuit
breaker of channel 1 are inactive, a logic high at ON1
enables the 10
A charge pump current source, pulling the
GATE 1 pin above V
CC1
. If the ON1 pin is pulled low, the
GATE 1 pin is pulled to ground by a 50
A current sink.
ON1 resets channel 1's electronic circuit breaker by pull-
ing ON1 low for greater than one t
RESET
period (50
s). A
low-to-high transition at ON1 restarts a normal GATE 1
pull-up sequence.
ON2: Channel 2 ON Input. See ON1 for functional descrip-
tion.
FAULT 1: Channel 1 Open-Drain Fault Status Output.
FAULT 1 pin pulls low after 0.3
s (t
FAULT
) if the circuit
breaker measures greater than 50mV across the sense
resistor connected between V
CC1
and SENSE 1. If FAULT 1
pulls low, GATE 1 also pulls low. FAULT 1 remains low until
ON1 is pulled low for at least one t
RESET
period.
FAULT 2: Channel 2 Open-Drain Fault Status Output. See
FAULT 1 for functional description.
SENSE 1: Channel 1 Circuit Breaker Current Sense Input.
Load current is monitored by a sense resistor connected
between V
CC1
and SENSE 1. The circuit breaker trips if the
voltage across the sense resistor exceeds 50mV (V
CB
). To
disable the circuit breaker, connect SENSE 1 to V
CC1
. In
order to obtain optimum performance, use Kelvin-sense
connections between the V
CC
and SENSE pins to the
current sense resistor.
SENSE 2: Channel 2 Circuit Breaker Current Sense Input.
See SENSE 1 for functional description.
GATE 1: Channel 1 N-Channel MOSFET Gate Drive Output.
An internal charge pump guarantees at least 10V of gate
drive from a 5V supply. Two Zener clamps are incorpo-
rated at the GATE 1 pin; one Zener clamps GATE 1
approximately 15V above V
CC
and the second Zener
clamps GATE 1 appoximately 28V above GND. The rise
time at GATE 1 is set by an external capacitor connected
between GATE 1 and GND and an internal 10
A current
source provided by the charge pump. The fall time at GATE
1 is set by the 50
A current sink if ON1 is pulled low. If the
circuit breaker is tripped or the supply voltage hits the
UVLO threshold, a 50mA current sink rapidly pulls GATE 1
low.
GATE 2: Channel 2 N-Channel MOSFET Gate Drive Output.
See GATE 1 for functional description.
NC: No Connection.
PI FU CTIO S
U
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LTC1647-1/LTC1647-2/LTC1647-3
8
LTC1647-1
LTC1647-2
BLOCK DIAGRA S
W
3
+
50
s
FILTER
+
1.21V
50mV
CHANNEL ONE
CHANNEL TWO
(DUPLICATE OF CHANNEL ONE)
10
A
CP
+
50
A
2.45V
UVL
CHARGE
PUMP
REFERENCE
1.21V
ON2
1647-1/2/3 BD1
7
SENSE 2
5 GATE 2
4
GND
1
V
CC
CP
2
ON1
8
SENSE 1
6 GATE 1
3
+
50
s
FILTER
+
1.21V
50mV
CHANNEL ONE
CHANNEL TWO
(DUPLICATE OF CHANNEL ONE)
10
A
CP
+
50
A
FAULT
2.45V
UVL
CHARGE
PUMP
REFERENCE
1.21V
ON2/FAULT 2
1647-1/2/3 BD2
7
SENSE 2
5 GATE 2
4
GND
1
V
CC
CP
2
ON1/FAULT 1
8
SENSE 1
6 GATE 1
LTC1647-1/LTC1647-2/LTC1647-3
9
V
CC
Selection Circuit
The LTC1647-3 features separate supply inputs (V
CC1
and
V
CC2
) for each channel. The reference and charge pump
circuit draw supply current from the higher of the two
supplies. An internal V
CC
selection circuit detects and
makes the power connection automatically. This allows a
3V channel to have standard MOSFET gate overdrive when
the other channel is 5V. An internal Zener clamps GATE
about 15V above V
CC
.
If both supplies are connected together (internally for
LTC1647-1 and LTC1647-2 or externally for LTC1647-3),
the reference and charge pump circuit draw equal current
from both pins.
Electronic Circuit Breaker
Each channel of the LTC1647 features an electronic circuit
breaker to protect against excessive load current and
short-circuits. Load current is monitored by sense resis-
tor R1 as shown in Figure 1. The circuit breaker threshold,
V
CB
, is 50mV and it exhibits a response time, t
FAULT
, of
approximately 300ns. If the voltage between V
CC
and
SENSE exceeds V
CB
for more than t
FAULT
, the circuit
breaker trips and immediately pulls GATE low with a 50mA
current sink. The MOSFET turns off and FAULT pulls low.
The circuit breaker is cleared by pulling the ON pin low for
a period of at least t
RESET
(50
s). A timing diagram of these
events is shown in Figure 2.
The value of the sense resistor R1 is given by
R1 = V
CB
/I
TRIP
(
)
where V
CB
is the circuit breaker trip voltage (50mV) and
I
TRIP
is the value of the load current at which the circuit
breaker trips. Kelvin-sense layout techniques between the
sense resistor and the V
CC
and SENSE pins are highly
recommended for proper operation.
LTC1647-3
APPLICATIO S I FOR ATIO
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BLOCK DIAGRA S
W
14
+
50
s
FILTER
+
1.21V
50mV
CHANNEL ONE
CHANNEL TWO
(DUPLICATE OF CHANNEL ONE)
10
A
CP
+
50
A
FAULT
2.45V
UVL
CHARGE
PUMP
REFERENCE
1.21V
SENSE 2
4
ON2
5
FAULT 2
1647-1/2/3 BD3
16
V
CC2
12 GATE 2
8
GND
CP
V
CC
SELECTION
15
SENSE 1
13 GATE 1
3
FAULT 1
2
ON1
1
V
CC1
LTC1647-1/LTC1647-2/LTC1647-3
10
The circuit breaker trip voltage has a tolerance of 20%;
combined with a 5% sense resistor, the total tolerance is
25%. Therefore, calculate R1 based on a trip current I
TRIP
of no less than 125% of the maximum operating current.
Do not neglect the effect of ripple current, which adds to
the maximum DC component of the load current. Ripple
current may arise from any of several sources, but the
worst offenders are switching supplies.
A switching regulator on the load side will attempt to draw
some ripple current from the backplane and this current
passes through the sense resistor. Similarly, output ripple
from a switching regulator supplying the backplane will
flow through the sense resistor and into the load capacitor.
Minimize the effects of ripple current by either filtering the
V
OUT
line or adding an RC filter to the SENSE pin. A series
inductance of 1
H to 10
H inserted between Q1 and C
LOAD
is adequate ripple current suppression in most cases.
Alternatively, a filter, consisting of R3 and C3(Figure 3),
simply filters the ripple component from the SENSE pin at
the expense of response time. The added delay is given by
t
DELAY
= R3C3ln[1 (V
CB
/R1 I
AV
)/(I
PK
I
AV
)]
Power MOSFET Selection
Power MOSFETs are classified into two catagories: stan-
dard MOSFETs (R
DS(ON)
specified at V
GS
= 10V) and logic-
level MOSFETs (R
DS(ON)
specified at V
GS
= 5V). The
absolute maximum rating for V
GS
is typically 20V for
standard MOSFETs. The maximum rating for logic-level
MOSFETs is lower and ranges from 8V to 16V depending
on the manufacturer and specific part number. Some
logic-level MOSFETs have a 20V maximum V
GS
rating. The
LTC1647 is primarily targeted for standard MOSFETs; low
supply voltage applications should use logic-level
MOSFETs. GATE overdrive as a function of V
CC
is illus-
trated in the Typical Performance Curves. If lower GATE
overdrive is desired, connect a diode in series with a Zener
between GATE and V
CC
or between GATE and V
OUT
as
shown in Figure 4.
The R
DS(ON)
of the external pass transistor must be low to
make V
DS
a small percentage of V
CC
. At V
CC
= 3.3V, V
DS
+
V
CB
= 0.1V yields 3% error at maximum load current. This
restricts the choice of MOSFETs to very low R
DS(ON)
. At
higher V
CC
voltages, the R
DS(ON)
requirement can be
relaxed. MOSFET package dissipation (P
D
and T
J
) may
restrict the value of R
DS(ON)
.
Figure 1. Supply Control Circuitry
Figure 2. Current Fault Timing
Figure 3. Filtering Current Ripple/Glitches
Figure 4. Optional Gate Clamp
APPLICATIO S I FOR ATIO
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SENSE
15
13
ON1
2
FAULT
ON
V
CC
V
OUT
FAULT
3
GND
8
GATE
LTC1647-3
C1
10nF
1647-1/2/3 F01
R2
10
R1
0.01
Q1
IRF7413
C
LOAD
+
V
CC
1
R3
10k
t
FAULT
t
RESET
V
ON
V
CC
V
SENSE
V
GATE
V
FAULT
1647-1/2/3 F02
SENSE
V
CC
V
OUT
GATE
LTC1647
C1
10nF
C3
10nF
1647-1/2/3 F03
R2
10
R1
0.01
Q1
IRF7413
C
LOAD
I
PK
= 7.5A
I
AV
= 2.5A
I
TRIP
= V
CB
/R1 = 5A
t
DELAY
= 10
s
+
V
CC
R3
1.5k
V
CC
V
OUT
*USER SELECTED VOLTAGE CLAMP
1N4688 (5V)
1N4692 (7V): LOGIC-LEVEL MOSFET
1N4695 (9V)
1N4702 (15V): STANDARD-LEVEL MOSFET
1647-1/2/3 F04
R1
D1*
D2
1N4148
D4*
D2
1N4148
Q1
LTC1647-1/LTC1647-2/LTC1647-3
11
Power Supply Ramping
V
OUT
is controlled by placing MOSFET Q1 in the power
path (Figure 1). R1 provides load current fault detection
and R2 prevents MOSFET high frequency oscillation. By
ramping the gate of the pass transistor at a controlled rate
(dV/dt = 10
A/C1), the transient surge current
(I = C
LOAD
dV/dt = 10
AC
LOAD
/C1) drawn from the main
backplane is limited to a safe value when the board is
inserted into the connector.
When power is first applied to V
CC
, the GATE pin pulls low.
A low-to-high transition at the ON pin initiates GATE ramp-
up. The rising dV/dt of GATE is set by 10
A/C1 (Figure 5),
where C1 is the total external capacitance between GATE
and GND. The ramp-up time for V
OUT
is equal to
t = (V
CC
C1)/10
A.
A high-to-low transition at the ON pin initiates a GATE
ramp-down at a slope of 50
A/C1. This rate is usually
adequate as the supply bypass capacitors take time to
discharge through the load.
If the ON pin is connected to V
CC
, or is pulled high before
V
CC
is first applied, GATE is held low until V
CC
rises above
the undervoltage lockout threshold, V
LKO
(Figure 6). Once
the threshold is exceeded, GATE ramps at a controlled rate
of 10
A/C1. When the power supply is disconnected, the
body diode of Q1 holds V
CC
about 700mV below V
OUT
. The
GATE voltage droops at a rate determined by V
CC
. If V
CC
drops below V
LKO
V
LKH
, the LTC1647 enters UVLO and
GATE pulls down to GND.
Autoretry
The LTC1647-2 and LTC1647-3 are designed to allow an
automatic reset of the electronic circuit breaker after a
fault condition occurs. This is accomplished by pulling the
ON/FAULT (LTC1647-2) pin or the ON and FAULT pins tied
together (LTC1647-3) high through a resistor, R3, as
shown in Figure 7. An autoretry sequence begins if a fault
occurs. If the circuit breaker trips, FAULT pulls the ON pin
low. After a t
RESET
interval elapses, FAULT resets and R3
Figure 5. Supply Turn-On/Off with ON
Figure 7. Autoretry Sequence
APPLICATIO S I FOR ATIO
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V
CC
+
V
GATE
V
CC
V
CC
V
ON
C
LOAD
DISCHARGES
RAMP-DOWN
SLOPE = 50
A/C1
RAMP-UP
SLOPE = 10
A/C1
V
OUT
V
GATE
0V
0V
1647-1/2/3 F05
V
CC
+
V
GATE
V
CC
V
CC
V
CC
V
LKO
V
LKO
V
LKH
C
LOAD
DISCHARGES
V
CC
UNPLUGGED
OUT OF UVLO
INTO UVLO
FAST RAMP-DOWN
AT UNDERVOLTAGE
LOCKOUT
V
GATE
DROOP
DUE TO V
CC
RAMP-UP
SLOPE = 10
A/C1
V
OUT
V
GATE
0V
0V
1647-1/2/3 F06
SENSE
8
6
ON/FAULT
V
CC
V
OUT
FAULT
ON
(5V LOGIC)
2
GND
4
GATE
LTC1647-2
C1
10nF
R2
10
R1
0.01
Q1
IRF7413
C
LOAD
+
V
CC
1
R3
15k
C3
0.1
F
t
RESET
t
DELAY
t
RAMP
V
CC
V
SENSE
V
GATE
V
FAULT
1647-1/2/3 F07
LTC1647-1/LTC1647-2/LTC1647-3
12
pulls the ON pin up. C3 delays GATE turn-on until the
voltage at the ON pin exceeds V
IH
. The delay time is
t
DELAY
= R3C3ln[1(V
IH
V
OL
)/(V
ON
V
OL
)]
GATE ramps up at 10
A/C1 until Q1 conducts. If V
OUT
is
still shorted to GND, the cycle repeats. The ramp interval
is about t
RAMP
= V
TH
C1/10
A where V
TH
is the threshold
voltage of the external MOSFET.
Hot Circuit Insertion
When circuit boards are inserted into a live backplane or
a device bay, the supply bypass capacitors on the board
can draw huge transient currents from the backplane or
the device bay power bus as they charge up. The transient
currents can damage the connector pins and glitch the
system supply, causing other boards in the system to
reset or malfunction.
The LTC1647 is designed to turn two positive supplies on
and off in a controlled manner, allowing boards to be safely
inserted or removed from a live backplane or device bay.
The LTC1647 can be located before or after the connector
as shown in Figure 8. A staggered PCB connector can
sequence pin conections when plugging and unplugging
circuit boards. Alternatively, the control signal can be
generated by processor control.
Ringing
Good engineering practice calls for bypassing the supply
rail of any circuit. Bypass capacitors are often placed at the
supply connection of every active device, in addition to one
or more large value bulk bypass capacitors per supply rail.
If power is connected abruptly, the bypass capacitors slow
the rate of rise of voltage and heavily damp any parasitic
resonance of lead or trace inductance working against the
supply bypass capacitors.
The opposite is true for LTC1647 Hot Swap circuits on a
daughterboard. In most cases, on the powered side of the
MOSFET switch (V
CC
) there is no supply bypass capacitor
present. An abrupt connection, produced by plugging a
board into a backplane connector, results in a fast rising
edge applied to the V
CC
line of the LTC1647.
No bulk capacitance is present to slow the rate of rise and
heavily damp the parasitic resonance. Instead, the fast
edge shock excites a resonant circuit formed by a combi-
nation of wiring harness, backplane and circuit board
parasitic inductances and MOSFET capacitance. In theory,
the peak voltage should rise to 2X the input supply, but in
practice the peak can reach 2.5X, owing to the effects of
voltage dependent MOSFET capacitance.
The absolute maximum V
CC
potential for the LTC1647 is
17V; any circuit with an input of more than 6.8V should be
scrutinized for ringing. A well-bypassed backplane should
not escape suspicion: circuit board trace inductances of as
little as 10nH can produce sufficient ringing to overvoltage
V
CC
.
Check ringing with a fast storage oscilloscope (such as a
LECROY 9314AL DSO) by attaching coax or a probe to V
CC
and GND, then repeatedly inserting the circuit board into
the backplane. Figures 9a and 9b show typical results in a
12V application with different V
CC
lead lengths. The peak
amplitude reaches 22V, breaking down the ESD protection
diode in the process.
There are two methods for eliminating ringing: clipping
and snubbing. A transient voltage suppressor is an effec-
tive means of limiting peak voltage to a safe level.
Figure 10 shows the effect of adding an ON Semiconduc-
tor, 1SMA12CAT3, on the waveform of Figure 9.
Figures 11a and 11b show the effects of snubbing with
different RC networks. The capacitor value is chosen as
10X to 100X the MOSFET C
OSS
under bias and R is
selected for best damping--1
to 50
depending on the
value of parasitic inductance.
Supply Glitching
LTC1647 Hot Swap circuits on the backplane are generally
used to provide power-up/down sequence at insertion/
removal as well as overload/short-circuit protection. If a
short-circuit occurs at supply ramp-up, the circuit breaker
trips. The partially enhanced MOSFET, Q1, is easily dis-
connected without any supply glitch.
APPLICATIO S I FOR ATIO
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LTC1647-1/LTC1647-2/LTC1647-3
13
If a dead short occurs after a supply connection is made
(Figure 12), the sense resistor R1 and the R
DS(ON)
of fully
enhanced Q1 provide a low impedance path for nearly
unlimited current flow. The LTC1647 discharges the GATE
pin in a few microseconds, but during this discharge time
current on the order of 150 amperes flows from the V
CC
power supply. This current spike glitches the power sup-
ply, causing V
CC
to dip (Figure 12a and 12b).
On recovery from overload, some supplies may over-
shoot. Other devices attached to this supply may reset or
malfunction and the overshoot may also damage some
components. An inductor (1
H to 10
H) in series with
Q1's source limits the short-circuit di/dt, thereby limiting
the peak current and the supply glitch (Figure 12c and
12d). Additional power supply bypass capacitance also
reduces the magnitude of the V
CC
glitch.
V
ID
Power Controller
The two Hot Swap channels of the LTC1647 are ideally
suited for V
ID
power control in portable computers.
Figure 13 shows an application using the LTC1647-2 on
the system side of the device bay interface (1394 PHY and/
or USB). The controller detects the presence of a periph-
eral in each device bay and controls the LTC1647-2. The
timing waveform illustrates the following sequence of
events: t1, rising out of undervoltage lockout with GATE 1
ramping up; t2, load current fault at R1; t3, circuit breaker
resets with R5/C3 delay; t4/t5, controller gates off/on
device supply with RC delay; t6, device enters undervolt-
age lockout.
If C6 is not connected in Figure 13, FAULT 2 and ON2 will
have similar waveforms. t7 initiates an ON sequence; t8, a
load fault is detected at R7 with FAULT 2 pulling low. If the
controller wants to stretch the interval between retries, it
can pull ON2 low at t9 ( t9 t8 < 0.4t
RESET
). At t10/t11, the
controller initiates a new power-up/down sequence.
APPLICATIO S I FOR ATIO
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LTC1647-1/LTC1647-2/LTC1647-3
14
Figure 8. Staggered Pins Connection
APPLICATIO S I FOR ATIO
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SENSE
15
13
FAULT
V
CC
V
OUT
FAULT
ON
3
ON
2
GND
8
GATE
LTC1647-3
C1
BACKPLANE
CONNECTOR
STAGGERED PCB
EDGE CONNECTOR
R2
R1
Q1
C
LOAD
+
V
CC
1
R3
R5
R4
Q2
(a) HOT SWAP CONTROLLER ON MOTHERBOARD
SENSE
15
13
FAULT
V
CC
V
OUT
FAULT
3
ON
2
GND
8
GATE
LTC1647-3
C1
1647-1/2/3 F08
R2
R1
Q1
C
LOAD
+
V
CC
1
R3
BACKPLANE
CONNECTOR
STAGGERED PCB
EDGE CONNECTOR
(b) HOT SWAP CONTROLLER ON DAUGHTERBOARD
R4
LTC1647-1/LTC1647-2/LTC1647-3
15
Figure 9. Ring Experiment
V
OUT
C1
10nF
1647-1/2/3 F09
R2
10
R1
0.01
12V
Q1
IRF7413
C
LOAD
+
+
LTC1647
POWER
LEADS
SCOPE
PROBE
8'
1
s/DIV
1647-1/2/3 F09a
4V/DIV
0V
24V
1
s/DIV
4V/DIV
1647-1/2/3 F09b
0V
24V
(a) Undamped V
CC
Waveform (48" Leads)
(b) Undamped V
CC
Waveform (8" Leads)
APPLICATIO S I FOR ATIO
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LTC1647-1/LTC1647-2/LTC1647-3
16
Figure 10. Transient Suppressor Clamp
Figure 11. Snubber "Fixes"
APPLICATIO S I FOR ATIO
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V
OUT
C1
10nF
1647-1/2/3 F10
R2
10
D1*
ON SEMICONDUCTOR
* 1SMA12CAT3
R1
0.01
12V
Q1
IRF7413
C
LOAD
+
+
LTC1647
POWER
LEADS
BACKPLANE CONNECTOR
PCB EDGE CONNECTOR
1
s/DIV
1647-1/2/3 F10a
2V/DIV
0V
12V
V
OUT
C1
10nF
1647-1/2/3 F11
R2
10
R1
0.01
12V
Q1
IRF7413
C
LOAD
+
+
LTC1647
POWER
LEADS
BACKPLANE CONNECTOR
PCB EDGE CONNECTOR
R3
10
C1
0.1
F
1
s/DIV
1647-1/2/3 F11a
2V/DIV
0V
12V
1
s/DIV
1647-1/2/3 F11b
2V/DIV
0V
12V
V
CC
Waveform Clamped
by a Transient Suppressor
(a) V
CC
Waveform Damped
by a Snubber (15
, 6.8nF)
(b) V
CC
Waveform Damped
by a Snubber (10
, 0.1
F)
LTC1647-1/LTC1647-2/LTC1647-3
17
APPLICATIO S I FOR ATIO
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Figure 12. Supply Glitch
C1
10nF
1647-1/2/3 F12
R2
10
R1
0.01
12V
Q1
IRF7413
L1
2
H
+
LTC1647
SUPPLY
GLITCH
BACKPLANE CONNECTOR
BOARD WITH POSSIBLE
SHORT-CIRCUIT FAULT
C2
100
F
+
1
s/DIV
25A/DIV
1647-1/2/3 F12a
1
s/DIV
4V/DIV
1647-1/2/3 F12b
V
CC
GATE
1
s/DIV
5A/DIV
1647-1/2/3 F12c
1
s/DIV
4V/DIV
1647-1/2/3 F12d
GATE
V
CC
(a) V
CC
Short-Circuit
Supply Current Glitch
without Any Limiting
(b) V
CC
Supply Glitch
without Any Limiting
(c) V
CC
Short-Circuit
Supply Current Glitch with
2
H Series Inductor
(d) V
CC
Supply Glitch
with 2
H Series Inductor
LTC1647-1/LTC1647-2/LTC1647-3
18
APPLICATIO S I FOR ATIO
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Figure 13. V
ID
Power Controller with Fault Status and Retry Sequence
V
CC
SENSE 1
1
8
6
ON1/FAULT 1
C4
10nF
2
ON2/FAULT 2
3.3V V
ID
SUPPLY
3
GND
4
GATE 1
SENSE 2
7
5
GATE 2
LTC1647-2
CONNECTOR #1
1394 PHY
AND/OR
USB PORT
DEVICE #1
C1
10nF
R2
10
R1
0.1
Q1
1/2 MMDF3N02HD
R7
0.1
Q2
1/2 MMDF3N02HD
R5
10
R3**
R4**
C
LOAD
*
*
C
LOAD
IS USER-SELECTED BASED
ON THE DEVICE REQUIREMENTS
** R3, R4, R7 AND R8 ARE OPTIONAL DISCHARGE
RESISTORS WHEN DEVICES ARE POWERED-OFF
Q1, Q2: ON SEMICONDUCTOR
R8
10
+
CONNECTOR #2
1394 PHY
AND/OR
USB PORT
DEVICE #2
R9**
R10**
C
LOAD
*
+
C3
0.1
F
R6
10
C6
0.1
F
ON1
FAULT 1
ON2
FAULT 2
DEVICE BAY
CONTROLLER
WITH 1394 PHY
AND/OR USB
V
ID
V
ON1
V
R1
V
GATE1
V
FAULT1
V
ON2
V
R7
V
GATE2
V
FAULT2
V
LKO
V
IH
V
IH
V
LKO
V
LKH
V
IL
FAULT 1 WAVEFORM SHOWN WITH C3
FAULT 2 WAVEFORM SHOWN WITHOUT C6
t4
t5
t1
t7
t8
1647-1/2/3 F13
t2
t9
t10
t11
t3
t6
LTC1647-1/LTC1647-2/LTC1647-3
19
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
PACKAGE DESCRIPTIO
U
Dimensions in inches (millimeters) unless otherwise noted.
GN16 (SSOP) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
2
3
4
5
6
7
8
0.229 0.244
(5.817 6.198)
0.150 0.157**
(3.810 3.988)
16 15 14 13
0.189 0.196*
(4.801 4.978)
12 11 10 9
0.016 0.050
(0.406 1.270)
0.015
0.004
(0.38
0.10)
45
0
8
TYP
0.007 0.0098
(0.178 0.249)
0.053 0.068
(1.351 1.727)
0.008 0.012
(0.203 0.305)
0.004 0.0098
(0.102 0.249)
0.0250
(0.635)
BSC
0.009
(0.229)
REF
0.016 0.050
(0.406 1.270)
0.010 0.020
(0.254 0.508)
45
0
8
TYP
0.008 0.010
(0.203 0.254)
SO8 1298
0.053 0.069
(1.346 1.752)
0.014 0.019
(0.355 0.483)
TYP
0.004 0.010
(0.101 0.254)
0.050
(1.270)
BSC
1
2
3
4
0.150 0.157**
(3.810 3.988)
8
7
6
5
0.189 0.197*
(4.801 5.004)
0.228 0.244
(5.791 6.197)
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1647-1/LTC1647-2/LTC1647-3
20
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear-tech.com
LINEAR TECHNOLOGY CORPORATION 1999
1647f LT/TP 0100 4K PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATIO
U
PART NUMBER
DESCRIPTION
COMMENTS
LTC1421
2-Channel Hot Swap Controller
24-Pin, Operates from 3V to 12V and Supports 12V
LTC1422
Hot Swap Controller in SO-8
System Reset Output with Programmable Delay
LT1640L/LT1640H
Negative Voltage Hot Swap Controller in SO-8
Operates from 10V to 80V
LT1641
High Voltage Hot Swap Controller in SO-8
Operates from 9V to 80V
LT1642
Fault Protected Hot Swap Controller
Operates Up to 16.5V, Protected to 33V
LTC1643L/LTC1643H
PCI-Bus Hot Swap Controller
3.3V, 5V and
12V in Narrow 16-Pin SSOP
LT1645
2-Channel Hot Swap Controller
Operates from 1.2V to 12V, Power Sequencing
Hot Swapping Two Supplies
Two separate supplies can be independently controlled by
using the LTC1647-3. In some applications, sequencing
between the two power supplies is a requirement. For
example, it may be necessary to ramp-up one supply first
before allowing the second supply to power-up, as well as
requiring that this same supply ramp-down last on power-
down. Figure 14's circuit illustrates how to program the
delays between the two pass transistors using the ON1
and ON2 pins (time events t1 to t4). t5 and t7 show both
channels being switched on simultaneously where se-
quencing is not crucial.
Some applications require that both channels be gated off
if a fault occurs in one channel. This is accomplished in
Figure 14 by using a crisscross FAULT-to-SENSE arrange-
ment of R3/R4 and R7/R8. t6 and t9 illustrate the circuit's
operation.
Figure 14. Hot Swapping Two Supplies
SENSE 1
15
13
FAULT 2
5V SUPPLY
V
OUT1
(5A)
FAULT
GND
ON2
ON1
5
ON2
4
FAULT 1
3
ON1
2
GND
8
GATE 1
LTC1647-3
C1
10nF
R2
10
R1
0.01
Q1
IRF7413
R3
100
C
LOAD
+
V
CC1
SENSE 2
GATE 2
V
CC2
1
14
12
16
R8
100
12V SUPPLY
V
OUT2
(2.5A)
C
LOAD
+
R5
10k
R6
10k
R4
4.7k
R7
12k
C3
10nF
Q2
IRF7413
R9
10
R10
0.02
CONNECTOR
V
R1
V
R10
V
ON1
V
ON2
V
OUT1
V
OUT2
t6
t9
1647-1/2/3 F14
t3
t2
t1
t4
t5
t7
t8
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