1
LTC1710
SMBus Dual Monolithic
High Side Switch
s
Two 0.4
/300mA N-Channel Switches
s
Available in MS8 and SO-8 Packages
s
SMBus and I
2
C Compatible
s
0.6V V
IL
and 1.4V V
IH
for DATA and CLK
s
Low Standby Current: 14
A
s
Separate Drain Connection to SW0
s
Three Addresses from One Three-State Address Pin
s
Independent Control of Up to Six Switches
s
Built-In Power-On Reset Timer
s
Built-In Undervoltage Lockout
FEATURES
DESCRIPTIO
N
U
The LTC
1710 SMBus dual switch has two built-in 0.4
/
300mA switches that are controlled by a 2-wire SMBus
interface. With a low standby current of 14
A (3.3V), the
LTC1710 operates over an input voltage range of 2.7V to
5.5V while maintaining the SMBus specified 0.6V V
IL
and
1.4V V
IH
input thresholds.
Using the 2-wire interface, CLK and DATA, the LTC1710
follows SMBus's Send Byte Protocol to independently
control the two 0.4
internal N-channel power switches,
which are fully enhanced by onboard charge pumps.
The LTC1710 has one three-state programmable
address pin that allows three different addresses for a total
of six available switches on the same bus. The LTC1710
also features a separate user-controlled drain supply
(SW0D) to Switch 0 so that it can be used to control
SMBus peripherials using a different power supply.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO
N
S
U
s
Handheld Computer Power Management
s
Computer Peripheral Control
s
Laptop Computer Power Plane Switching
s
Portable Equipment Power Control
s
Industrial Control Systems
s
ACPI SMBus Interface
TYPICAL APPLICATIO
N
U
LOAD CURRENT (mA)
0
SWITCH VOLTAGE DROP (mV)
200
V
CC
= 3.3V
300
400
1710 TA02
100
0
100
200
300
500
T
A
= 25
C
400
V
CC
= 2.7V
V
CC
= 5V
Switch Voltage Drop
vs Load Current
CHARGE
PUMP
8
1
2
10
F
10
F
7
5
CLOCK
DATA
6
FROM SMBus
3
AD1
(PROGRAMMABLE)
4
1710 TA01
V
CC
2.7V TO 5.5V
SW0D
0V TO V
CC
LTC1710
LOAD 1
SW0
SW1
LOAD 2
2
LTC1710
ABSOLUTE
M
AXI
M
U
M
RATINGS
W
W
W
U
(Voltages Referred to GND Pin) (Note 1)
Input Supply Voltage (V
CC
) .......................... 0.3V to 6V
Input Supply Voltage (V
CC
) with SW0 Connected
as a Low Side Switch ........................... 0.3V to 3.6V
DATA, CLK (Bus Pins 6, 5)......................... 0.3V to 6V*
AD1 ( Address Pin 3) ....................... 0.3V to V
CC
+ 0.3V
OUT0, OUT1 (Output Pins 2, 7) ................... 0.3V to 6V
SW0D (Switch 0 Drain Pin 1)....................... 0.3V to 6V
OUT0, OUT1 (Output Pins 2, 7)
Continuous .................................................... 300mA
Pulsed, < 10
s (nonrepetitive) ............................... 1A
Operating Temperature Range
LTC1710C ................................................ 0
C to 70
C
LTC1710I ............................................ 40
C to 85
C
Junction Temperature** ...................................... 125
C
Storage Temperature Range .................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec)................... 300
C
*Supply rails to DATA and CLK are independent of V
CC
to LTC1710.
**Although the LTC1710 can sustain T
JMAX
= 125
C without damage, its internal protection
circuitry is set to shut down the switches at T
J
= 120
C with 15
C hysteresis.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
CC
Operating Supply Voltage Range
q
2.7
5.5
V
I
VCC
Supply Current
Charge Pump Off, AD1 High or Low,
DATA and CLK High
V
CC
= 5V
q
17
30
A
V
CC
= 3.3V
q
14
30
A
V
CC
= 2.7V
q
11
30
A
OUT0 or OUT1 High
(Command Byte XXXXXX01 or XXXXXX10)
q
200
300
A
Both Outputs High (Command Byte XXXXXX11)
q
250
500
A
R
DS(ON)
Power Switch On Resistance
V
CC
= 2.7V, I
OUT
= 300mA
0.55
V
CC
= 3.3V, I
OUT
= 300mA
0.46
0.7
V
CC
= 5V, I
OUT
= 300mA
0.40
0.6
V
UVLO
Undervoltage Lockout
Falling Edge (Note 2)
q
1.5
2.0
2.5
V
t
POR
Power-On Reset Delay Time
V
CC
= 2.7V (Note 3)
300
1000
s
V
CC
= 5.5V
300
1000
s
f
OSC
Charge Pump Oscillator Frequency
300
kHz
(Note 3)
T
A
= 25
C, V
CC
= SW0D = 5V unless otherwise noted.
ORDER PART
NUMBER
S8 PART MARKING
PACKAGE/ORDER I
N
FOR
M
ATIO
N
W
U
U
Consult factory for Military grade parts.
ORDER PART
NUMBER
MS8 PART MARKING
LTDZ
T
JMAX
= 110
C,
JA
= 110
C/ W
1
2
3
4
8
7
6
5
TOP VIEW
V
CC
OUT1
DATA
CLK
SW0D
OUT0
AD1
GND
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
SW0D
OUT0
AD1
GND
8
7
6
5
V
CC
OUT1
DATA
CLK
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 110
C,
JA
= 150
C/ W
1710
1710I
LTC1710CS8
LTC1710IS8
LTC1710CMS8
3
LTC1710
ELECTRICAL CHARACTERISTICS
T
A
= 25
C, V
CC
= SW0D = 5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
ON
Output Turn-On Time
V
CC
= 2.7V (From ON (Note 6) to V
OUT
= 90% V
CC
)
200
s
(100
/1
F Load)
V
CC
= 5.5V (From ON (Note 6) to V
OUT
= 90% V
CC
)
160
s
t
OFF
Output Turn-Off Time
V
CC
= 2.7V (From OFF (Note 7) to V
OUT
= 10% V
CC
)
250
s
(100
/1
F Load)
V
CC
= 5.5V (From OFF (Note 7) to V
OUT
= 10% V
CC
)
250
s
V
IL
DATA/CLK Input Low Voltage
V
CC
= 2.7V to 5.5V
q
0.6
V
AD1 Input Low Voltage
V
CC
= 2.7V to 5.5V
q
0.2
V
V
IH
DATA/CLK High Voltage
V
CC
= 2.7V to 5.5V
q
1.4
V
AD1 Input High Voltage
V
CC
= 2.7V to 5.5V
q
V
CC
0.2
V
V
OL
Data Output Low Voltage
V
CC
= 2.7V to 5.5V, I
PULL-UP
= 350
A
q
0.18
0.4
V
C
IN
Input Capacitance (DATA, CLK, AD1)
5
pF
I
IN
Input Leakage Current (DATA, CLK)
q
1
A
Input Leakage Current (AD1)
q
250
nA
SMBus Related Specifications (Note 5)
f
SMB
SMBus Operating Frequency
10
100
kHz
t
BUF
Bus Free Time Between
4.7
s
Stop and Start
t
SU:STA
Start Condition Setup Time
4.7
s
t
HD:STA
Start Condition Hold Time
4.0
s
t
SU:STO
Stop Condition Setup Time
4.0
s
t
HD: DAT
Data Hold Time
300
ns
t
SU:DAT
Data Setup Time
250
ns
t
LOW
Clock Low Period
4.7
s
t
HIGH
Clock High Period
4.0
50
s
t
f
Clock/Data Fall Time
300
ns
t
r
Clock/Data Rise Time
1000
ns
I
PULL-UP
Current Through External Pull-Up
V
CC
= 2.7V to 5.5V
100
350
A
Resistor on DATA Pin
(Open-Drain Data Pull-Down Current Capacity)
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Approximately 3% hysteresis is provided to ensure stable operation
and eliminate false triggering by minor V
CC
glitches.
Note 3: Measured from V
CC
> V
UVLO
to SMBus ready for DATA input.
Note 4: The oscillator frequency is not tested directly but is inferred from
turn-on time.
Note 5: SMBus timing specifications are guaranteed but not tested.
Note 6: ON is enabled upon receiving the Stop condition from the SMBus
master.
Note 7: OFF is enabled upon receiving the Stop condition from the SMBus
master.
4
LTC1710
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
TEMPERATURE (
C)
50
STANDBY CURRENT (
A)
10
100
1710 G01
0
0
50
20
30
40
50
V
CC
= 3.3V
V
CC
= 5V
V
CC
= 2.7V
Standby Current vs Temperature
Switch R
DS(ON)
vs Temperature
(SO-8 Package)
TEMPERATURE (
C)
0
SWITCH R
DS(ON)
(
)
0.1
0.3
0.4
0.5
1.0
0.7
50
0
50
1710 G04
0.2
0.8
0.9
0.6
100
V
CC
= 2.7V
V
CC
= 3.3V
V
CC
= 5V
I
OUT
= 300mA
SUPPLY VOLTAGE (V)
0
0
SUPPLY CURRENT (
A)
100
200
300
400
500
2
4
1710 G03
6
8
BOTH SW ON
SW1 ON
T
A
= 25
C
SW0 ON
Supply Current (I
Q
)
vs Supply Voltage
TEMPERATURE (
C)
DATA ACK V
OL
(mV)
200
300
100
1710 G06
100
0
50
0
50
400
I
PULL-UP
= 350
A
TEMPERATURE (
C)
50
SUPPLY CURRENT (
A)
100
100
1710 G02
0
0
50
200
300
400
500
BOTH SW ON
SW1 ON
V
CC
= 5V
SW0 ON
Supply Current (I
Q
)
vs Temperature
Switch R
DS(ON)
vs Temperature
(MSOP Package)
TEMPERATURE (
C)
0
SWITCH R
DS(ON)
(
)
0.6
0.8
1.0
80
1710 G05
0.4
0.2
0.5
0.7
0.9
0.3
0.1
0
20
40
60
100
V
CC
= 2.7V
V
CC
= 5V
V
CC
= 3.3V
I
OUT
= 300mA
Data ACK V
OL
vs Temperature
PI
N
FU
N
CTIO
N
S
U
U
U
SW0D (Pin 1): Drain Supply of Switch 0. User-program-
mable from 0V to V
CC
.
OUT0 (Pin 2): Source Output of Switch 0. Maximum load
of 300mA; controlled by LSB of command byte.
AD1 (Pin 3): Three-State Programmable Address Pin.
Must be connected directly to V
CC
, GND or V
CC
/2 (using
two resistors
1M). Do not float this pin.
GND (Pin 4): Ground Connection.
CLK (Pin 5): Serial Clock Interface. Must be pulled high to
V
CC
with external resistor. The pull-up current must be
limited to 350
A.
DATA (Pin 6): Open-Drain Connected Serial Data Inter-
face. Must be pulled high to V
CC
with external resistor. The
pull-up current must be limited to 350
A.
OUT1 (Pin 7): Source Output of Switch 1. Maximum load
of 300mA; controlled by 2nd LSB of command byte.
V
CC
(Pin 8): Input Supply Voltage. Operating range from
2.7V to 5.5V.
5
LTC1710
BLOCK DIAGRA
W
V
CC
V
CC
OUT1
7
1
2
SW0D
OUT0
4
GND
1710 BD
UNDERVOLTAGE
LOCKOUT
POWER-ON
RESET
2V
V
CC
ACK
A
B
OUTPUT
LATCHES
SHIFT
REGISTER
ADDRESS
DECODER
COUNTER
INPUT
BUFFERS
THERMAL
SHUTDOWN
REGULATED
CHARGE
PUMPS
ADDRESS
COMPARATOR
LOGIC
START
AND
STOP
DETECTORS
3
AD1
5
CLK
6
8
DATA
TI I G DIAGRA
U
W
W
CLK
DATA
START
STOP
1710 TD
t
SU:STO
t
LOW
t
HIGH
t
HD:DAT
t
SU:DAT
t
HD:STA
t
SU:STA
t
f
t
r
OPERATIO
U
SMBus Operation
SMBus is a serial bus interface that uses only two bus lines,
DATA and CLK, to control low power peripheral devices in
portable equipment. It consists of masters, also known as
hosts, and slave devices. The master of the SMBus is
always the one to initiate communications to the slave
devices by varying the status of the DATA and CLK lines.
The SMBus specification establishes a set of protocols that
devices on the bus must follow for communications.
The protocol that the LTC1710 uses is the Send Byte Pro-
tocol. In this protocol, the master first sends out a Start
signal by switching the DATA line from high to low while
CLK is high. (Because there may be more than one master
on the same bus, an arbitration process takes place if two
masters attempt to take control of the DATA line simulta-
neously; the first master that outputs a one while the other
master is zero loses the arbitration and becomes a slave
itself.) Upon detecting this Start signal, all slave devices on
the bus wake up and prepare to shift in the next byte of data.
6
LTC1710
OPERATIO
U
The master then sends out the first byte. The first seven
bits of this byte consist of the address of the device that the
master wishes to communicate with. The last bit indicates
whether the command will be a read (logic one) or write
(logic zero). Because the LTC1710 is a slave device that
can only be written to by a master, it will ignore the ensuing
commands of the master if it wants to read from the
LTC1710, even if the address sent by the master matches
that of the LTC1710. After reception of the first byte, the
slave device (LTC1710) with the matching address then
acknowledges the master by pulling the DATA line low
before the next rising clock edge.
By now all other nonmatching slave devices will have gone
back to their original standby states to wait for the next
Start signal. Meanwhile, upon receiving the acknowledge
from the matching slave, the master then sends out the
command byte (see Table 1).
Table 1. Switch Control Table
COMMAND
XXXXXX00
XXXXXX01
XXXXXX10
XXXXXX11
Switch 0
SW0 Off
SW0 On
SW0 Off
SW0 On
Switch 1
SW1 Off
SW1 Off
SW1 On
SW1 On
After receiving the command byte, the slave device
(LTC1710) needs to acknowledge the master again by
pulling the DATA line low on the following clock cycle. The
master then ends this Send Byte Protocol by sending the
Stop signal, which is a transition from low to high on the
DATA line while the CLK line is high. Valid data is shifted
into the output latch on the last acknowledge signal; the
output switch will not turn on, however, until the Stop
signal is detected. This double buffering feature of the
output latch allows the user to "daisy-chain" multiple
SMBus devices such that their outputs are synchronously
executed on the Stop signal despite the fact that valid data
were loaded into their output latches at different times. An
example is shown in Figure 1. If somehow either the Start
or the Stop signal is detected in the middle of a byte, the
slave device (LTC1710) will regard this as an error and
reject all previous data.
Address
The LTC1710 has an address of 10110XX; the five MSBs
are hardwired, but the two LSBs are programmable by the
user with the help of a three-state address pin. Refer to
Table 2 for the pin configurations and their corresponding
addresses.
Table 2. Address Pin Truth Table
AD1
ADDRESS
GND
1011000
V
CC
/2
1011001
V
CC
1011010
To conserve standby current, it is preferable to tie the
address pins to either V
CC
or GND. If three LTC1710s are
needed, then the address pin can be tied to the third state
of V
CC
/2 by using two equal value resistors (
1M), see
Figure 2.
CLK
DATA
ACK
1710 TA03
1
(SW0
ON)
1
(SW1
ON)
0
0
0
0
0
0
0
0
1
1
0
1
START
0
(PROGRAMMABLE)
ACK
0
(WRITE)
STOP
ADDRESS BYTE
COMMAND BYTE
Figure 2. The LTC1710 Programmed with Address 1011001
START ADDR1
ADDR2
COMMAND
COMMAND
A
START
START
A
A
A
A
A
ADDR3
COMMAND
EXECUTION OF DATA STORED IN
OUTPUT LATCH OF DEVICES WITH
ADDR1, ADDR2 AND ADDR3
STOP
1710 F01
Figure 1. Daisy-Chain Example
5
3
6
4
1
2
1M
5V
8
7
1710 F02
DATA
CLK
AD1
SW0D
OUT0
V
CC
LTC1710
OUT1
GND
LOAD 1
LOAD 2
1M
Example of Send Byte Protocol to Slave Address 1011000 Turning SW0 and SW1 On
7
LTC1710
OPERATIO
U
until about 300
s after V
CC
crosses the undervoltage
lockout threshold (typically 2V). The circuit includes some
hysteresis and delay to avoid nuisance resets. Once opera-
tion begins, V
CC
must drop below the threshold for at least
100
s to trigger another POR sequence.
Input Threshold
Anticipating the trend of lower and lower supply voltages,
the SMBus is specified with a V
IH
of 1.4V and a V
IL
of 0.6V.
While some SMBus parts may violate this stringent SMBus
specification by specifying a higher V
IH
value for a corre-
sponding higher input supply voltage, the LTC1710 meets
and maintains the constant SMBus input threshold speci-
fication throughout the entire supply voltage range of 2.7V
to 5.5V.
Thermal Shutdown
In the unlikely event that either power switch overheats, a
thermal shutdown circuit, which is placed closely to the
two switches, will activate and turn off the gate drives to
both switches. The thermal shutdown circuit has a thresh-
old of 120
C with a 15
C hysteresis.
Figure 3. Low Dropout Regulator Switching a 3.3V/300mA Supply
Figure 4. The LTC1710 Switching Two Different Voltage Loads
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Charge Pump
To fully enhance the internal N-channel power switches,
an internal charge pump is used to boost the gate drive to
a maximum of 6V above V
CC
. The reason for the maximum
charge pump output voltage limit is to protect the internal
switches from excessive gate overdrive. A feedback net-
work is used to limit the charge pump output once it is 6V
above V
CC
. To prevent the power switches from turning on
too fast, an internal current source is placed between the
output of the charge pump and the gate of the power
switch to control the ramp rate.
Since the charge pumps are driving just the gates of the
internal switches, only a small amount of current is
required. Therefore, all the charge pump capacitors are
integrated onboard. The drain of switch 1 is internally
connected to V
CC
, however, the drain of switch 0 is user
controlled through Pin 1. In other words, SMBus devices
using different power supply voltages can be simulta-
neously switched by the same LTC1710.
Power-On Reset and Undervoltage Lockout
The LTC1710 starts up with both gate drives low. An
internal power-on reset (POR) signal inhibits operation
TYPICAL APPLICATIO
N
S
U
The LTC1710, when used with the LT
1521-3.3, can
switch a regulated 3.3V/300mA supply to a load (Figure 3).
Also, with the help of the LT1304-5, the LTC1710 can be
used to make a boost switching regulator with output
disconnect and a low standby current of 22
A (Figure 5).
8
1
2
10
F
10
F
7
5
6
FROM SMBus
3
PROGRAMMABLE
4
1710 F04
V
CC
SW0D
5V
3.3V
CLK
DATA
OUT0
LTC1710
OUT1
AD1
GND
3.3V
LOAD
5V
LOAD
8
7
1
10
F
1
F
2
5
6
8
5
1
2
FROM SMBus
3
PROGRAMMABLE
4
1710 F03
V
CC
SW0D
5V
CLK
DATA
SWITCHED
3.3V
OUT1
LTC1710
V
IN
SHDN
V
OUT
SENSE
LT1521-3.3
OUT0
AD1
GND
1.5
F
3.3V
8
LTC1710
1710f LT/TP 0998 4K PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1998
TYPICAL APPLICATIO
N
S
U
8
1
2
10
F
7
5
6
FROM SMBus
3
PROGRAMMABLE
4
1710 F05
V
CC
SW0D
3.3V
CLK
DATA
OUT0
LTC1710
OUT1
AD1
GND
3
4
8
100k
LBO
2
1
5
7
V
IN
SW
22
H*
2200
F
5V
200mA
1N5817
SHDN
SHUTDOWN
GND
SENSE
LT1304-5
LBO
LBI
*SUMIDA CD54-220
+
100
F
+
499k
604k
3.3V
LOAD
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear-tech.com
PART NUMBER
DESCRIPTION
COMMENTS
LTC1304
Micropower DC/DC Converter
Low-Battery Detector Active in Shutdown
LTC1470/LTC1471
Single and Dual PCMCIA Protected 3.3V/5V V
CC
Switches
Current Limit
LTC1473
Dual PowerPath
TM
Switch Matrix
Current Limit with Timer
LTC1623
SMBus Dual High Side Switch Controller
Uses External Switches, Two Three-State Address Pins
PowerPath is a trademark of Linear Technology Corporation.
RELATED PARTS
Figure 5. Switching Regulator with Low-Battery Detect Using 22
A of Standby Current
Dimensions in inches (millimeters), unless otherwise noted.
PACKAGE DESCRIPTIO
N
U
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
MSOP (MS8) 1197
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0.021
0.006
(0.53
0.015)
0
6
TYP
SEATING
PLANE
0.007
(0.18)
0.040
0.006
(1.02
0.15)
0.012
(0.30)
REF
0.006
0.004
(0.15
0.102)
0.034
0.004
(0.86
0.102)
0.0256
(0.65)
TYP
1
2
3
4
0.192
0.004
(4.88
0.10)
8
7 6
5
0.118
0.004*
(3.00
0.102)
0.118
0.004**
(3.00
0.102)
1
2
3
4
0.150 0.157**
(3.810 3.988)
8
7
6
5
0.189 0.197*
(4.801 5.004)
0.228 0.244
(5.791 6.197)
0.016 0.050
0.406 1.270
0.010 0.020
(0.254 0.508)
45
0
8
TYP
0.008 0.010
(0.203 0.254)
SO8 0996
0.053 0.069
(1.346 1.752)
0.014 0.019
(0.355 0.483)
0.004 0.010
(0.101 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
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