1799f.pm6
LTC1799
1
, LTC and LT are registered trademarks of Linear Technology Corporation.
s
One External Resistor Sets the Frequency
s
Fast Start-Up Time: < 1ms
s
1kHz to 33MHz Frequency Range
s
Low Profile (1mm) ThinSOT
TM
Package
s
Frequency Error
1.5% 5kHz to 20MHz
(T
A
= 25
C)
s
Frequency Error
2% 5kHz to 20MHz
(T
A
= 0
C to 70
C)
s
40ppm/
C Temperature Stability
s
0.05%/V Supply Stability
s
50%
1% Duty Cycle 1kHz to 2MHz
s
50%
5% Duty Cycle 2MHz to 20MHz
s
1mA Typical Supply Current
s
100
CMOS Output Driver
s
Operates from a Single 2.7V to 5.5V Supply
1kHz to 33MHz
Resistor Set SOT-23 Oscillator
s
Low Cost Precision Oscillator
s
Charge Pump Driver
s
Switching Power Supply Clock Reference
s
Clocking Switched Capacitor Filters
s
Fixed Crystal Oscillator Replacement
s
Ceramic Oscillator Replacement
s
Small Footprint Replacement for Econ Oscillators
The LTC
1799 is a precision oscillator that is easy to use
and occupies very little PC board space. The oscillator
frequency is programmed by a single external resistor
(R
SET
). The LTC1799 has been designed for high accuracy
operation (
1.5% frequency error) without the need for
external trim components.
The LTC1799 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/fall
times and rail-to-rail switching. The frequency-setting
resistor can vary from 3k to 1M to select a master
oscillator frequency between 100kHz and 33MHz (5V
supply). The three-state DIV input determines whether the
master clock is divided by 1, 10 or 100 before driving the
output, providing three frequency ranges spanning 1kHz
to 33MHz (5V supply). The LTC1799 features a proprietary
feedback loop that linearizes the relationship between
R
SET
and frequency, eliminating the need for tables to
calculate frequency. The oscillator can be easily pro-
grammed using the simple formula outlined below:
f
MHz
k
N R
N
Open
OSC
SET
=
=
=
=
=
+
10
10
100
10
1
,
,
,
,
DIV Pin
V
DIV Pin
DIV Pin
GND
Basic Connection
Typical Distribution of Frequency Error,
T
A
= 25
C (5kHz
f
OSC
20MHz, V
+
= 5V)
SOT-23 Actual Size
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
UNITS (%)
25
20
15
10
5
0
1.25
0.75
0.25 0 0.25
0.75
1.25
FREQUENCY ERROR (%)
1799 TA02
V
+
1
2
3
5
1kHz
f
OSC
33MHz
5V
5V
3k
R
SET
1M
0.1
F
1799 TA01
4
GND
LTC1799
SET
OUT
DIV
OPEN
10
100
1
ThinSOT is a trademark of Linear Technology Corporation.
LTC1799
2
Supply Voltage (V
+
) to GND ........................ 0.3V to 6V
DIV to GND .................................... 0.3V to (V
+
+ 0.3V)
SET to GND ................................... 0.3V to (V
+
+ 0.3V)
Operating Temperature Range
LTC1799C ............................................... 0
C to 70
C
LTC1799I ............................................ 40
C to 85
C
Storage Temperature Range ................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
ORDER PART NUMBER
T
JMAX
= 125
C,
JA
= 256
C/W
LTC1799CS5
LTC1799IS5
(Note 1)
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
+
= 2.7V to 5.5V, R
L
=5k, C
L
= 5pF, unless otherwise noted.
All voltages are with respect to GND.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f
Frequency Accuracy
V
+
= 5V
5kHz
f
20MHz
0.5
1.5
%
5kHz
f
20MHz, LTC1799C
q
2
%
5kHz
f
20MHz, LTC1799I
q
2.5
%
(Notes 2, 3)
1kHz
f
5kHz
2.5
%
20MHz
f
33MHz
2.5
%
V
+
= 3V
5kHz
f
10MHz
0.5
1.5
%
5kHz
f
10MHz, LTC1799C
q
2
%
5kHz
f
10MHz, LTC1799I
q
2.5
%
1kHz
f
5kHz
2.5
%
10MHz
f
20MHz
2.5
%
R
SET
Frequency-Setting Resistor Range
f
< 1.5%
V
+
= 5V
5
200
k
V
+
= 3V
10
200
k
f
MAX
Maximum Frequency
f
< 2.5%, Pin 4= 0V
V
+
= 5V
33
MHz
V
+
= 3V
20
MHz
f
MIN
Minimum Frequency
f
< 2.5%, Pin 4= V
+
1
kHz
f/
T
Freq Drift Over Temp (Note 3)
R
SET
= 31.6k
q
0.004
%/
C
f/
V
Freq Drift Over Supply (Note 3)
V
+
= 3V to 5V, R
SET
= 31.6k
q
0.05
0.1
%/V
Timing Jitter
Pin 4 = V
+
0.06
%
(Note 4)
Pin 4 = Open
0.13
%
Pin 4 = 0V
0.4
%
Long-Term Stability of Output Frequency
300
ppm/
kHr
Duty Cycle (Note 7)
Pin 4 = V
+
or Open (DIV Either by 100 or 10)
q
49
50
51
%
Pin 4 = 0V (DIV by 1), R
SET
= 5k to 200k
q
45
50
55
%
V
+
Operating Supply Range
q
2.7
5.5
V
I
S
Power Supply Current
R
SET
= 200k, Pin 4 = V
+
, R
L
=
V
+
= 5V
q
0.7
1.1
mA
R
SET
= 10k, Pin 4 = 0V, R
L
=
V
+
= 5V
q
2.4
mA
V
+
= 3V
q
2
mA
V
IH
High Level DIV Input Voltage
q
V
+
0.4
V
V
IL
Low Level DIV Input Voltage
q
0.5
V
I
DIV
DIV Input Current (Note 5)
Pin 4 = V
+
V
+
= 5V
q
5
8
A
Pin 4 = 0V
V
+
= 5V
q
8
5
A
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC SOT-23
1
2
3
V
+
GND
SET
5
4
OUT
DIV
S5 PART MARKING
LTND
LTNE
Consult LTC Marketing for parts specified with wider operating temperature
ranges.
ABSOLUTE AXI U RATI GS
W
W
W
U
PACKAGE/ORDER I FOR ATIO
U
U
W
ELECTRICAL CHARACTERISTICS
LTC1799
3
V
OH
High Level Output Voltage (Note 5)
V
+
= 5V
I
OH
= 1mA
q
4.8
4.95
V
I
OH
= 4mA
q
4.5
4.8
V
V
+
= 3V
I
OH
= 1mA
q
2.7
2.9
V
I
OH
= 4mA
q
2.2
2.6
V
V
OL
Low Level Output Voltage (Note 5)
V
+
= 5V
I
OL
= 1mA
q
0.05
0.15
V
I
OL
= 4mA
q
0.2
0.4
V
V
+
= 3V
I
OL
= 1mA
q
0.1
0.3
V
I
OL
= 4mA
q
0.4
0.7
V
t
r
OUT Rise Time
V
+
= 5V
Pin 4 = V
+
or Floating, R
L
=
14
ns
(Note 6)
Pin 4 = 0V, R
L
=
7
ns
V
+
= 3V
Pin 4 = V
+
or Floating, R
L
=
19
ns
Pin 4 = 0V, R
L
=
11
ns
t
f
OUT Fall Time
V
+
= 5V
Pin 4 = V
+
or Floating, R
L
=
13
ns
(Note 6)
Pin 4 = 0V, R
L
=
6
ns
V
+
= 3V
Pin 4 = V
+
or Floating, R
L
=
19
ns
Pin 4 = 0V, R
L
=
10
ns
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
+
= 2.7V to 5.5V, R
L
=5k, C
L
= 5pF, Pin 4 = V
+
unless otherwise noted.
All voltages are with respect to GND.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Frequencies near 100kHz and 1MHz may be generated using two
different values of R
SET
(see the Table 1 in the Applications Information
section). For these frequencies, the error is specified under the following
assumption: 10k < R
SET
100k. The frequency accuracy for f
OSC
= 20MHz
is guaranteed by design and test correlation.
Note 3: Frequency accuracy is defined as the deviation from the
f
OSC
equation.
Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specification is based on characterization and
is not 100% tested.
Note 5: To conform with the Logic IC Standard convention, current out of
a pin is arbitrarily given as a negative value.
Note 6: Output rise and fall times are measured between the 10% and
90% power supply levels. These specifications are based on
characterization.
Note 7: Guaranteed by 5V test.
ELECTRICAL CHARACTERISTICS
LTC1799
4
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
Peak-to-Peak Jitter vs Frequency
Supply Current
vs Output Frequency
OUTPUT FREQUENCY, f
OUT
(Hz)
0.2
JITTER (%)
0.4
0.7
0.1
0.3
0.5
0.6
1k
100k
1M
10M
100M
1799 G03
0
10k
100
10
1
OUTPUT FREQUENCY, f
OUT
(Hz)
1.0
SUPPLY CURRENT (mA)
1.5
2.5
3.0
4.0
4.5
1k
100k
1M
100M
1799 G04
0.5
10k
10M
3.5
2.0
0
100 (5V)
10 (5V)
1 (5V)
1 (3V)
10 (3V)
100 (3V)
T
A
= 25
C
C
L
= 5pF
R
L
= 1M
Output Resistance
vs Supply Voltage
SUPPLY VOLTAGE (V)
2.5
3.0
40
OUTPUT RESISTANCE (
)
80
140
3.5
4.5
5.0
1799 G05
60
120
100
4.0
5.5
6.0
OUTPUT SINKING CURRENT
OUTPUT SOURCING CURRENT
T
A
= 25
C
LTC1799 Output Operating at
20MHz, V
S
= 5V
1V/DIV
12.5ns/DIV
1799 G06
1V/DIV
25ns/DIV
1799 G07
V
+
= 5V, R
SET
= 5k, C
L
= 10pF
V
+
= 3V, R
SET
= 10k, C
L
= 10pF
LTC1799 Output Operating at
10MHz, V
S
= 3V
Frequency Variation
vs R
SET
4
3
2
1
0
1
2
3
4
1
10
100
1000
1799 G01
R
SET
(k
)
V
ARIA
TION (%)
T
A
= 25
C
GUARANTEED LIMITS APPLY
OVER 5k TO 200k RANGE
TYPICAL
HIGH
TYPICAL
LOW
Frequency Variation
Over Temperature
TEMPERATURE (
C)
40
VARIATION (%)
0.50
0.25
0.75
1.00
20
60
1799 G02
0
0.50
0.25
20
0
40
80
0.75
1.00
R
SET
= 31.6k
1 OR
10 OR
100
TYPICAL
HIGH
TYPICAL
LOW
LTC1799
5
U
U
U
PI FU CTIO S
V
+
(Pin 1): Voltage Supply (2.7V
V
+
5.5V). This supply
must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a 0.1
F capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane for
best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V
+
deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC1799 to approximately 1.13V below the V
+
voltage. For best performance, use a precision metal film
resistor with a value between 10k and 200k and limit the
capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the
1 setting, the highest frequency range.
Floating Pin 4 divides the master oscillator by 10. Pin 4
should be tied to V
+
for the
100 setting, the lowest
frequency range. To detect a floating DIV pin, the LTC1799
attempts to pull the pin toward midsupply. This is realized
with two internal current sources, one tied to V
+
and Pin
4 and the other one tied to ground and Pin 4. Therefore,
driving the DIV pin high requires sourcing approximately
5
A. Likewise, driving DIV low requires sinking 5
A.
When Pin 4 is floated, preferably it should be bypassed by
a 1nF capacitor to ground or it should be surrounded by a
ground shield to prevent excessive coupling from other
PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5k
and/or 10pF loads. Larger loads may cause inaccuracies
due to supply bounce at high frequencies. Transients will
not cause latchup if the current into/out of the OUT pin is
limited to 50mA.
BLOCK DIAGRA
W
+
+
1
3
GAIN = 1
V
+
V
BIAS
I
RES
I
RES
R
SET
SET
GND
MASTER OSCILLATOR
PROGRAMMABLE
DIVIDER
(
1, 10 OR 100)
V
RES
= 1.13V
25%
(V
+
V
SET
)
I
RES
(V
+
V
SET
)
MO
= 100MHz k
THREE-STATE
INPUT DETECT
GND
V
+
5
A
1799 BD
5
A
OUT
DIVIDER
SELECT
5
DIV
4
2
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