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LTC1992-5
1
19925i
1992-5 TA01b
V
IN
(2V/DIV)
10
s/DIV
+2V
2V
+5V
5V
(5V/DIV)
OUT
OUT
+
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Final Electrical Specifications
s
Differential Driver/Receiver
s
Differential Amplification
s
Single-Ended to Differential Conversion
s
Level Shifting
s
Differential Inputs
s
Differential Outputs
s
Fixed Gain of 5
0.3% (Max) Gain Error
from 40
C to 85
C
s
C
LOAD
Stable from 0 to 10,000pF
s
Adjustable Output Common Mode Voltage
s
Output Common Mode Level Independent
of Input Common Mode Level
s
Low Supply Current 1.2mA (Max over Temperature)
s
High Output Current 10mA (Min over Temperature)
s
Rail-to-Rail Output Swing
s
Specified on a Single 2.7V to
5V Supply
s
DC Offset Voltage <2.5mV (Max)
s
8-Lead MSOP Package
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
Gain of 5 Fully Differential
Input/Output Amplifier/Driver
September 2003
, LTC and LT are registered trademarks of Linear Technology Corporation.
+
+
+5V
+5V
LTC1992-5
3
6
V
OCM
V
MID
5V
5V
+2V
2V
5V
+5V
V
IN
1992-5 TA01a
4
5
2
7
8
1
30k
30k
150k
150k
+V
S
V
S
Single-Ended to Differential Conversion
The LTC
1992-5 is a fully differential amplifier with a fixed
gain of 5. The LTC1992-5 has a separate internal common
mode feedback path for better common mode noise
rejection, outstanding output gain and phase balancing
and reduced second order harmonics. The V
OCM
pin sets
the output common mode level independent of the input
common mode level. This feature makes level shifting of
signals easy. The integrated precision gain setting resis-
tors ensure gain accuracy without external components.
The differential inputs operate with signals ranging from
rail-to-rail with a common mode level from the negative
supply up to 1.3V from the positive supply. The differential
input DC offset is typically 250
V. The rail-to-rail outputs
sink and source 10mA. The LTC1992-5 is stable for all
capacitive loads up to 10,000pF.
The LTC1992-5 can be used in single-supply applications
with supply voltages as low as 2.7V. It can also be used
with dual supplies up to
5V. The LTC1992-5 is available
in an 8 pin MSOP package.
LTC1992-5
2
19925i
LTC1992-5CMS8
LTC1992-5IMS8
LTC1992-5HMS8
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
G
DIFF
Differential Gain
5
5
Differential Gain Error
q
0.1
0.3
0.1
0.35
%
Differential Gain Nonlinearity
50
50
ppm
Differential Gain Temperature Coefficient
q
3.5
3.5
ppm/
C
V
OSDIFF
Differential Offset Voltage
V
S
= 2.7V
q
0.25
2.5
0.25
4
mV
(Amplifier Input Referred)(Note 7)
V
S
= 5V
q
0.25
2.5
0.25
4
mV
V
S
=
5V
q
0.25
2.5
0.25
4
mV
V
OSDIFF
/
T Differential Offset Voltage Drift
V
S
= 2.7V
q
10
10
V/
C
(Amplifier Input Referred)(Note 7)
V
S
= 5V
q
10
10
V/
C
V
S
=
5V
q
10
10
V/
C
e
n
Input Referred Noise Voltage Density
f = 1kHz
45
45
nV/
Hz
R
IN
Input Resistance, Single-Ended +IN, IN Pins
q
22.5
30
37.5
22
30
38
k
V
INCMR
Input Signal Common Mode Range
V
S
= 5V
0.1V to 3.9V
0.1V to 3.9V
V
CMRR
Common Mode Rejection Ratio
V
INCM
= 0.1V to 3.7V
q
55
60
55
60
dB
(Amplifier Input Referred)(Note 7)
PSRR
Power Supply Rejection Ratio
V
S
= 2.7V to
5V
q
75
80
72
80
dB
(Amplifier Input Referred)(Note 7)
G
CM
Common Mode Gain(V
OUTCM
/V
OCM
)
1
1
Common Mode Gain Error
q
0.1
0.3
0.1
0.35
%
Output Balance Error(
V
OUTCM
/(V
OUTDIFF
)
V
OUTDIFF
= 2V to +2V
q
85
60
85
60
dB
V
OSCM
Common Mode Offset Voltage
V
S
= 2.7V
q
0.5
12
0.5
15
mV
(V
OUTCM
V
OCM
)
V
S
= 5V
q
1
15
1
17
mV
V
S
=
5V
q
2
18
2
20
mV
V
OSCM
/
T Common Mode Offset Voltage Drift
V
S
= 2.7V
q
10
10
V/
C
V
S
= 5V
q
10
10
V/
C
V
S
=
5V
q
10
10
V/
C
Total Supply Voltage (+V
S
to V
S
) .......................... 12V
Maximum Voltage on any Pin
........................... (V
S
0.3V)
V
PIN
(+V
S
+ 0.3V)
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range (Note 5)
LTC1992-5CMS8 .................................40
C to 85
C
LTC1992-5IMS8 ..................................40
C to 85
C
LTC1992-5HMS8 ...............................40
C to 125
C
Specified Temperature Range (Note 6)
LTC1992-5CMS8 .................................40
C to 85
C
LTC1992-5IMS8 ..................................40
C to 85
C
LTC1992-5HMS8 ...............................40
C to 125
C
Storage Temperature Range ................ 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
ORDER PART
NUMBER
T
JMAX
= 150
C,
JA
= 250
C/W
LTC1992-5CMS8
LTC1992-5IMS8
LTC1992-5HMS8
ABSOLUTE AXI U
RATI GS
W
W
W
U
PACKAGE/ORDER I FOR ATIO
U
U
W
(Note 1)
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. +V
S
= 5V, V
S
= 0V, V
INCM
= V
OUTCM
= V
OCM
= 2.5V, unless otherwise
noted. V
OCM
is the voltage on the V
OCM
pin. V
OUTCM
is defined as (V
+OUT
+ V
OUT
)/2. V
INCM
is defined as (V
+IN
+ V
IN
)/2. V
INDIFF
is
defined as (V
+IN
V
IN
). V
OUTDIFF
is defined as (V
+OUT
V
OUT
). Typical values are at T
A
= 25
C.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
1
2
3
4
IN
V
OCM
+V
S
+OUT
8
7
6
5
+IN
V
MID
V
S
OUT
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
+
+
MS8 PART MARKING
LTACK
LTACN
LTAJH
LTC1992-5
3
19925i
LTC1992-5CMS8
LTC1992-5IMS8
LTC1992-5HMS8
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
V
OUTCMR
Output Signal Common Mode Range
q
V
(Voltage Range for the V
OCM
Pin)
R
INVOCM
Input Resistance, V
OCM
Pin
500
500
M
I
BVOCM
Input Bias Current, V
OCM
Pin
V
S
= 2.7V to
5V
2
2
pA
V
MID
Voltage at the V
MID
Pin
q
2.44
2.50
2.56
2.43
2.50
2.57
V
V
OUT
Output Voltage, High
V
S
= 2.7V, Load = 10k
q
2.60
2.69
2.60
2.69
V
(Note 2)
V
S
= 2.7V, Load = 5mA
q
2.50
2.61
2.50
2.61
V
V
S
= 2.7V,Load = 10mA
q
2.29
2.52
2.29
2.52
V
Output Voltage, Low
V
S
= 2.7V, Load = 10k
q
0.02
0.10
0.02
0.10
V
(Note 2)
V
S
= 2.7V, Load = 5mA
q
0.10
0.25
0.10
0.25
V
V
S
= 2.7V, Load = 10mA
q
0.20
0.35
0.20
0.41
V
Output Voltage, High
V
S
= 5V, Load = 10k
q
4.90
4.99
4.90
4.99
V
(Note 2)
V
S
= 5V, Load = 5mA
q
4.85
4.90
4.80
4.90
V
V
S
= 5V, Load = 10mA
q
4.75
4.81
4.70
4.81
V
Output Voltage, Low
V
S
= 5V, Load = 10k
q
0.02
0.10
0.02
0.10
V
(Note 2)
V
S
= 5V, Load = 5mA
q
0.10
0.25
0.10
0.30
V
V
S
= 5V, Load = 10mA
q
0.20
0.35
0.20
0.42
V
Output Voltage, High
V
S
=
5V, Load = 10k
q
4.90
4.99
4.85
4.99
V
(Note 2)
V
S
=
5V, Load = 5mA
q
4.85
4.89
4.80
4.89
V
V
S
=
5V, Load = 10mA
q
4.65
4.80
4.60
4.80
V
Output Voltage, Low
V
S
=
5V, Load = 10k
q
4.98
4.90
4.98
4.85
V
(Note 2)
V
S
=
5V, Load = 5mA
q
4.90
4.75
4.90
4.75
V
V
S
=
5V, Load = 10mA
q
4.80
4.65
4.80
4.55
V
I
SC
Output Short-Circuit Current Sourcing
V
S
= 2.7V, V
OUT
= 1.35V
q
20
30
20
30
mA
(Notes 2,3)
V
S
= 5V, V
OUT
= 2.5V
q
20
30
20
30
mA
V
S
=
5V, V
OUT
= 0V
q
20
30
20
30
mA
Output Short-Circuit Current Sinking
V
S
= 2.7V, V
OUT
=1.35V
q
13
30
13
30
mA
(Notes 2,3)
V
S
= 5V, V
OUT
= 2.5V
q
13
30
13
30
mA
V
S
=
5V, V
OUT
= 0V
q
13
30
13
30
mA
SR
Slew Rate (Note 4)
q
0.35
1
0.35
1
V/
s
GBW
Gain-Bandwidth Product
f
TEST
= 180kHz
4
4
MHz
V
S
Supply Voltage Range
q
2.7
11
2.7
11
V
I
S
Supply Current
V
S
= 2.7V to 5V
0.65
1.0
0.65
1
mA
q
0.75
1.2
0.8
1.5
mA
V
S
=
5V
0.70
1.2
0.7
1.2
mA
q
0.80
1.5
0.9
1.8
mA
The
q
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. +V
S
= 5V, V
S
= 0V, V
INCM
= V
OUTCM
= V
OCM
= 2.5V, unless otherwise
noted. V
OCM
is the voltage on the V
OCM
pin. V
OUTCM
is defined as (V
+OUT
+ V
OUT
)/2. V
INCM
is defined as (V
+IN
+ V
IN
)/2. V
INDIFF
is
defined as (V
+IN
V
IN
). V
OUTDIFF
is defined as (V
+OUT
V
OUT
). Typical values are at T
A
= 25
C.
ELECTRICAL CHARACTERISTICS
(V
S
)+ 0.5V (+V
S
) 1.3V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Output load is connected to the midpoint of the +V
S
and V
S
potentials. Measurement is taken single-ended, one output loaded at a time.
Note 3: A heat sink may be required to keep the junction temperature below
the absolute maximum when the output is shorted indefinitely.
Note 4: Slew Rate is measured single-ended. The numbers listed are also
single-ended and the differential slew rate would double the listed numbers.
Note 5: The LTC1992-5CMS8, LTC1992-5IMS8 and LTC1992-5HMS8 are
guaranteed functional over the extended operating temperature range of
40
C to 125
C.
Note 6: The LTC1992-5CMS8 is guaranteed to meet the specified
performance limits over the 0
C to 70
C temperature range and designed,
characterized and expected to meet the specified performance from 40
C
to 85
C but is not tested or QA sampled at these temperatures. LTC1992-
5IMS8 is guaranteed to meet specified performance limits over the 40
C
to 85
C temperature range. The LTC1992-5HMS8 is guaranteed to meet
the specified performance limits over the 40
C to 125
C temperature
range.
Note 7: Differential Offset Voltage, Differential Offset Voltage Drift, CMRR
and PSRR are referred to the internal amplifier's input to allow for direct
comparison with discrete amplifiers. The LTC1992-5 is an inverting
topology with a gain of five. The output referred offset is six times the
amplifiers input offset.
(V
S
)+ 0.5V (+V
S
) 1.3V
LTC1992-5
4
19925i
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2003
LT/TP 0903 1K PRINTED IN USA
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IN, +IN (Pins 1,8): Inverting and Noninverting Inputs of
the Amplifier. These pins are connected to on-chip gain
setting resistors. The input resistors are nominally 30k.
V
OCM
(Pin 2): Output Common Mode Voltage Set Pin. The
voltage on this pin sets the output signal's common
voltage level. The output common mode level is set
independent of the input common mode level. This is a
high impedance input and must be connected to a known
and controlled voltage. It must never be left floating.
+V
S
, V
S
(Pins 3, 6): The +V
S
and V
S
power supply pins
should be bypassed with 0.1
F capacitors to an adequate
analog ground or ground plane. The bypass capacitors
U
U
U
PI FU CTIO S
BLOCK DIAGRA
W
+
+
+V
S
+V
S
IN
V
MID
+IN
V
S
+V
S
V
S
V
S
+OUT
OUT
V
OCM
200k
200k
30k
150k
30k
150k
4
5
2
6
1
3
7
8
1992-5 BD
should be located as closely as possible to the supply pins
+OUT, OUT (Pins 4,5): The Positive and Negative
Outputs of the Amplifier. These rail-to-rail outputs are
designed to drive capacitive loads up to 10,000 pF.
V
MID
(Pin 7): Mid-Supply Reference. This pin is connected
to an on-chip resistive voltage divider (two 200k
25%
resistors) to provide a mid-supply reference. This pro-
vides a convenient way to set the output common mode
voltage level at half-supply. If used for this purpose, the
pin should be bypassed with a 0.1
F capacitor to ground
and connected to V
OCM
(Pin 2). If this reference voltage is
not used, leave the pin floating.
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