1
LTC3406B-2
sn3406b2 3406b2fs
High Efficiency: Up to 96%
600mA Output Current at V
IN
= 3V
2.5V to 5.5V Input Voltage Range
2.25MHz Constant Frequency Operation
No Schottky Diode Required
Low Dropout Operation: 100% Duty Cycle
Low Quiescent Current: 350A
0.6V Reference Allows Low Output Voltages
Shutdown Mode Draws < 1A Supply Current
Current Mode Operation for Excellent Line and
Load Transient Response
Overtemperature Protected
Low Profile (1mm) SOT-23 Package
The LTC
3406B-2 is a high efficiency monolithic synchro-
nous buck regulator using a constant frequency, current
mode architecture. Supply current with no load is 350A,
dropping to <1A in shutdown. The 2.5V to 5.5V input
voltage range makes the LTC3406B-2 ideally suited for
single Li-Ion battery-powered applications. 100% duty
cycle capability provides low dropout operation, extend-
ing battery life in portable systems. PWM pulse skipping
mode operation provides very low output ripple voltage for
noise sensitive applications.
The switching frequency is internally set at 2.25MHz, allow-
ing the use of tiny surface mount inductors and capacitors.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
output voltages are easily supported with the 0.6V feedback
reference voltage. The LTC3406B-2 is available in a low pro-
file (1mm) SOT-23 package. Refer to LTC3406 for appli-
cations that require Burst Mode
operation.
Cellular Telephones
Personal Information Appliances
Wireless and DSL Modems
Digital Still Cameras
MP3 Players
Portable Instruments
2.25MHz, 600mA
Synchronous Step-Down
Regulator in ThinSOT
TM
, LTC and LT are registered trademarks of Linear Technology Corporation.
Burst Mode is a registered trademark of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
Protected by U.S. Patents, including 6580258, 5481178.
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
DESCRIPTIO
U
High Efficiency Step-Down Converter
Efficiency vs Load Current
V
IN
4.7F
CER
V
IN
2.7V
TO 5.5V
LTC3406B-2
RUN
2.2H*
3406B TA01a
SW
V
FB
GND
10F
CER
V
OUT
1.8V
600mA
22pF
1M
499k
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B TA01b
1
100
V
IN
= 2.7V
V
OUT
= 1.8V
T
A
= 25C
V
IN
= 3.6V
V
IN
= 4.2V
2
LTC3406B-2
sn3406b2 3406b2fs
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
VFB
Feedback Current
30
nA
V
FB
Regulated Feedback Voltage
(Note 4) T
A
= 25C
0.5880
0.6
0.6120
V
(Note 4) 0C T
A
85C
0.5865
0.6
0.6135
V
(Note 4) 40C T
A
85C
0.5850
0.6
0.6150
V
V
FB
Reference Voltage Line Regulation
V
IN
= 2.5V to 5.5V (Note 4)
0.04
0.4
%/V
V
OVL
Output Overvoltage Lockout
V
OVL
= V
OVL
V
FB
, LTC3406B
20
50
80
mV
I
PK
Peak Inductor Current
V
IN
= 3V, V
FB
= 0.5V or V
OUT
= 90%,
0.75
1
1.25
A
Duty Cycle < 35%
V
LOADREG
Output Voltage Load Regulation
0.5
%
V
IN
Input Voltage Range
2.5
5.5
V
I
S
Input DC Bias Current
(Note 5)
V
FB
= 0.5V or V
OUT
= 90%
350
500
A
Shutdown
V
RUN
= 0V, V
IN
= 4.2V
0.1
1
A
f
OSC
Oscillator Frequency
V
FB
= 0.6V or V
OUT
= 100%
1.8
2.25
2.7
MHz
V
FB
= 0V or V
OUT
= 0V
310
kHz
R
PFET
R
DS(ON)
of P-Channel FET
I
SW
= 100mA
0.4
0.5
R
NFET
R
DS(ON)
of N-Channel FET
I
SW
= 100mA
0.35
0.45
I
LSW
SW Leakage
V
RUN
= 0V, V
SW
= 0V or 5V, V
IN
= 5V
0.01
1
A
V
RUN
RUN Threshold
0.3
1
1.5
V
I
RUN
RUN Leakage Current
0.01
1
A
LTC3406B-2ES5
T
JMAX
= 125C,
JA
= 250C/ W,
JC
= 90C/ W
ORDER PART
NUMBER
Input Supply Voltage .................................. 0.3V to 6V
RUN, V
FB
Voltages ..................................... 0.3V to V
IN
SW Voltage (DC) ......................... 0.3V to (V
IN
+ 0.3V)
P-Channel Switch Source Current (DC) ............. 800mA
N-Channel Switch Sink Current (DC) ................. 800mA
Peak SW Sink and Source Current ........................ 1.3A
Operating Temperature Range (Note 2) .. 40C to 85C
Maximum Junction Temperature (Notes 3, 6) ..... 125C
Storage Temperature Range ................ 65C to 150C
Lead Temperature (Soldering, 10 sec)................. 300C
S5 PART MARKING
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LTAGH
ABSOLUTE AXI U RATI GS
W
W
W
U
PACKAGE/ORDER I FOR ATIO
U
U
W
(Note 1)
The
denotes specifications which apply over the full operating
temperature range, otherwise specifications are T
A
= 25C. V
IN
= 3.6V unless otherwise specified.
ELECTRICAL CHARACTERISTICS
RUN 1
GND 2
SW 3
5 V
FB
4 V
IN
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC3406B-2ES5 is guaranteed to meet performance
specifications from 0C to 70C. Specifications over the 40C to 85C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
LTC3406B-2ES5: T
J
= T
A
+ (P
D
)(250C/W)
Note 4: The LTC3406B-2ES5 is tested in a proprietary test mode that
connects V
FB
to the output of the error amplifier.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Note 6: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
3
LTC3406B-2
sn3406b2 3406b2fs
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
Efficiency vs Input Voltage
Efficiency vs Output Current
Efficiency vs Output Current
Efficiency vs Output Current
Reference Voltage vs
Temperature
Oscillator Frequency vs
Temperature
(From Figure 1a Except for the Resistive Divider Resistor Values)
TEMPERATURE (C)
50
REFERENCE VOLTAGE (V)
0.614
0.609
0.604
0.599
0.594
0.589
0.584
25
75
25
0
50
100
125
V
IN
= 3.6V
3406B G05
TEMPERATURE (C)
50
FREQUENCY (MHz)
2.55
2.40
2.25
2.10
1.95
25
75
25
0
50
100
125
V
IN
= 3.6V
3406B G06
INPUT VOLTAGE (V)
2
EFFICIENCY (%)
6
3406B G01
3
4
5
100
95
90
85
80
75
70
65
I
OUT
= 600mA
I
OUT
= 100mA
I
OUT
= 10mA
T
A
= 25C
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B G02
1
100
V
OUT
= 1.2V
T
A
= 25C
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B G03
1
100
V
OUT
= 1.5V
T
A
= 25C
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B G04
1
100
V
OUT
= 2.5V
T
A
= 25C
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
Oscillator Frequency vs
Supply Voltage
Output Voltage vs Load Current
R
DS(ON
) vs Input Voltage
SUPPLY VOLTAGE (V)
2
OSCILLATOR FREQUENCY (MHz)
2.70
2.55
2.40
2.25
2.10
1.95
1.80
3
4
5
6
3406B G07
T
A
= 25C
INPUT VOLTAGE (V)
1
0
0.4
0.5
0.7
4
6
3406B G09
0.3
0.2
2
3
5
7
0.1
0
0.6
R
DS(ON)
(
)
MAIN
SWITCH
SYNCHRONOUS
SWITCH
T
A
= 25C
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
500
200 300 400
600
800
100
1.844
1.834
1.824
1.814
1.804
1.794
1.784
1.774
3406B G08
900
700
V
IN
= 3.6V
T
A
= 25C
4
LTC3406B-2
sn3406b2 3406b2fs
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
(From Figure 1a Except for the Resistive Divider Resistor Values)
R
DS(ON)
vs Temperature
Dynamic Supply Current vs
Supply Voltage
Dynamic Supply Current vs
Temperature
Switch Leakage vs Temperature
Switch Leakage vs Input Voltage
Discontinuous Operation
TEMPERATURE (C)
50
0.4
0.5
0.7
25
75
3406B G10
0.3
0.2
25
0
50
100
125
0.1
0
0.6
R
DS(ON)
(
)
MAIN SWITCH
SYNCHRONOUS SWITCH
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.2V
TEMPERATURE (C)
50
SWITCH LEAKAGE (nA)
200
250
300
25
75
3406B G13
150
100
25
0
50
100
125
50
0
V
IN
= 5.5V
RUN = 0V
MAIN SWITCH
SYNCHRONOUS SWITCH
INPUT VOLTAGE (V)
0
0
SWITCH LEAKAGE (pA)
20
40
60
80
120
1
2
3
4
3406B G14
5
6
100
RUN = 0V
T
A
= 25C
SYNCHRONOUS
SWITCH
MAIN
SWITCH
SUPPLY VOLTAGE (V)
2
DYNAMIC SUPPLY CURRENT (
A)
6
3406B G11
3
4
5
2.5
3.5
4.5
5.5
450
430
410
390
370
350
330
310
290
270
250
V
OUT
= 1.8V
I
LOAD
= 0A
T
A
= 25C
TEMPERATURE (C)
50
390
370
350
330
310
290
270
250
3406B G12
0
50
100
125
DYNAMIC SUPPLY CURRENT (
A)
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 0A
SW
2V/DIV
V
OUT
10mV/DIV
AC COUPLED
I
L
100mA/DIV
1s/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 50mA
3406B G15
Start-Up from Shutdown
Load Step
Load Step
RUN
5V/DIV
V
OUT
1V/DIV
AC COUPLED
I
L
500mA/DIV
40s/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 600mA (LOAD: 3 RESISTOR)
3406B G16
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 0mA TO 600mA
3406B G17
V
OUT
100mV/DIV
AC COUPLED
I
LOAD
500mA/DIV
I
L
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 50mA TO 600mA
3406B G18
5
LTC3406B-2
sn3406b2 3406b2fs
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
(From Figure 1a Except for the Resistive Divider Resistor Values)
Load Step
Load Step
U
U
U
PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1A supply current. Do not leave RUN floating.
GND (Pin 2): Ground Pin.
SW (Pin 3): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
V
IN
(Pin 4): Main Supply Pin. Must be closely decoupled
to GND, Pin 2, with a 2.2F or greater ceramic capacitor.
V
FB
(Pin 5): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 100mA TO 600mA
3406B G19
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 200mA TO 600mA
3406B G20
6
LTC3406B-2
sn3406b2 3406b2fs
FU CTIO AL DIAGRA
U
U
W
+
+
+
EA
+
I
RCMP
+
I
COMP
5
1
RUN
OSC
SLOPE
COMP
OSC
FREQ
SHIFT
0.6V
0.65V
OVDET
OV
0.6V REF
SHUTDOWN
V
IN
V
FB
V
IN
S
R
RS LATCH
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTI-
SHOOT-
THRU
Q
Q
5
4
SW
3
GND
3406B BD
2
OPERATIO
U
(Refer to Functional Diagram)
Main Control Loop
The LTC3406B-2 uses a constant frequency, current mode
step-down architecture. Both the main (P-channel
MOSFET) and synchronous (N-channel MOSFET) switches
are internal. During normal operation, the internal top power
MOSFET is turned on each cycle when the oscillator sets
the RS latch, and turned off when the current comparator,
I
COMP
, resets the RS latch. The peak inductor current at
which I
COMP
resets the RS latch, is controlled by the output
of error amplifier EA. When the load current increases, it
causes a slight decrease in the feedback voltage, FB, rela-
tive to the 0.6V reference, which in turn, causes the EA
amplifier's output voltage to increase until the average
inductor current matches the new load current. While the
top MOSFET is off, the bottom MOSFET is turned on until
either the inductor current starts to reverse, as indicated by
the current reversal comparator I
RCMP
, or the beginning of
the next clock cycle.
The comparator OVDET guards against transient over-
shoots >6.25% by turning the main switch off and keeping
it off until the fault is removed.
Pulse Skipping Mode Operation
At light loads, the inductor current may reach zero or re-
verse on each pulse. The bottom MOSFET is turned off by
the current reversal comparator, I
RCMP
, and the switch
voltage will ring. This is discontinuous mode operation,
and is normal behavior for the switching regulator. At very
light loads, the LTC3406B-2 will automatically skip pulses
in pulse skipping mode operation to maintain output regu-
lation. Refer to LTC3406 data sheet if Burst Mode opera-
tion is preferred.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 310kHz, 1/7 the nominal
7
LTC3406B-2
sn3406b2 3406b2fs
OPERATIO
U
(Refer to Functional Diagram)
frequency. This frequency foldback ensures that the in-
ductor current has more time to decay, thereby preventing
runaway. The oscillator's frequency will progressively
increase to 2.25MHz when V
FB
rises above 0V.
Dropout Operation
As the input supply voltage decreases to a value approach-
ing the output voltage, the duty cycle increases toward the
maximum on-time. Further reduction of the supply voltage
forces the main switch to remain on for more than one cycle
until it reaches 100% duty cycle. The output voltage will then
be determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
SUPPLY VOLTAGE (V)
2.5
MAXIMUM OUTPUT CURRENT (mA)
1200
1000
800
600
400
200
0
3.0
3.5
4.0
4.5
3406B F02
5.0
5.5
V
OUT
= 1.8V
V
OUT
= 1.5V
V
OUT
= 2.5V
Figure 2. Maximum Output Current vs Input Voltage
Figure 1a. High Efficiency Step-Down Converter
Figure 1b. Efficiency vs Load Current
V
IN
C
IN
**
4.7F
CER
V
IN
2.7V
TO 5.5V
*
**
LTC3406B-2
RUN
2.2H*
3406B F01a
MURATA LQH32CN2R2M33
TAIYO YUDEN JMK212BJ475MG
TAIYO YUDEN JMK316BJ106ML
SW
V
FB
GND
C
OUT
10F
CER
V
OUT
1.8V
600mA
22pF
1M
499k
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B F01b
1
100
V
IN
= 2.7V
V
OUT
= 1.8V
T
A
= 25C
V
IN
= 3.6V
V
IN
= 4.2V
An important detail to remember is that at low input supply
voltages, the R
DS(ON)
of the P-channel switch increases
(see Typical Performance Characteristics). Therefore, the
user should calculate the power dissipation when the
LTC3406B-2 is used at 100% duty cycle with low input
voltage (See Thermal Considerations in the Applications
Information section).
Low Supply Operation
The LTC3406B-2 will operate with input supply voltages as
low as 2.5V, but the maximum allowable output current is
reduced at this low voltage. Figure 2 shows the reduction
in the maximum output current as a function of input
voltage for various output voltages.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles > 40%. However, the LTC3406B-2 uses a
patent-pending scheme that counteracts this compensat-
ing ramp, which allows the maximum inductor peak
current to remain unaffected throughout all duty cycles.
8
LTC3406B-2
sn3406b2 3406b2fs
APPLICATIO S I FOR ATIO
W
U
U
U
The basic LTC3406B-2 application circuit is shown in
Figure 1. External component selection is driven by the
load requirement and begins with the selection of L fol-
lowed by C
IN
and C
OUT
.
Inductor Selection
For most applications, the value of the inductor will fall in
the range of 1H to 4.7H. Its value is chosen based on the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
currents. Higher V
IN
or V
OUT
also increases the ripple
current as shown in equation 1. A reasonable starting point
for setting ripple current is I
L
= 240mA (40% of 600mA).
=
( )( )
-
I
f L
V
V
V
L
OUT
OUT
IN
1
1
(1)
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 720mA rated
inductor should be enough for most applications (600mA
+ 120mA). For better efficiency, choose a low DC-resis-
tance inductor.
Inductor Core Selection
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rials are small and don't radiate much energy, but gener-
ally cost more than powdered iron core inductors with
similar electrical characteristics. The choice of which style
inductor to use often depends more on the price vs size
requirements and any radiated field/EMI requirements
than on what the LTC3406B-2 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3406B-2 applications.
C
IN
and C
OUT
Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle V
OUT
/V
IN
. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
C
I
V
V
V
V
IN
OMAX
OUT
IN
OUT
IN
required I
RMS
-
(
)
[
]
1 2
/
Table 1. Representative Surface Mount Inductors
Part
Value
DCR
MAX DC
Size
Number
(H)
(MAX)
Current (A)
WxLxH (mm
3
)
Sumida
1.5
0.068
0.90
3.2 x 3.2 x 1.2
CDRH2D11
2.2
0.098
0.78
3.3
0.123
0.60
Sumida
2.2
0.041
0.85
3.2 x 3.2 x 2.0
CDRH2D18/LD
3.3
0.054
0.75
4.7
0.078
0.63
Sumida
2.2
0.116
0.95
3.5 x 4.1 x 0.8
CMD4D06
3.3
0.174
0.77
4.7
0.216
0.75
Murata
1.0
0.060
1.00
2.5 x 3.2 x 2.0
LQH32C
2.2
0.097
0.79
4.7
0.150
0.65
Taiyo Yuden
1.0
0.080
0.78
1.8 x 2.5 x 1.8
LQLBC2518
1.5
0.110
0.66
2.2
0.130
0.60
Toko
2.2
0.14
1.14
4.6 x 4.6 x 1.2
D412F
3.3
0.20
0.90
4.7
0.22
0.80
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that the capacitor
manufacturer's ripple current ratings are often based on
2000 hours of life. This makes it advisable to further derate
the capacitor, or choose a capacitor rated at a higher
temperature than required. Always consult the manufac-
turer if there is any question.
The selection of C
OUT
is driven by the required effective
series resistance (ESR).
Typically, once the ESR requirement for C
OUT
has been
met, the RMS current rating generally far exceeds the
I
RIPPLE(P-P)
requirement. The output ripple V
OUT
is deter-
mined by:
+
V
I ESR
fC
OUT
L
OUT
1
8
where f = operating frequency, C
OUT
= output capacitance
and I
L
= ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since I
L
increases with input voltage.
9
LTC3406B-2
sn3406b2 3406b2fs
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount configurations. In the case
of tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the
LTC3406B-2's control loop does not depend on the output
capacitor's ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
However, care must be taken when ceramic capacitors are
used at the input and the output. When a ceramic capacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, V
IN
. At best, this ringing can
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
can potentially cause a voltage spike at V
IN
, large enough
to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
V
R
R
OUT
=
+
0 6 1
2
1
.
(2)
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 3.
APPLICATIO S I FOR ATIO
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Figure 3. Setting the LTC3406B-2 Output Voltage
V
FB
GND
LTC3406B-2
0.6V V
OUT
5.5V
R2
R1
3406B F03
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3406B-2 circuits: V
IN
quiescent current and
I
2
R losses. The V
IN
quiescent current loss dominates the
efficiency loss at very low load currents whereas the I
2
R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 4.
Figure 4. Power Lost vs Load Current
LOAD CURRENT (mA)
POWER LOSS (W)
0.1
10
100
1000
3406B F04
1
1
0.1
0.01
0.001
0.0001
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
VOUT = 1.5V
VIN = 3.6V
10
LTC3406B-2
sn3406b2 3406b2fs
APPLICATIO S I FOR ATIO
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1. The V
IN
quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from V
IN
to ground. The resulting
dQ/dt is the current out of V
IN
that is typically larger than
the DC bias current. In continuous mode, I
GATECHG
=
f(Q
T
+ Q
B
) where Q
T
and Q
B
are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to V
IN
and thus
their effects will be more pronounced at higher supply
voltages.
2. I
2
R losses are calculated from the resistances of the
internal switches, R
SW
, and external inductor R
L
. In
continuous mode, the average output current flowing
through inductor L is "chopped" between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
DS(ON)
and the duty cycle
(DC) as follows:
R
SW
= (R
DS(ON)TOP
)(DC) + (R
DS(ON)BOT
)(1 DC)
The R
DS(ON)
for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I
2
R losses, simply add R
SW
to
R
L
and multiply the result by the square of the average
output current.
Other losses including C
IN
and C
OUT
ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications the LTC3406B-2 does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3406B-2 is running at high ambient tem-
perature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150C, both power
switches will be turned off and the SW node will become
high impedance.
To avoid the LTC3406B-2 from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
T
R
= (P
D
)(
JA
)
where P
D
is the power dissipated by the regulator and
JA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, T
J
, is given by:
T
J
= T
A
+ T
R
where T
A
is the ambient temperature.
As an example, consider the LTC3406B-2 in dropout at an
input voltage of 2.7V, a load current of 600mA and an
ambient temperature of 70C. From the typical perfor-
mance graph of switch resistance, the R
DS(ON)
of the
P-channel switch at 70C is approximately 0.52. There-
fore, power dissipated by the part is:
P
D
= I
LOAD
2
R
DS(ON)
= 187.2mW
For the SOT-23 package, the
JA
is 250C/ W. Thus, the
junction temperature of the regulator is:
T
J
= 70C + (0.1872)(250) = 116.8C
which is below the maximum junction temperature of
125C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (R
DS(ON)
).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to (I
LOAD
ESR), where ESR is the effective series
resistance of C
OUT
. I
LOAD
also begins to charge or
discharge C
OUT
, which generates a feedback error signal.
The regulator loop then acts to return V
OUT
to its steady-
state value. During this recovery time V
OUT
can be moni-
tored for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
11
LTC3406B-2
sn3406b2 3406b2fs
APPLICATIO S I FOR ATIO
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A second, more severe transient is caused by switching in
loads with large (>1F) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with C
OUT
, causing a rapid drop in V
OUT
. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 C
LOAD
).
Thus, a 10F capacitor charging to 3.3V would require a
250s rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3406B-2. These items are also illustrated graphically
in Figures 5 and 6. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V
IN
trace should be kept short, direct and
wide.
2. Does the V
FB
pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be con-
nected between the (+) plate of C
OUT
and ground.
3. Does the (+) plate of C
IN
connect to V
IN
as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the switching node, SW, away from the sensitive
V
FB
node.
5. Keep the () plates of C
IN
and C
OUT
as close as possible.
Figure 5. LTC3406B-2 Layout Diagram
Figure 6. LTC3406B-2 Suggested Layout
RUN
LTC3406B-2
GND
SW
L1
R2
R1
C
FWD
BOLD LINES INDICATE HIGH CURRENT PATHS
V
IN
V
OUT
3406B F05
4
5
1
3
+
2
V
FB
V
IN
C
IN
+
C
OUT
LTC3406B-2
GND
3406B F06
PIN 1
V
OUT
V
IN
VIA TO V
OUT
SW
VIA TO V
IN
VIA TO GND
C
OUT
C
IN
L1
R2
C
FWD
R1
12
LTC3406B-2
sn3406b2 3406b2fs
V
IN
C
IN
4.7F
CER
V
IN
2.7V
TO 4.2V
LTC3406B-2
RUN
3
2.2H*
22pF
1M
316k
3406B F07a
5
4
1
2
SW
V
FB
GND
C
OUT
**
10F
CER
V
OUT
2.5V
* MURATA LQH32CN2R2M33
** TAIYO YUDEN JHK316BJ106ML
TAIYO YUDEN JMK212BJ475MG
Figure 7b
Figure 7a
Design Example
As a design example, assume the LTC3406B-2 is used in
a single lithium-ion battery-powered cellular phone
application. The V
IN
will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.6A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
2.5V. With this information we can calculate L using
equation (1),
L
f
I
V
V
V
L
OUT
OUT
IN
=
( )
( )
-
1
1
(3)
Substituting V
OUT
= 2.5V, V
IN
= 4.2V, I
L
= 240mA and
f = 2.25MHz in equation (3) gives:
L
V
MHz
mA
V
V
H
=
-
=
2 5
1 5
240
1
2 5
4 2
1 87
.
.
(
)
.
.
.
A 2.2H inductor works well for this application. For best
efficiency choose a 720mA or greater inductor with less
than 0.2 series resistance.
C
IN
will require an RMS current rating of at least 0.3A
I
LOAD(MAX)
/2 at temperature and C
OUT
will require an ESR
of less than 0.25. In most cases, a ceramic capacitor will
satisfy this requirement.
For the feedback resistors, choose R1 = 316k. R2 can
then be calculated from equation (2) to be:
R
V
R
k
OUT
2
0 6
1 1 1000
=
-
=
.
Figure 7 shows the complete circuit along with its effi-
ciency curve.
APPLICATIO S I FOR ATIO
W
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OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B G04
1
100
V
OUT
= 2.5V
T
A
= 25C
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
13
LTC3406B-2
sn3406b2 3406b2fs
TYPICAL APPLICATIO S
U
Single Li-Ion 1.2V/600mA Regulator for
High Efficiency and Small Footprint
V
IN
C
IN
4.7F
CER
V
IN
2.7V
TO 4.2V
LTC3406B-2
RUN
3
2.2H*
22pF
301k
301k
3406B TA09
5
4
1
2
SW
V
FB
GND
C
OUT
**
10F
CER
V
OUT
1.2V
* MURATA LQH32CN2R2M33
** TAIYO YUDEN JHK316BJ106ML
TAIYO YUDEN JMK212BJ475MG
Efficiency vs Output Current
Load Step
Load Step
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B G02
1
100
V
OUT
= 1.2V
T
A
= 25C
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 1.2V
I
LOAD
= 0mA TO 600mA
3406B TA11
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 1.2V
I
LOAD
= 100mA TO 600mA
3406B TA12
14
LTC3406B-2
sn3406b2 3406b2fs
V
IN
C
IN
4.7F
CER
V
IN
5V
LTC3406B-2
RUN
3
2.2H*
22pF
1M
221k
3406B TA13
5
4
1
2
SW
V
FB
GND
C
OUT
**
10F
CER
V
OUT
3.3V
* MURATA LQH32CN2R2M33
** TAIYO YUDEN JHK316BJ106ML
TAIYO YUDEN JMK212BJ475MG
5V Input to 3.3V/0.6A Regulator
TYPICAL APPLICATIO S
U
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10
1000
100
90
80
70
60
50
40
30
20
10
3406B TA14
1
100
V
OUT
= 3.3V
V
IN
= 5V
Efficiency vs Output Current
Load Step
Load Step
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 3.3V
I
LOAD
= 0mA TO 600mA
3406B TA15
V
OUT
100mV/DIV
AC COUPLED
I
L
500mA/DIV
I
LOAD
500mA/DIV
20s/DIV
V
IN
= 3.6V
V
OUT
= 3.3V
I
LOAD
= 100mA TO 600mA
3406B TA16
15
LTC3406B-2
sn3406b2 3406b2fs
U
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
1.50 1.75
(NOTE 4)
2.80 BSC
0.30 0.45 TYP
5 PLCS (NOTE 3)
DATUM `A'
0.09 0.20
(NOTE 3)
S5 TSOT-23 0302
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 0.90
1.00 MAX
0.01 0.10
0.20 BSC
0.30 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16
LTC3406B-2
sn3406b2 3406b2fs
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1616
500mA (I
OUT
), 1.4MHz, High Efficiency Step-Down
90% Efficiency, V
IN
: 3.6V to 25V, V
OUT(MIN)
= 1.25V, I
Q
= 1.9mA,
DC/DC Converter
I
SD
< 1A, ThinSOT Package
LT1676
450mA (I
OUT
), 100kHz, High Efficiency Step-Down
90% Efficiency, V
IN
: 7.4V to 60V, V
OUT(MIN)
= 1.24V, I
Q
= 3.2mA,
DC/DC Converter
I
SD
= 2.5A, S8 Package
LTC1877
600mA (I
OUT
), 550kHz, Synchronous Step-Down
95% Efficiency, V
IN
: 2.7V to 10V, V
OUT(MIN)
= 0.8V, I
Q
= 10A,
DC/DC Converter
I
SD
< 1A, MS8 Package
LTC1878
600mA (I
OUT
), 550kHz, Synchronous Step-Down
95% Efficiency, V
IN
: 2.7V to 6V, V
OUT(MIN)
= 0.8V, I
Q
= 10A,
DC/DC Converter
I
SD
< 1A, MS8 Package
LTC1879
1.2A (I
OUT
), 550kHz, Synchronous Step-Down
95% Efficiency, V
IN
: 2.7V to 10V, V
OUT(MIN)
= 0.8V, I
Q
= 15A,
DC/DC Converter
I
SD
< 1A, TSSOP-16 Package
LTC3403
600mA (I
OUT
), 1.5MHz, Synchronous Step-Down
96% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= Dynamically
DC/DC Converter with Bypass Transistor
Adjustable, I
Q
= 20A, I
SD
< 1A, DFN Package
LTC3404
600mA (I
OUT
), 1.4MHz, Synchronous Step-Down
95% Efficiency, V
IN
: 2.7V to 6V, V
OUT(MIN)
= 0.8V, I
Q
= 10A,
DC/DC Converter
I
SD
< 1A, MS8 Package
LTC3405/LTC3405A
300mA (I
OUT
), 1.5MHz, Synchronous Step-Down
96% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= 0.8V, I
Q
= 20A,
DC/DC Converter
I
SD
< 1A, ThinSOT Package
LTC3406/LTC3406B
600mA (I
OUT
), 1.5MHz, Synchronous Step-Down
96% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= 0.6V, I
Q
= 20A,
DC/DC Converter
I
SD
< 1A, ThinSOT Package
LTC3407
Dual Output (600mA 2) 1.5MHz Synchronous
95% Efficiency V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= 0.6V, I
Q
= 40A,
Step-Down DC/DC Converter
MS10E Package
LTC3408
600mA (I
OUT
), 1.5MHz Synchronous Step-Down
96% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= Dynamically
DC/DC Converter with 0.08 Bypass Transistor
Adjustable, I
Q
= 1.5mA, I
SD
< 1A, DFN Package
LTC3411
1.25A (I
OUT
), 4MHz, Synchronous Step-Down
95% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= 0.8V, I
Q
= 60A,
DC/DC Converter
I
SD
< 1A, MS Package
LTC3412
2.5A (I
OUT
), 4MHz, Synchronous Step-Down
95% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT(MIN)
= 0.8V, I
Q
= 60A,
DC/DC Converter
I
SD
< 1A, TSSOP-16E Package
LTC3414
4A (I
OUT
), 4MHz, Synchronous Step-Down
95% Efficiency, V
IN
: 2.25V to 5.5V, V
OUT(MIN)
= 0.8V, I
Q
= 64A,
DC/DC Converter
TSSOP-20E Package
LTC3440
600mA (I
OUT
), 2MHz, Synchronous Buck-Boost
95% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT
: 2.5V to 5.5V, I
Q
= 25A,
DC/DC Converter
I
SD
< 1A, MS Package
LTC3441
1A (I
OUT
), 1MHz, Synchronous Buck-Boost
95% Efficiency, V
IN
: 2.5V to 5.5V, V
OUT
: 2.4V to 5.25V, I
Q
= 25A,
DC/DC Converter
DFN Package
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2003
LT/TP 0204 1K PRINTED IN USA
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