LTC4008

4008i

Final Electrical Specifications

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

General Purpose Charger Controller

High Conversion Efficiency: Up to 96%

Output Currents Exceeding 4A

0.8% Voltage Accuracy

AC Adapter Current Limiting Maximizes
Charge Rate*

Thermistor Input for Temperature Qualified Charging

Wide Input Voltage Range: 6V to 28V

Wide Output Voltage: 3V to 28V

0.5V Dropout Voltage; Maximum Duty Cycle: 98%

Programmable Charge Current:

4% Accuracy

Indicator Outputs for Charging, C/10 Current
Detection, AC Adapter Present, Input Current
Limiting and Faults

Charging Current Monitor Output

Available in a 20-Pin Narrow SSOP Package

4A, High Efficiency,

Multi-Chemistry Battery Charger

January 2003

The LTC

4008 is a constant-current/constant-voltage

charger controller. The PWM controller uses a synchro-
nous, quasi-constant frequency, constant off-time archi-
tecture that will not generate audible noise even when
using ceramic capacitors. Charging current is program-
mable with a sense resistor and programming resistor to

4% typical accuracy. Charging current can be monitored

as a voltage across the programming resistor. An external
resistor divider and precision internal reference set the
final float voltage.

LTC4008 includes a thermistor sensor input that will
suspend charging if an unsafe temperature condition is
detected and will automatically resume charging when
battery temperature returns to within safe limits; a FAULT
pin indicates this condition. A FLAG pin indicates when
charging current has decreased below 10% of the pro-
grammed current. An external sense resistor programs
AC adapter current limiting. The I

pin indicates when the

charging current is being reduced by input current limiting
so that the charging algorithm can adapt.

Notebook Computers

Portable Instruments

Battery Backup Systems

12.3V, 4A Li-Ion Charger

APPLICATIO S

FEATURES

DESCRIPTIO

TYPICAL APPLICATIO

, LTC and LT are registered trademarks of Linear Technology Corporation.

BATMON

ACP/SHDN

FAULT

FLAG

NTC

GND

ACP

FAULT

FLAG

DCIN

INFET

CLP

CLN

TGATE

BGATE

PGND

CSP

BAT

PROG

LTC4008

32.4k

0.47

THERMISTOR

10k

NTC

0.12

100k

140k*

15k*

6.04k

150k

LOGIC

DCIN

0V TO 28V

0.1

INPUT SWITCH

0.1

5.1k

3.01k

0.025

0.02

SYSTEM
LOAD

Li-Ion
BATTERY

CHARGING
CURRENT
MONITOR

26.7k

Q1: Si4431DY
Q2: FDC6459

0.0047

4008 TA01

NOTE: * 0.25% TOLERANCE

ALL OTHER RESISTORS ARE 1% TOLERANCE

*U.S. Patent No. 5,723,970

LTC4008

4008i

Voltage from DCIN, CLP, CLN to GND ....... +32V/0.3 V
PGND with Respect to GND ..................................

0.3V

CSP, BAT to GND ........................................ +28V/0.3V
V

, NTC to GND ......................................... +10V/0.3V

................................................................. +7V/0.3V

ACP/SHDN, FLAG, FAULT, I

.................... +32V/0.3V

ABSOLUTE

AXI

RATINGS

PACKAGE/ORDER I

FOR

ATIO

ORDER PART

NUMBER

LTC4008EGN

JMAX

= 125

= 90

C/W

Consult LTC Marketing for parts specified with wider operating temperature ranges.

GN PACKAGE

20-LEAD NARROW PLASTIC SSOP

TOP VIEW

INFET

BGATE

PGND

TGATE

CLP

CLN

FLAG

BATMON

BAT

CSP

DCIN

ACP/SHDN

FAULT

GND

NTC

PROG

Operating Ambient Temperature Range

(Note 4) ...............................................40

C to 85

Operating Junction Temperature ...........40

C to 125

Storage Temperature Range ................. 65

C to 150

Lead Temperature (Soldering, 10 sec).................. 300

(Note 1)

ORDER PART

NUMBER

LTC4008EGN-1

The

denotes specifications which apply over the full operating

temperature range (Note 4), otherwise specifications are at T

= 25

C. V

DCIN

= 20V, V

BAT

= 12V unless otherwise noted.

ELECTRICAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

DCIN Operating Range

Operating Current

Charging Sum of Current from CLP, CLN, DCIN

TOL

Voltage Accuracy

(Notes 2, 5)

0.8

1.0

BATMON Error (Note 5)

Measured from BAT to BATMON,

LOAD

= 100k

TOL

Charge Current Accuracy (Note 3)

CSP

BAT

Target = 100mV

Shutdown

Battery Leakage Current

DCIN = 0V (LTC4008 Only)

ACP/SHDN = 0V

UVLO

Undervoltage Lockout Threshold

DCIN Rising, V

BAT

= 0V

4.2

4.7

5.5

Shutdown Threshold at ACP/SHDN

1.6

2.5

Operating Current in Shutdown

SHDN

= 0V, Sum of Current from CLP,

CLN, DCIN

JMAX

= 125

= 90

C/W

GN PACKAGE

20-LEAD NARROW PLASTIC SSOP

TOP VIEW

BGATE

PGND

TGATE

CLP

CLN

FLAG

BATMON

BAT

CSP

DCIN

SHDN

FAULT

GND

NTC

PROG

THE LTC4008EGN-1
Does Not Have the
Input FET Function

LTC4008

4008i

The

denotes specifications which apply over the full operating

temperature range (Note 4), otherwise specifications are at T

= 25

C. V

DCIN

= 20V, V

BAT

= 12V unless otherwise noted.

ELECTRICAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Current Sense Amplifier, CA1

Input Bias Current Into BAT Pin

11.66

CMSL

CA1/I

Input Common Mode Low

CMSH

CA1/I

Input Common Mode High

DCIN

28V

CLN

0.2

Input Voltage Offset

3.5

Current Comparators I

CMP

and I

REV

TMAX

Maximum Current Sense Threshold (V

CSP

BAT

)

ITH

= 2.4V

140

165

200

TREV

Reverse Current Threshold (V

CSP

BAT

)

Current Sense Amplifier, CA2

Transconductance

mmho

Source Current

Measured at I

, V

ITH

= 1.4V

Sink Current

Measured at I

, V

ITH

= 1.4V

Current Limit Amplifier

Transconductance

1.4

mmho

CLP

Current Limit Threshold

100

107

CLN

CLN Input Bias Current

100

Voltage Error Amplifier, EA

Transconductance

mmho

BEA

Input Bias Current

Sink Current

Measured at I

, V

ITH

= 1.4V

OVSD

Overvoltage Shutdown Threshold as a Percent

102

107

110

of Programmed Charger Voltage

Input P-Channel FET Driver (INFET) (LTC4008 Only)

DCIN Detection Threshold (V

DCIN

CLP

)

DCIN Voltage Ramping Up

0.17

0.25

from V

CLP

0.1V

Forward Regulation Voltage (V

DCIN

CLP

)

Reverse Voltage Turn-Off Voltage (V

DCIN

CLP

)

DCIN Voltage Ramping Down

INFET "On" Clamping Voltage (V

CLP

INFET

)

INFET

= 1

5.8

6.5

INFET "Off" Clamping Voltage (V

CLP

INFET

)

INFET

= 25

0.25

Thermistor

NTCVR

Reference Voltage During Sample Time

4.5

High Threshold

NTC

Rising

NTCVR

· 0.48

· 0.5

· 0.52

Low Threshold

NTC

Falling

NTCVR

· 0.115

· 0.125

· 0.135

Thermistor Disable Current

NTC

10V

LTC4008

4008i

The

denotes specifications which apply over the full operating

temperature range (Note 4), otherwise specifications are at T

= 25

C. V

DCIN

= 20V, V

BAT

= 12V unless otherwise noted.

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: See Test Circuit.

Note 3: Does not include tolerance of current sense resistor or current
programming resistor.

Note 4: The LTC4008E is guaranteed to meet performance specifications
from 0

C to 70

C. Specifications over the 40

C to 85

C operating

temperature range are assured by design, characterization and correlation
with statistical process controls.

Note 5: Voltage accuracy includes BATMON error and voltage reference
error. Does not include error of external resistor divider.

ELECTRICAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Indicator Outputs (ACP/ SHDN, FLAG, I

, FAULT

C10TOL

FLAG (C/10) Accuracy

Voltage Falling at PROG

0.375

0.397

0.420

Threshold Accuracy

CLP

CLN

105

Low Logic Level of ACP/SHDN, FLAG, I

, FAULT

= 100

0.5

High Logic Level of ACP/SHDN, I

= 1

2.7

OFF

Off State Leakage Current of FLAG, FAULT

= 3V

Pull-Up Current on ACP/SHDN, I

V = 0V

Oscillator

OSC

Regulator Switching Frequency

255

300

345

kHz

MIN

Regulator Switching Frequency in Drop Out

Duty Cycle

98%

kHz

MAX

Regulator Maximum Duty Cycle

CSP

= V

BAT

Gate Drivers (TGATE, BGATE)

TGATE

High (V

CLP

TGATE

)

TGATE

= 1mA

BGATE

High

LOAD

= 3000pF

5.6

TGATE

Low (V

CLP

TGATE

)

LOAD

= 3000pF

5.6

BGATE

Low

BGATE

= 1mA

TGATE Transition Time

TGTR

TGATE Rise Time

LOAD

= 3000pF, 10% to 90%

110

TGTF

TGATE Fall Time

LOAD

= 3000pF, 10% to 90%

100

BGATE Transition Time

BGTR

BGATE Rise Time

LOAD

= 3000pF, 10% to 90%

BGTF

BGATE Fall Time

LOAD

= 3000pF, 10% to 90%

TGATE

at Shutdown (V

CLP

TGATE

)

TGATE

= 1

A, DCIN = 0V, CLP = 12V

100

BGATE

at Shutdown

BGATE

= 1

A, DCIN = 0V, CLP = 12V

100

LTC4008

4008i

PI FU CTIO S

DCIN (Pin 1): External DC Power Source Input. Bypass
this pin with at least 0.01

F. See Applications Information

section.

(Pin 2): Input Current Limit Indicator. Active low digital

output. Internal 10

A pull-up to 3.5V. Pulled low if the

charger current is being reduced by the input current
limiting function. The pin is capable of sinking at least
100

A. If V

LOGIC

> 3.3V, add an external pull-up.

ACP/SHDN (Pin 3): Open-drain output used to indicate if
the AC adapter voltage is adequate for charging. Active high
digital output. Internal 10

A pull-up to 3.5V. The charger

can also be shutdown by pulling this pin below 1V. The pin
is capable of sinking at least 100

A. If V

LOGIC

> 3.3V, add

an external pull-up. (LTC4008-1: ACP function disabled.)

(Pin 4): Thermistor Clocking Resistor. Use a 150k

resistor as a nominal value. This resistor is always
required.

FAULT (Pin 5): Active low open-drain output that indicates
that charger operation has suspended due to the ther-
mistor exceeding allowed values. A pull-up resistor is
required if this function is used. The pin is capable of
sinking at least 100

GND (Pin 6): Ground for Low Power Circuitry.

(Pin 7): Input of Voltage Feedback Error Amplifier, EA,

in the Block Diagram.

NTC (Pin 8): A thermistor network is connected from NTC
to GND. This pin determines if the battery temperature is
safe for charging. The charger and timer are suspended
and the FAULT pin is driven low if the thermistor indicates
a temperature that is unsafe for charging. The thermistor
function may be disabled with a 300k to 500k resistor from
DCIN to NTC.

(Pin 9): Control Signal of the Inner Loop of the Current

Mode PWM. Higher I

voltage corresponds to higher

charging current in normal operation. A 6k resistor in
series with a capacitor of at least 0.1

F to GND provides

loop compensation. Typical full-scale output current is
40

A. Nominal voltage range for this pin is 0V to 3V.

PROG (Pin 10): Current Programming/Monitoring Input/
Output. An external resistor to GND programs the peak
charging current in conjunction with the current sensing

resistor. The voltage at this pin provides a linear indication
of charging current. Peak current is equivalent to 1.19V.
Zero current is approximately 0.309V. A capacitor from
PROG to ground is required to filter higher frequency
components. The maximum program resistance to ground
is 100k. Values higher than 100k can cause the charger to
shut down.

CSP (Pin 11): Current Amplifier CA1 Input. The CSP and
BAT pins measure the voltage across the sense resistor,
R

SENSE

, to provide the instantaneous current signals re-

quired for both peak and average current mode operation.

BAT (Pin 12): Battery Sense Input and the Negative
Reference for the Current Sense Resistor.

BATMON (Pin 13): Output Voltage Representing Battery
Voltage. Switched off to reduce standby current drain
when AC is not present. An external voltage divider from
BATMON to V

sets the charger float voltage. Recom-

mended minimum load resistance is 100k.

FLAG (Pin 14): Active low open-drain output that indicates
when charging current has declined to 10% of max pro-
grammed current. A pull-up resistor is required if this
function is used. The pin is capable of sinking at least
100

A. This function is latching. To clear it, user must

cycle the ACP/SHDN pin.

CLN (Pin 15): Negative Input to the Input Current Limiting
Amplifier CL1. The threshold is set at 100mV below the
voltage at the CLP pin. When used to limit input current, a
filter is needed to filter out the switching noise. If no
current limit function is desired, connect this pin to CLP.

CLP (Pin 16): This pin serves as a positive reference for the
input current limit amplifier, CL1. It also serves as the
power supply for the IC.

TGATE (Pin 17): Drives the top external PMOSFET of the
battery charger buck converter.

PGND (Pin 18): High Current Ground Return for BGATE
Driver.

BGATE (Pin 19): Drives the bottom external N-MOSFET of
the battery charger buck converter.

INFET (Pin 20): Drives the gate of the external input
P-MOSFET. (LTC4008-1: No Connection)

LTC4008

4008i

TEST CIRCUIT

LT1055

LTC4008

REF

BAT

0.6V

4008 TC

BATMON

90.325k

9.675k

OVERVIEW

The LTC4008 is a synchronous current mode PWM step
down (buck) switcher battery charger controller. The
charge current is programmed by the combination of a
program resistor (R

PROG

) from the PROG pin to ground

and a sense resistor (R

SENSE

) between the CSP and BAT

pins. The final float voltage is programmed with an exter-
nal resistor divider and the internal 1.19V reference volt-
age. Charging begins when the potential at the DCIN pin
rises above the voltage at BAT (and the UVLO voltage) and
the ACP/SHDN pin is high. An external thermistor network
is sampled at regular intervals. If the thermistor value
exceeds design limits, charging is suspended and the
FAULT pin is set low. If the thermistor value returns to an
acceptable value, charging resumes and the FAULT pin is
set high. An external resistor on the R

pin sets the

sampling interval for the thermistor.

OPERATIO

As the battery approaches the final float voltage, the
charge current will begin to decrease. When the current
drops to 10% of the full-scale charge current, an internal
C/10 comparator will indicate this condition by latching
the FLAG pin low. If this condition is caused by an input
current limit condition, described below, then the FLAG
indicator will be inhibited. When the input voltage is not
present, the charger goes into a sleep mode, dropping
battery current drain to 15

A. This greatly reduces the

current drain on the battery and increases the standby
time. The charger can be inhibited at any time by forcing
the ACP/SHDN pin to a low voltage. Forcing ACP/SHDN
low, or removing the voltage from DCIN, will also clear the
FLAG pin if it is low.

Table 1. Truth Table For Indicator States

MODE

DCIN

ACP/SHDN

FLAG**

FAULT**

Shutdown by low adapter voltage (Disabled on LTC4008-1)

<BAT

LOW

HIGH

LOW

Normal charging

>BAT

HIGH

HIGH*

Input current limited charging

>BAT

HIGH

HIGH*

LOW

Charger shut down due to thermistor out of range

>BAT

HIGH

LOW

HIGH

Shut down by ACP/SHDN pin (USER)

Forced LOW

HIGH

LOW

Shut down by undervoltage lockout

>BAT + <UVL

HIGH

HIGH*

LOW

*Most probable condition, **Open-drain output, HIGH = Open with pull-up, X = Don't care

LTC4008

4008i

OPERATIO

Input FET (LTC4008)

The input FET circuit performs two functions. It enables
the charger if the input voltage is higher than the CLP pin
and provides the logic indicator of AC present on the
ACP/SHDN pin. It controls the gate of the input FET to keep
a low forward voltage drop when charging and also
prevents reverse current flow through the input FET.

If the input voltage is less than V

CLP

, it must go at least

170mV higher than V

CLN

to activate the charger. When this

occurs the ACP/SHDN pin is released and pulled up with
an external load to indicate that the adapter is present. The
gate of the input FET is driven to a voltage sufficient to keep
a low forward voltage drop from drain to source. If the
voltage between DCIN and CLP drops to less than 25mV,
the input FET is turned off slowly. If the voltage between
DCIN and CLP is ever less than 25mV, then the input FET
is turned off in less than 10

s to prevent significant

reverse current from flowing in the input FET. In this
condition, the ACP/SHDN pin is driven low and the charger
is disabled.

Input FET (LTC4008-1)

The input FET circuit is disabled for the LTC4008-1. There
is no low current shutdown mode when DCIN falls below
the CLP pin. The ACP/SHDN pin functions only to shut
down the charger.

Battery Charger Controller

The LTC4008 charger controller uses a constant off-time,
current mode step-down architecture. During normal op-
eration, the top MOSFET is turned on each cycle when the
oscillator sets the SR latch and turned off when the main
current comparator I

CMP

resets the SR latch. While the top

MOSFET is off, the bottom MOSFET is turned on until
either the inductor current trips the current comparator
I

REV

or the beginning of the next cycle. The oscillator uses

the equation:

OFF

DCIN

BAT

DCIN

OSC

to set the bottom MOSFET on time. This activity is dia-
grammed in Figure 1.

The peak inductor current, at which I

CMP

resets the SR

latch, is controlled by the voltage on I

. I

is in turn

controlled by several loops, depending upon the situation
at hand. The average current control loop converts the
voltage between CSP and BAT to a representative current.
Error amp CA2 compares this current against the desired
current programmed by R

PROG

at the PROG pin and

adjusts I

until:

REF

PROG

CSP

BAT

11 67

therefore,

CHARGE MAX

REF

PROG

SENSE

(

)

11 67

The voltage at BATMON is divided down by an external
resistor divider and is used by error amp EA to decrease
I

if the divider voltage is above the 1.19V reference.

When the charging current begins to decrease, the voltage
at PROG will decrease in direct proportion. The voltage at
PROG is then given by:

PROG

CHARGE

SENSE

PROG

(

)

11 67

PROG

is plotted in Figure 2.

The amplifier CL1 monitors and limits the input current,
normally from the AC adapter to a preset level (100mV/
R

). At input current limit, CL1 will decrease the I

voltage, thereby reducing charging current. The I

indica-

tor output will go low when this condition is detected and
the FLAG indicator will be inhibited if it is not already low.

TGATE

OFF

BGATE

INDUCTOR

CURRENT

OFF

TRIP POINT SET BY ITH VOLTAGE

OFF

4008 F01

Figure 1

LTC4008

4008i

If the charging current decreases below 10% to 15% of
programmed current, while engaged in input current
limiting, BGATE will be forced low to prevent the charger
from discharging the battery. Audible noise can occur in
this mode of operation.

An overvoltage comparator guards against voltage tran-
sient overshoots (>7% of programmed value). In this
case, both MOSFETs are turned off until the overvoltage
condition is cleared. This feature is useful for batteries
which "load dump" themselves by opening their protec-
tion switch to perform functions such as calibration or
pulse mode charging.

PWM Watchdog Timer

There is a watchdog timer that observes the activity on the
BGATE and TGATE pins. If TGATE stops switching for
more than 40

s, the watchdog activates and turns off the

top MOSFET for about 400ns. the watchdog engages to
prevent very low frequency operation in dropout--a po-
tential source of audible noise when using ceramic input
and output capacitors.

Charger Startup

When the charger is enabled, it will not begin switching
until the I

voltage exceeds a threshold that assures

initial current will be positive. This threshold is 5% to 15%
of the maximum programmed current (100mV/R

SENSE

After the charger begins switching, the various loops will
control the current at a level that is higher or lower than
the initial current. The duration of this transient condition
depends upon the loop compensation but is typically less
than 100

Thermistor Detection

The thermistor detection circuit is shown in Figure 3. It
requires an external resistor and capacitor in order to
function properly.

OPERATIO

CHARGE

(% OF MAXIMUM CURRENT)

PROG

(V)

0.2

0.4

0.6

0.8

4008 F02

1.0

1.2

100

1.19V

0.309V

Figure 2. V

PROG

vs I

CHARGE

NTC

LTC4008

R10

32.4k

C7
0.47

10k

NTC

60k

~4.5V

CLK

45k

15k

TBAD

4008 F03

Figure 3

LTC4008

4008i

OPERATIO

CLK

(NOT TO

SCALE)

NTC

SAMPLE

VOLTAGE ACROSS THERMISTOR

HOLD

4008 F04

COMPARATOR HIGH LIMIT

COMPARATOR LOW LIMIT

Figure 4

The thermistor detector performs a sample-and-hold func-
tion. An internal clock, whose frequency is determined by
the timing resistor connected to R

, keeps switch S1

closed to sample the thermistor:

SAMPLE

= 127.5 · 20 · R

· 17.5pF = 6.7ms,

for R

= 150k

The external RC network is driven to approximately 4.5V
and settles to a final value across the thermistor of:

V R

RTH FINAL

(

)

4 5

This voltage is stored by C7. Then the switch is opened for
a short period of time to read the voltage across the
thermistor.

HOLD

= 10 · R

· 17.5pF = 26

for R

= 150k

When the t

HOLD

interval ends the result of the thermistor

testing is stored in the D flip-flop (DFF). If the voltage at
NTC is within the limits provided by the resistor divider
feeding the comparators, then the NOR gate output will be
low and the DFF will set T

BAD

to zero and charging will

continue. If the voltage at NTC is outside of the resistor
divider limits, then the DFF will set T

BAD

to one, the charger

will be shut down, FAULT pin is set low and the timer will
be suspended until T

BAD

returns to zero (see Figure 4).

LTC4008

4008i

APPLICATIO S I FOR ATIO

100k

PROG

4008 F05

LTC4008

PROG

Q1
2N7002

PROG

Figure 5. PWM Current Programming

Charger Current Programming

The basic formula for charging current is:

CHARGE MAX

REF

PROG

SENSE

(

)

0 035

REF

= 1.19V. This leaves two degrees of freedom: R

SENSE

and R

PROG

. The 3k input resistors must not be altered

since internal currents and voltages are trimmed for this
value. Pick R

SENSE

by setting the average voltage between

CSP and BAT to be close to 100mV during maximum
charger current. Then R

PROG

can be determined by solving

the above equation for R

PROG

REF

SENSE

CHARGE MAX

(

)

0 035

Table 2. Recommended R

SNS

and R

PROG

Resistor Values

MAX

(A)

SENSE

(

) 1%

SENSE

(W)

PROG

) 1%

1.0

0.100

0.25

26.7

2.0

0.050

0.25

26.7

3.0

0.033

0.5

26.7

4.0

0.025

0.5

26.7

Charging current can be programmed by pulse width
modulating R

PROG

with a switch Q1 to R

PROG

at a fre-

quency higher than a few kHz (Figure 5). C

PROG

must be

increased to reduce the ripple caused by the R

PROG

switching. The compensation capacitor at I

will prob-

ably need to be increased also to improve stability and

prevent large overshoot currents during start-up condi-
tions. Charging current will be proportional to the duty
cycle of the switch with full current at 100% duty cycle and
zero current when Q1 is off.

Maintaining C/10 Accuracy

The C/10 comparator threshold that drives the FLAG pin
has a fixed threshold of approximately V

PROG

= 400mV.

This threshold works well when R

PROG

is 26.7k, but will

not yield a 10% charging current indication if R

PROG

is a

different value. There are situations where a standard
value of R

SENSE

will not allow the desired value of charging

current when using the preferred R

PROG

value. In these

cases, where the full-scale voltage across R

SENSE

is within

20mV of the 100mV full-scale target, the input resistors

connected to CSP and BAT can be adjusted to provide the
desired maximum programming current as well as the
correct FLAG trip point.

For example, the desired max charging current is 2.5A but
the best R

SENSE

value is 0.033

. In this case, the voltage

across R

SENSE

at maximum charging current is only

82.5mV, normally R

PROG

would be 30.1k but the nominal

FLAG trip point is only 5% of maximum charging current.
If the input resistors are reduced by the same amount as
the full-scale voltage is reduced then, R4 = R5 = 2.49k and
R

PROG

= 26.7k, the maximum charging current is still 2.5A

but the FLAG trip point is maintained at 10% of full scale.

There are other effects to consider. The voltage across the
current comparator is scaled to obtain the same values as
the 100mV sense voltage target, but the input referred
sense voltage is reduced, causing some careful consider-
ation of the ripple current. Input referred maximum com-
parator threshold is 117mV, which is the same ratio of
1.4x the DC target. Input referred I

REV

threshold is scaled

back to 24mV. The current at which the switcher starts
will be reduced as well so there is some risk of boost
activity. These concerns can be addressed by using a
slightly larger inductor to compensate for the reduction of
tolerance to ripple current.

LTC4008

4008i

APPLICATIO S I FOR ATIO

Battery Conditioning

Some batteries require a small charging current to condi-
tion them when they are severely depleted. The charging
current is switched to a high rate after the battery voltage
has reached a "safe" voltage to do so. Figure 6 illustrates
how to do this 2-level charging. When Q1 is on, the charger
current is set to maximum. When Q1 is off, the charging
current is set to 10% of the maximum.

Table 3

FLOAT VOLTAGE (V)

R9 (k

) 0.25%

R8 (k

) 0.25%

8.2

24.9

147

8.4

26.1

158

12.3

140

12.6

16.9

162

16.4

11.5

147

16.8

13.3

174

Soft-Start

The LTC4008 is soft started by the 0.12

F capacitor on the

pin. On start-up, I

pin voltage will rise quickly to 0.5V,

then ramp up at a rate set by the internal 40

A pull-up

current and the external capacitor. Battery charging
current starts ramping up when I

voltage reaches 0.8V

and full current is achieved with I

at 2V. With a 0.12

capacitor, time to reach full charge current is about 2ms
and it is assumed that input voltage to the charger will
reach full value in less than 2ms. The capacitor can be
increased up to 1

F if longer input start-up times are

needed.

Input and Output Capacitors

The input capacitor (C2) is assumed to absorb all input
switching ripple current in the converter, so it must have
adequate ripple current rating. Worst-case RMS ripple
current will be equal to one-half of output charging
current. Actual capacitance value is not critical. Solid
tantalum low ESR capacitors have high ripple current
rating in a relatively small surface mount package,

but

caution must be used when tantalum capacitors are used
for input or output bypass. High input surge currents can
be created when the adapter is hot-plugged to the charger
or when a battery is connected to the charger. Solid
tantalum capacitors have a known failure mechanism
when subjected to very high turn-on surge currents. Only
Kemet T495 series of "Surge Robust" low ESR tantalums
are rated for high surge conditions such as battery to
ground.

R2
53.6k

PROG

0.0047

4008 F06

LTC4008

Q1
2N7002

26.7k

PROG

Figure 6. 2-Level Current Programming

Charger Voltage Programming

A resistor divider, R8 and R9 (see Figure 10), programs
the final float voltage of the charger. The equation for float
voltage is (the input bias current of EA is typically 4nA and
can be ignored):

FLOAT

= V

REF

(1 + R8/R9)

It is recommended that the sum of R8 and R9 not be less
than 100k. Accuracy of the LTC4008 voltage reference is

0.8% at 25

C, and

1% over the full temperature range.

This leads to the possibility that very accurate (0.1%)
resistors might be needed for R8 and R9. Actually, the
temperature of the LTC4008 will rarely exceed 50

C near

the float voltage because charging currents have tapered
to a low level, so 0.25% resistors will normally provide the
required level of overall accuracy. Table 3 contains recom-
mended values for R8 and R9 for popular float voltages.

LTC4008

4008i

APPLICATIO S I FOR ATIO

The relatively high ESR of an aluminum electrolytic for C1,
located at the AC adapter input terminal, is helpful in
reducing ringing during the hot-plug event. Refer to Appli-
cation Note 88 for more information.

Highest possible voltage rating on the capacitor will mini-
mize problems. Consult with the manufacturer before use.
Alternatives include new high capacity ceramic (at least
20

F) from Tokin, United Chemi-Con/Marcon, et al. Other

alternative capacitors include OS-CON capacitors from
Sanyo.

The output capacitor (C3) is also assumed to absorb
output switching current ripple. The general formula for
capacitor current is:

L f

RMS

BAT

DCIN

(

)

( )( )

0 29

For example:

DCIN

= 19V, V

BAT

= 12.6V, L1 = 10

H, and

f = 300kHz, I

RMS

= 0.41A.

EMI considerations usually make it desirable to minimize
ripple current in the battery leads, and beads or inductors
may be added to increase battery impedance at the 300kHz
switching frequency. Switching ripple current splits be-
tween the battery and the output capacitor depending on
the ESR of the output capacitor and the battery imped-
ance. If the ESR of C3

is 0.2

and the battery impedance

is raised to 4

with a bead or inductor, only 5% of the

current ripple will flow in the battery.

Inductor Selection

Higher operating frequencies allow the use of smaller
inductor and capacitor values. A higher frequency gener-
ally results in lower efficiency because of MOSFET gate
charge losses. In addition, the effect of inductor value on
ripple current and low current operation must also be
considered. The inductor ripple current

decreases

with higher frequency and increases with higher V

( )( )

f L

OUT

Accepting larger values of

allows the use of low

inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is

= 0.4(I

MAX

). In no case should

exceed 0.6(I

MAX

) due to limits imposed by I

REV

and

CA1. Remember the maximum

occurs at the maxi-

mum input voltage. In practice 10

H is the lowest value

recommended for use.

Lower charger currents generally call for larger inductor
values. Use Table 4 as a guide for selecting the correct
inductor value for your application.

Table 4

MAXIMUM

INPUT

MINIMUM INDUCTOR

AVERAGE CURRENT (A)

VOLTAGE (V)

VALUE (

20%

> 20

20%

> 20

20%

> 20

20%

> 20

20%

Charger Switching Power MOSFET
and Diode Selection

Two external power MOSFETs must be selected for use
with the charger: a P-channel MOSFET for the top (main)
switch and an N-channel MOSFET for the bottom (syn-
chronous) switch.

The peak-to-peak gate drive levels are set internally. This
voltage is typically 6V. Consequently, logic-level threshold
MOSFETs must be used. Pay close attention to the BV

DSS

specification for the MOSFETs as well; many of the logic
level MOSFETs are limited to 30V or less.

LTC4008

4008i

APPLICATIO S I FOR ATIO

Selection criteria for the power MOSFETs include the "ON"
resistance R

DS(ON)

, total gate capacitance Q

, reverse

transfer capacitance C

RSS

, input voltage and maximum

output current. The charger is operating in continuous
mode so the duty cycles for the top and bottom MOSFETs
are given by:

Main Switch Duty Cycle = V

OUT

Synchronous Switch Duty Cycle = (V

OUT

)/V

The MOSFET power dissipations at maximum output
current are given by:

PMAIN = V

OUT

MAX

)

(1 +

T)R

DS(ON)

+ k(V

)

MAX

)(C

RSS

)(f

OSC

)

PSYNC = (V

OUT

)/V

MAX

)

(1 +

T)R

DS(ON)

Where

T is the temperature dependency of R

DS(ON)

and

k is a constant inversely related to the gate drive current.
Both MOSFETs have I

R losses while the PMAIN equation

includes an additional term for transition losses, which are
highest at high input voltages. For V

< 20V the high

current efficiency generally improves with larger MOSFETs,
while for V

> 20V the transition losses rapidly increase

to the point that the use of a higher R

DS(ON)

device with

lower C

RSS

actually provides higher efficiency. The syn-

chronous MOSFET losses are greatest at high input volt-
age or during a short circuit when the duty cycle in this
switch in nearly 100%. The term (1 +

T) is generally

given for a MOSFET in the form of a normalized R

DS(ON)

temperature curve, but

= 0.005/

C can be used as an

approximation for low voltage MOSFETs. C

RSS

= Q

is usually specified in the MOSFET characteristics.

The constant k = 2 can be used to estimate the contribu-
tions of the two terms in the main switch dissipation
equation.

If the charger is to operate in low dropout mode or with a
high duty cycle greater than 85%, then the topside
P-channel efficiency generally improves with a larger
MOSFET. Using asymmetrical MOSFETs may achieve cost
savings or efficiency gains.

The Schottky diode D1, shown in the Typical Application
on the back page, conducts during the dead-time between
the conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on and
storing charge during the dead-time, which could cost as
much as 1% in efficiency. A 1A Schottky is generally a
good size for 4A regulators due to the relatively small
average current. Larger diodes can result in additional
transition losses due to their larger junction capacitance.

The diode may be omitted if the efficiency loss can be
tolerated.

Calculating IC Power Dissipation

The power dissipation of the LTC4008 is dependent upon
the gate charge of the top and bottom MOSFETs (Q

respectively) The gate charge is determined from the

manufacturer's data sheet and is dependent upon both the
gate voltage swing and the drain voltage swing of the
MOSFET. Use 6V for the gate voltage swing and V

DCIN

for

the drain voltage swing.

PD = V

DCIN

· (f

OSC

+ Q

) + I

)

Example:

DCIN

= 19V, f

OSC

= 345kHz, Q

= Q

= 15nC.

PD = 235mW

Adapter Limiting

An important feature of the LTC4008 is the ability to
automatically adjust charging current to a level which
avoids overloading the wall adapter. This allows the prod-
uct to operate at the same time that batteries are being
charged without complex load management algorithms.
Additionally, batteries will automatically be charged at the
maximum possible rate of which the adapter is capable.

This feature is created by sensing total adapter output
current and adjusting charging current downward if a
preset adapter current limit is exceeded. True analog
control is used, with closed-loop feedback ensuring that

LTC4008

4008i

APPLICATIO S I FOR ATIO

adapter load current remains within limits. Amplifier CL1
in Figure 7 senses the voltage across R

, connected

between the CLP and CLN pins. When this voltage exceeds
100mV, the amplifier will override programmed charging
current to limit adapter current to 100mV/R

. A lowpass

filter formed by 5k

and 15nF is required to eliminate

switching noise. If the current limit is not used, CLN
should be connected to CLP.

Note that the I

pin will be asserted when the voltage

across R

is 93mV, before the adapter limit regulation

threshold.

Table 5. Common R

Resistor Values

ADAPTER

RCL VALUE*

RCL POWER

RATING (A)

(

) 1%

DISSIPATION (W)

RATING (W)

1.5

0.06

0.135

0.25

1.8

0.05

0.162

0.25

0.045

0.18

0.25

2.3

0.039

0.206

0.25

2.5

0.036

0.225

0.5

2.7

0.033

0.241

0.5

0.03

0.27

0.5

* Values shown above are rounded to nearest standard value.

As is often the case, the wall adapter will usually have at
least a +10% current limit margin and many times one can
simply set the adapter current limit value to the actual
adapter rating (see Table 5).

Designing the Thermistor Network

There are several networks that will yield the desired
function of voltage vs temperature needed for proper
operation of the thermistor. The simplest of these is the
voltage divider shown in Figure 8. Unfortunately, since the
HIGH/LOW comparator thresholds are fixed internally,
there is only one thermistor type that can be used in this
network; the thermistor must have a HIGH/LOW resis-
tance ratio of 1:7. If this happy circumstance is true for
you, then simply set R9 = R

TH(LOW)

If you are using a thermistor that doesn't have a 1:7 HIGH/
LOW ratio, or you wish to set the HIGH/LOW limits to
different temperatures, then the more generic network in
Figure 9 should work.

CLP

15nF

LTC4008

CLN

100mV

4008 F07

TO
SYSTEM
LOAD

CL1

100mV

ADAPTER CURRENT LIMIT

Figure 7. Adapter Current Limiting

Setting Input Current Limit

To set the input current limit, you need to know the
minimum wall adapter current rating. Subtract 5% for the
input current limit tolerance and use that current to deter-
mine the resistor value.

= 100mV/I

LIM

= Adapter Min Current

(Adapter Min Current · 5%)

LTC4008

NTC

4008 F08

Figure 8. Voltage Divider Thermistor Network

LTC4008

NTC

R9A

4008 F09

Figure 9. General Thermistor Network

LTC4008

4008i

APPLICATIO S I FOR ATIO

Once the thermistor, R

, has been selected and the

thermistor value is known at the temperature limits, then
resistors R9 and R9A are given by:

For NTC thermistors:

R9 = 6 R

TH(LOW)

· R

TH(HIGH)

/(R

TH(LOW)

TH(HIGH)

)

R9A = 6 R

TH(LOW)

· R

TH(HIGH)

/(R

TH(LOW)

7 · R

TH(HIGH)

)

For PTC thermistors:

R9 = 6 R

TH(LOW)

· R

TH(HIGH)

/(R

TH(HIGH)

TH(LOW)

)

R9A = 6 R

TH(LOW)

· R

TH(HIGH)

/(R

TH(HIGH)

7 · R

TH(LOW)

)

Example #1: 10k

NTC with custom limits

TLOW = 0

C, THIGH = 50

= 10k at 25

TH(LOW)

= 32.582k at 0

TH(HIGH)

= 3.635k at 50

R9 = 24.55k

24.3k (nearest 1% value)

R9A = 99.6k

100k (nearest 1% value)

Example #2: 100k

NTC

TLOW = 5

C, THIGH = 50

= 100k at 25

TH(LOW)

= 272.05k at 5

TH(HIGH)

= 33.195k at 50

R9 = 226.9k

226k (nearest 1% value)

R9A = 1.365M

1.37M (nearest 1% value)

Example #3: 22k

PTC

TLOW = 0

C, THIGH = 50

= 22k at 25

TH(LOW)

= 6.53k at 0

TH(HIGH)

= 61.4k at 50

R9 = 43.9k

44.2k (nearest 1% value)

R9A = 154k

Sizing the Thermistor Hold Capacitor

During the hold interval, C7 must hold the voltage across
the thermistor relatively constant to avoid false readings.
A reasonable amount of ripple on NTC during the hold
interval is about 10mV to 15mV. Therefore, the value of C7
is given by:

C7 = t

HOLD

/(R9/7 · ln(1 8 · 15mV/4V))

= 10 · R

· 17.5pF/(R9/7 · ln(1 8 · 15mV/4V)

Example:

R9 = 24.3k
R

= 150k

C7 = 0.25

0.27

F (nearest value)

Disabling the Thermistor Function

If the thermistor is not needed, connecting a resistor
between DCIN and NTC will disable it. The resistor should
be sized to provide at least 10

A with the minimum voltage

applied to DCIN and 10V at NTC. Generally, a 301k resistor
will work for DCIN less than 15V. A 499k resistor is
recommended for DCIN greater than 15V.

Using the LTC4008-1 (Refer to Figure 10)

The LTC4008-1 is intended for applications where the
battery power is fully isolated from the charger and wall
adapter connections. An example application is a system
with multiple batteries such that the charger's output
power passes through a downstream power path or
selector system. Typically these systems also provide
isolation and control the wall adapter power. To reduce
cost in such systems, the LTC4008-1 removes the re-
quirement for the wall adapter INFET function or blocking
diode. Wall adapter or ACP detection is also removed
along with micropower shutdown mode. Asserting of the
SHDN pin only puts the charger into standby mode.
Failure to isolate the battery power from ANY of the
LTC4008-1 pins when wall adapter power is removed or
lost will only drain the battery at the IC quiescent current
rate. More specifically, high current is drawn from the
DCIN, CLP and CLN pins. Suggested devices to isolate
power from the charger include simple diodes, electrical
or mechanical switches or power path control devices
such as the LTC4412 low loss PowerPath

controller.

Because the switcher operation is continuous under nearly
all conditions, precautions must be taken to prevent the
charger from boosting the input voltage above maximum
voltage values on the input capacitors or adapter. Z1 and
Q3 will shut down the charger if the input voltage exceeds
a safe value.

PowerPath is a trademark of Linear Technology Corporation.

LTC4008

4008i

APPLICATIO S I FOR ATIO

BATMON

SHDN

FAULT

FLAG

NTC

GND

FAULT

FLAG

DCIN

CLP

CLN

TGATE

BGATE

PGND

CSP

BAT

PROG

LTC4008-1

R10 32.4k 1%

140k

0.25%

C6
0.12

THERMISTOR
10k
NTC

Q3
2N7002

0.47

R12
100k

R11
100k

LOGIC

DCIN

0V TO 28V

R7
6.04k
1%

R9
15k
0.25%

R13
1.5k

150k

C1
0.1

C4
15nF

C2
20

SYSTEM
LOAD

5.1k

R4 3.01k 1%

R5 3.01k 1%

SENSE

0.025

0.02

C3
20

0.0047

4008 F10

Q5
2N7002

R6
28.7k
1%

CHARGE

R26
150k

Li-Ion
BATTERY

D1: MBRS130T3
Q1: Si4431DY
Q2: FDC6459
Z1 VALUE SIZED FOR ABSOLUTE MAXIMUM ADAPTER VOLTAGE

Figure 10. Typical LTC4008-1 Application (12.3V/4A)

PCB Layout Considerations

For maximum efficiency, the switch node rise and fall
times should be minimized. To prevent magnetic and
electrical field radiation and high frequency resonant prob-
lems, proper layout of the components connected to the IC
is essential. (See Figure 11.) Here is a PCB layout priority
list for proper layout. Layout the PCB using this specific
order.

1. Input capacitors need to be placed as close as possible

to switching FET's supply and ground connections.
Shortest copper trace connections possible. These
parts must be on the same layer of copper. Vias must
not be used to make this connection.

2. The control IC needs to be close to the switching FET's

gate terminals. Keep the gate drive signals short for a
clean FET drive. This includes IC supply pins that con-
nect to the switching FET source pins. The IC can be
placed on the opposite side of the PCB relative to above.

3. Place inductor input as close as possible to switching

FET's output connection. Minimize the surface area of
this trace. Make the trace width the minimum amount
needed to support current--no copper fills or pours.
Avoid running the connection using multiple layers in
parallel. Minimize capacitance from this node to any
other trace or plane.

4. Place the output current sense resistor right next to

the inductor output but oriented such that the IC's
current sense feedback traces going to resistor are not
long. The feedback traces need to be routed together
as a single pair on the same layer at any given time with
smallest trace spacing possible. Locate any filter
component on these traces next to the IC and not at the
sense resistor location.

5. Place output capacitors next to the sense resistor

output and ground.

6. Output capacitor ground connections need to feed

into same copper that connects to the input capacitor
ground before tying back into system ground.

LTC4008

4008i

General Rules

7. Connection of switching ground to system ground or

internal ground plane should be single point. If the
system has an internal system ground plane, a good
way to do this is to cluster vias into a single star point
to make the connection.

8. Route analog ground as a trace tied back to IC ground

(analog ground pin if present) before connecting to
any other ground. Avoid using the system ground
plane. CAD trick: make analog ground a separate
ground net and use a 0

resistor to tie analog ground

to system ground.

9. A good rule of thumb for via count for a given high

current path is to use 0.5A per via. Be consistent.

CSP

4008 F12

DIRECTION OF CHARGING CURRENT

SENSE

BAT

Figure 12. Kelvin Sensing of Charging Current

4008 F11

BAT

HIGH

FREQUENCY

CIRCULATING

PATH

BAT

SWITCH NODE

Figure 11. High Speed Switching Path

APPLICATIO S I FOR ATIO

10. If possible, place all the parts listed above on the same

PCB layer.

11. Copper fills or pours are good for all power connec-

tions except as noted above in Rule 3. You can also use
copper planes on multiple layers in parallel too--this
helps with thermal management and lower trace in-
ductance improving EMI performance further.

12. For best current programming accuracy provide a

Kelvin connection from R

SENSE

to CSP and BAT. See

Figure 12 as an example.

It is important to keep the parasitic capacitance on the R

CSP and BAT pins to a minimum. The traces connecting
these pins to their respective resistors should be as short
as possible.

LTC4008

4008i

PACKAGE DESCRIPTIO

GN Package

20-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

.337 .344*

(8.560 8.737)

GN20 (SSOP) 0502

9 10

.229 .244

(5.817 6.198)

.150 .157**

(3.810 3.988)

15 14 13 12

.016 .050

(0.406 1.270)

.015

.004

(0.38

0.10)

TYP

.007 .0098

(0.178 0.249)

.053 .068

(1.351 1.727)

.008 .012

(0.203 0.305)

.004 .0098

(0.102 0.249)

.0250

(0.635)

BSC

.058

(1.473)

REF

.254 MIN

RECOMMENDED SOLDER PAD LAYOUT

.150 .165

.0250 TYP

.0165

.0015

.045

.005

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

INCHES

(MILLIMETERS)

NOTE:
1. CONTROLLING DIMENSION: INCHES

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

LTC4008

4008i

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900

FAX: (408) 434-0507

www.linear.com

LINEAR TECHNOLOGY CORPORATION 2003

LT/TP 0103 1.5K · PRINTED IN USA

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TYPICAL APPLICATIO

BATMON

ACP/SHDN

FAULT

FLAG

NTC

GND

ACP

FAULT

FLAG

DCIN

INFET

CLP

CLN

TGATE

BGATE

PGND

CSP

BAT

PROG

LTC4008

R7
6.04k
1%

13.3k

0.25%

RT
150k

C6
0.12

THERMISTOR

10k

NTC

C7
0.47

R12
100k

147k

0.25%

R10 32.4k 1%

R11
100k

LOGIC

DCIN

0V TO 20V

C1
0.1

INPUT SWITCH

C4
0.1

R1 5.1k 1%

R4 3.01k 1%

R5 3.01k 1%

SENSE

0.025

0.02

C3
20

NiMH
BATTERY
PACK

CHARGING
CURRENT
MONITOR

SYSTEM
LOAD

26.7k

C5
0.0047

D1: MBRS130T3
Q1: Si4431ADY
Q2: FDC645N

4008 TA02

NiMH/4A Battery Charger

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LTC4008EGN

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LTC4008EGN