LTC6900
1
6900f
, LTC and LT are registered trademarks of Linear Technology Corporation.
s
One External Resistor Sets the Frequency
s
1kHz to 20MHz Frequency Range
s
500
A Typical Supply Current, V
S
= 3V, 3MHz
s
Frequency Error
1.5% Max, 5kHz to 10MHz
(T
A
= 25
C)
s
Frequency Error
2% Max, 5kHz to 10MHz
(T
A
= 0
C to 70
C)
s
40ppm/
C Temperature Stability
s
0.04%/V Supply Stability
s
50%
1% Duty Cycle 1kHz to 2MHz
s
50%
5% Duty Cycle 2MHz to 10MHz
s
Fast Start-Up Time: 50
s to 1.5ms
s
100
CMOS Output Driver
s
Operates from a Single 2.7V to 5.5V Supply
s
Low Profile (1mm) ThinSOT
TM
Package
Low Power, 1kHz to 20MHz
Resistor Set SOT-23 Oscillator
s
Portable and Battery-Powered Equipment
s
PDAs
s
Cell Phones
s
Low Cost Precision Oscillator
s
Charge Pump Driver
s
Switching Power Supply Clock Reference
s
Clocking Switched Capacitor Filters
s
Fixed Crystal Oscillator Replacement
s
Ceramic Oscillator Replacement
The LTC
6900 is a precision, low power oscillator that is
easy to use and occupies very little PC board space. The
oscillator frequency is programmed by a single external
resistor (R
SET
). The LTC6900 has been designed for high
accuracy operation (
1.5% frequency error) without the
need for external trim components.
The LTC6900 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/fall
times and rail-to-rail switching. The frequency-setting
resistor can vary from 10k
to 2M
to select a master
oscillator frequency between 100kHz and 20MHz (5V
supply). The three-state DIV input determines whether the
master clock is divided by 1, 10 or 100 before driving the
output, providing three frequency ranges spanning 1kHz
to 20MHz (5V supply). The LTC6900 features a proprietary
feedback loop that linearizes the relationship between
R
SET
and frequency, eliminating the need for tables to
calculate frequency. The oscillator can be easily pro-
grammed using the simple formula outlined below:
f
MHz
k
N R
N
Open
OSC
SET
=
=
=
=
=
+
10
20
100
10
1
,
,
,
,
DIV Pin
V
DIV Pin
DIV Pin GND
Clock Generator
V
+
1
2
3
5
1kHz
f
OSC
20MHz
5V
5V, N = 100
10k
R
SET
2M
0.1
F
6900 TA01
4
GND
LTC6900
SET
OUT
DIV
OPEN, N = 10
N = 1
f
OSC
= 10MHz
20k
N R
SET
( )
ThinSOT is a trademark of Linear Technology Corporation.
R
SET
vs Desired Output Frequency
APPLICATIO S
U
FEATURES
TYPICAL APPLICATIO
U
DESCRIPTIO
U
DESIRED OUTPUT FREQUENCY (Hz)
10
R
SET
(k
)
100
1k
100k
1M
10M
6900 F02
1
10k
10000
1000
100M
100
10
1
LTC6900
2
6900f
Supply Voltage (V
+
) to GND ........................ 0.3V to 6V
DIV to GND .................................... 0.3V to (V
+
+ 0.3V)
SET to GND ................................... 0.3V to (V
+
+ 0.3V)
Operating Temperature Range (Note 8)
LTC6900C .......................................... 40
C to 85
C
LTC6900I ............................................ 40
C to 85
C
Storage Temperature Range ................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
ORDER PART NUMBER
T
JMAX
= 150
C,
JA
= 256
C/W
LTC6900CS5
LTC6900IS5
(Note 1)
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
+
= 2.7V to 5.5V, R
L
= 5k, C
L
= 5pF, Pin 4 = V
+
unless otherwise noted.
All voltages are with respect to GND.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f
Frequency Accuracy (Notes 2, 3)
V
+
= 5V
5kHz
f
10MHz
0.5
1.5
%
5kHz
f
10MHz, LTC6900C
q
2.0
%
5kHz
f
10MHz, LTC6900I
q
2.5
%
1kHz
f < 5kHz
2
%
10MHz < f
20MHz
2
%
V
+
= 3V
5kHz
f
10MHz
0.5
1.5
%
5kHz
f
10MHz, LTC6900C
q
2.0
%
5kHz
f
10MHz, LTC6900I
q
2.5
%
1kHz
f < 5kHz
2
%
R
SET
Frequency-Setting Resistor Range
f
< 1.5%
V
+
= 5V
20
400
k
V
+
= 3V
20
400
k
f/
T
Freq Drift Over Temp (Note 3)
R
SET
= 63.2k
q
0.004
%/
C
f/
V
Freq Drift Over Supply (Note 3)
V
+
= 3V to 5V, R
SET
= 63.2k
q
0.04
0.1
%/V
Timing Jitter (Note 4)
Pin 4 = V
+
, 20k
R
SET
400k
0.1
%
Pin 4 = Open, 20k
R
SET
400k
0.2
%
Pin 4 = 0V, 20k
R
SET
400k
0.6
%
Long-Term Stability of Output Frequency
300
ppm/
kHr
Duty Cycle (Note 7)
Pin 4 = V
+
or Open (DIV Either by 100 or 10)
q
49
50
51
%
Pin 4 = 0V (DIV by 1), R
SET
= 20k to 400k
q
45
50
55
%
V
+
Operating Supply Range
q
2.7
5.5
V
I
S
Power Supply Current
R
SET
= 400k, Pin 4 = V
+
, R
L
=
V
+
= 5V
q
0.32
0.42
mA
f
OSC
= 5kHz
V
+
= 3V
q
0.29
0.38
mA
R
SET
= 20k, Pin 4 = 0V, R
L
=
V
+
= 5V
q
0.92
1.20
mA
f
OSC
= 10MHz
V
+
= 3V
q
0.68
0.86
mA
V
IH
High Level DIV Input Voltage
q
V
+
0.4
V
V
IL
Low Level DIV Input Voltage
q
0.5
V
I
DIV
DIV Input Current (Note 5)
Pin 4 = V
+
V
+
= 5V
q
2
4
A
Pin 4 = 0V
V
+
= 5V
q
4
2
A
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC SOT-23
1
2
3
V
+
GND
SET
5
4
OUT
DIV
S5 PART MARKING
LTZM
ABSOLUTE AXI U RATI GS
W
W
W
U
PACKAGE/ORDER I FOR ATIO
U
U
W
ELECTRICAL CHARACTERISTICS
Consult LTC Marketing for parts specified with wider operating temperature ranges.
LTC6900
3
6900f
V
OH
High Level Output Voltage (Note 5)
V
+
= 5V
I
OH
= 1mA
q
4.8
4.95
V
I
OH
= 4mA
q
4.5
4.8
V
V
+
= 3V
I
OH
= 1mA
q
2.7
2.9
V
I
OH
= 4mA
q
2.2
2.6
V
V
OL
Low Level Output Voltage (Note 5)
V
+
= 5V
I
OL
= 1mA
q
0.05
0.15
V
I
OL
= 4mA
q
0.2
0.4
V
V
+
= 3V
I
OL
= 1mA
q
0.1
0.3
V
I
OL
= 4mA
q
0.4
0.7
V
t
r
OUT Rise Time
V
+
= 5V
Pin 4 = V
+
or Floating, R
L
=
14
ns
(Note 6)
Pin 4 = 0V, R
L
=
7
ns
V
+
= 3V
Pin 4 = V
+
or Floating, R
L
=
19
ns
Pin 4 = 0V, R
L
=
11
ns
t
f
OUT Fall Time
V
+
= 5V
Pin 4 = V
+
or Floating, R
L
=
13
ns
(Note 6)
Pin 4 = 0V, R
L
=
6
ns
V
+
= 3V
Pin 4 = V
+
or Floating, R
L
=
19
ns
Pin 4 = 0V, R
L
=
10
ns
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
+
= 2.7V to 5.5V, R
L
= 5k, C
L
= 5pF, Pin 4 = V
+
unless otherwise noted.
All voltages are with respect to GND.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Frequencies near 100kHz and 1MHz may be generated using two
different values of R
SET
(see the Selecting the Divider Setting Resistor
paragraph in the Applications Information section). For these frequencies,
the error is specified under the following assumption: 20k < R
SET
200k.
Note 3: Frequency accuracy is defined as the deviation from the
f
OSC
equation.
Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specification is based on characterization and
is not 100% tested. Also, see the Peak-to-Peak Jitter vs Output Frequency
curve in the Typical Performance Characteristics section.
Note 5: To conform with the Logic IC Standard convention, current out of
a pin is arbitrarily given as a negative value.
Note 6: Output rise and fall times are measured between the 10% and
90% power supply levels. These specifications are based on
characterization.
Note 7: Guaranteed by 5V test.
Note 8: The LTC6900C is guaranteed to meet specified performance from
0
C to 70
C. The LTC6900C is designed, characterized and expected to
meet specified performance from 40
C to 85
C but is not tested or QA
sampled at these temperatures. The LTC6900I is guaranteed to meet
specified performance from 40
C to 85
C.
ELECTRICAL CHARACTERISTICS
LTC6900
4
6900f
Output Resistance
vs Supply Voltage
SUPPLY VOLTAGE (V)
2.5
3.0
40
OUTPUT RESISTANCE (
)
80
140
3.5
4.5
5.0
6900 G05
60
120
100
4.0
5.5
6.0
OUTPUT SINKING CURRENT
OUTPUT SOURCING CURRENT
T
A
= 25
C
LTC6900 Output Operating at
20MHz, V
S
= 5V
1V/DIV
12.5ns/DIV
6900 G06
1V/DIV
25ns/DIV
6900 G07
V
+
= 5V, R
SET
= 10k, C
L
= 10pF
V
+
= 3V, R
SET
= 20k, C
L
= 10pF
LTC6900 Output Operating at
10MHz, V
S
= 3V
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
R
SET
(
)
1k
VARIATION (%)
4
3
2
1
0
1
2
3
4
10k
100k
1M
6900 G01
TYPICAL LOW
TYPICAL HIGH
T
A
= 25
C
GUARANTEED LIMITS APPLY OVER
20k
R
SET
400k
TEMPERATURE (
C)
40
VARIATION (%)
1.00
0.75
0.50
0.25
0
0.25
0.50
0.75
1.00
6900 G02
20
0
20
40
60
80
TYPICAL
LOW
R
SET
= 63.4k
1 OR
10 OR
100
TYPICAL
HIGH
OUTPUT FREQUENCY (Hz)
JITTER (%
P-P
)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
6900 G03
1k
100k
1M
10k
10M
1, V
A
= 3V
1, V
A
= 5V
10
100
Frequency Variation vs R
SET
Frequency Variation Over
Temperature
Peak-to-Peak Jitter vs Output
Frequency
OUTPUT FREQUENCY (Hz)
SUPPLY CURRENT (mA)
2.0
1.5
1.0
0.5
0
6900 G04
100, 3V
10, 3V
1, 3V
100, 5V
10, 5V
1, 5V
T
A
= 25
C
C
L
= 5pF
0
1k
10k
100k
1M
10M
Supply Current vs Output
Frequency
0V
0V
LTC6900
5
6900f
U
U
U
PI FU CTIO S
V
+
(Pin 1): Voltage Supply (2.7V
V
+
5.5V). This supply
must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a 0.1
F capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane for
best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V
+
deter-
mines the oscillator frequency. The voltage on this pin is
held by the LTC6900 to approximately 1.1V below the V
+
voltage. For best performance, use a precision metal film
resistor with a value between 10k
and 2M
and limit the
capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the
1 setting, the highest frequency range.
Floating Pin 4 divides the master oscillator by 10. Pin 4
should be tied to V
+
for the
100 setting, the lowest
frequency range. To detect a floating DIV pin, the LTC6900
attempts to pull the pin toward midsupply. Therefore,
driving the DIV pin high requires sourcing approximately
2
A. Likewise, driving DIV low requires sinking 2
A.
When Pin 4 is floated, it should preferably be bypassed by
a 1nF capacitor to ground or it should be surrounded by a
ground shield to prevent excessive coupling from other
PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5k
and/or 10pF loads. Heavier loads may cause inaccuracies
due to supply bounce at high frequencies. Voltage tran-
sients, coupled into Pin 5, above or below the LTC6900
power supplies will not cause latchup if the current into/
out of the OUT pin is limited to 50mA.
BLOCK DIAGRA
W
+
1
3
GAIN = 1
V
+
V
BIAS
I
RES
I
RES
R
SET
SET
GND
PATENT PENDING
MASTER OSCILLATOR
PROGRAMMABLE
DIVIDER (N)
(
1, 10 OR 100)
V
RES
= (V
+
V
SET
) = 1.1V TYPICALLY
I
RES
(V
+
V
SET
)
MO
= 10MHz 20k
THREE-STATE
INPUT DETECT
GND
V
+
2
A
6900 BD
2
A
OUT
DIVIDER
SELECT
5
DIV
4
2
+
+
LTC6900
6
6900f
THEORY OF OPERATIO
U
As shown in the Block Diagram, the LTC6900's master
oscillator is controlled by the ratio of the voltage between
the V
+
and SET pins and the current (I
RES
) is entering the
SET pin. The voltage on the SET pin is forced to approxi-
mately 1.1V below V
+
by the PMOS transistor and its gate
bias voltage. This voltage is accurate to
8% at a particular
input current and supply voltage (see Figure 1).
A resistor R
SET
, connected between the V
+
and SET pins,
"locks together" the voltage (V
+
V
SET
) and current, I
RES
,
variation. This provides the LTC6900's high precision. The
master oscillation frequency reduces to:
=
MO
SET
MHz
k
R
10
20
The LTC6900 is optimized for use with resistors between
10k and 2M, corresponding to master oscillator frequen-
cies between 100kHz and 20MHz.
To extend the output frequency range, the master oscilla-
tor signal may be divided by 1, 10 or 100 before driving
OUT (Pin 5). The divide-by value is determined by the state
of the DIV input (Pin 4). Tie DIV to GND or drive it below
DESIRED OUTPUT FREQUENCY (Hz)
10
R
SET
(k
)
100
1k
100k
1M
10M
6900 F02
1
10k
10000
1000
100M
100
10
1
Figure 2. R
SET
vs Desired Output Frequency
0.5V to select
1. This is the highest frequency range, with
the master output frequency passed directly to OUT. The
DIV pin may be floated or driven to midsupply to select
10, the intermediate frequency range. The lowest fre-
quency range,
100, is selected by tying DIV to V
+
or
driving it to within 0.4V of V
+
. Figure 2 shows the relation-
ship between R
SET
, divider setting and output frequency,
including the overlapping frequency ranges near 100kHz
and 1MHz.
The CMOS output driver has an on resistance that is
typically less than 100
. In the
1 (high frequency) mode,
the rise and fall times are typically 7ns with a 5V supply and
11ns with a 3V supply. These times maintain a clean
square wave at 10MHz (20MHz at 5V supply). In the
10
and
100 modes, where the output frequency is much
lower, slew rate control circuitry in the output driver
increases the rise/fall times to typically 14ns for a 5V
supply and 19ns for a 3V supply. The reduced slew rate
lowers EMI (electromagnetic interference) and supply
bounce.
I
RES
(
A)
1
0.1
0.8
V
RES
= V
+
V
SET
1.2
1.3
1.4
10
100
1000
6900 F01
1.1
1.0
0.9
V
+
= 5V
V
+
= 3V
Figure 1. V
+
V
SET
Variation with I
RES
LTC6900
7
6900f
APPLICATIO S I FOR ATIO
W
U
U
U
Figure 3. Current Controlled Oscillator
V
+
1
2
3
5
V
+
0.1
F
R
SET
20k
V
CONTROL
0V TO 1.1V
6900 F04
4
GND
N = 1
LTC6900
SET
OUT
DIV
+
10MHz
N
OSC
1
V
CONTROL
1.1V
20k
R
SET
(
)
TYPICAL f
OSC
ACCURACY
0.5%, V
CONTROL
= 0V
8%, V
CONTROL
= 0.5V
Figure 4. Voltage Controlled Oscillator
ALTERNATIVE METHODS OF SETTING THE OUTPUT
FREQUENCY OF THE LTC6900
The oscillator may be programmed by any method that
sources a current into the SET pin (Pin 3). The circuit in
Figure 3 sets the oscillator frequency using a program-
mable current source and in the expression for f
OSC
, the
resistor R
SET
is replaced by the ratio of 1.1V/I
CONTROL
. As
already explained in the "Theory of Operation," the voltage
difference between V
+
and SET is approximately 1.1V,
therefore, the Figure 3 circuit is less accurate than if a
resistor controls the oscillator frequency.
Figure 4 shows the LTC6900 configured as a VCO. A
voltage source is connected in series with an external 20k
resistor. The output frequency, f
OSC
, will vary with
V
CONTROL
, that is the voltage source connected between
V
+
and the SET pin. Again, this circuit decouples the
relationship between the input current and the voltage
between V
+
and SET; the frequency accuracy will be
degraded. The oscillator frequency, however, will mono-
tonically increase with decreasing V
CONTROL
.
SELECTING THE DIVIDER SETTING AND RESISTOR
The LTC6900's master oscillator has a frequency range
spanning 0.1MHz to 20MHz. However, accuracy may
suffer if the master oscillator is operated at greater than
10MHz with a supply voltage lower than 4V. A program-
mable divider extends the frequency range to greater than
three decades. Table 1 describes the recommended fre-
quencies for each divider setting. Note that the ranges
overlap; at some frequencies there are two divider/resistor
combinations that result in the desired frequency.
In general, any given oscillator frequency (f
OSC
) should be
obtained using the lowest master oscillator frequency.
Lower master oscillator frequencies use less power and
are more accurate. For instance, f
OSC
= 100kHz can be
obtained by either R
SET
= 20k, N = 100, master oscillator
= 10MHz or R
SET
= 200k, N = 10, master oscillator = 1MHz.
The R
SET
= 200k approach is preferred for lower power and
better accuracy.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTING
FREQUENCY RANGE
1
DIV (Pin 4) = GND
> 500kHz
*
10
DIV (Pin 4) = Floating
50kHz to 1MHz
100
DIV (Pin 4) = V
+
< 100kHz
*
At master oscillator frequencies greater than 10MHz (R
SET
< 20k
), the
LTC6900 may experience reduced accuracy with a supply voltage less than
4V.
After choosing the proper divider setting, determine the
correct frequency-setting resistor. Because of the linear
correspondence between oscillation period and resis-
tance, a simple equation relates resistance with frequency.
R
k
MHz
N f
SET
OSC
=
20
10
100
10
1
, N =
(R
SETMIN
= 10k, R
SETMAX
= 2M)
Any resistor, R
SET
, tolerance adds to the inaccuracy of the
oscillator, f
OSC
.
V
+
1
2
3
5
182kHz TO 18MHz (TYPICALLY
8%)
V
+
0.1
F
I
CONTROL
1
A TO 100
A
6900 F03
4
GND
N = 1
LTC6900
SET
OUT
DIV
10MHz
N
OSC
I
CONTROL
I
CONTROL
EXPRESSED IN (A)
20k
1.1V
LTC6900
8
6900f
SUPPLY VOLTAGE (V)
2.5
0.05
FREQUENCY DEVIATION (%)
0
0.05
0.10
0.15
3.0
3.5
4.0
4.5
6900 F05
5.0
5.5
85
C
40
C
25
C
R
SET
= 63.2k
PIN 4 = FLOATING (
10)
Figure 5. Supply Sensitivity
TIME AFTER POWER APPLIED (
s)
0
FREQUENCY ERROR (%)
20
30
40
600
400k
1000
6900 F06
10
0
10
200
400
800
50
60
70
63.2k
20k
T
A
= 25
C
V
+
= 5V
POWER SUPPLY REJECTION
Low Frequency Supply Rejection (Voltage Coefficient)
Figure 5 shows the output frequency sensitivity to power
supply voltage at several different temperatures. The
LTC6900 has a guaranteed voltage coefficient of 0.1%/V
but, as Figure 5 shows, the typical supply sensitivity is
twice as low.
High Frequency Power Supply Rejection
The accuracy of the LTC6900 may be affected when its
power supply generates significant noise with a frequency
content in the vicinity of the programmed value of f
OSC
. If
a switching power supply is used to power the LTC6900,
and if the ripple of the power supply is more than 20mV,
make sure the switching frequency and its harmonics are
not related to the output frequency of the LTC6900.
Otherwise, the oscillator may show additional frequency
error.
If the LTC6900 is powered by a switching regulator and the
switching frequency or its harmonics coincide with the
output frequency of the LTC6900, the jitter of the oscillator
output may be affected. This phenomenon will become
noticeable if the switching regulator exhibits ripples be-
yond 30mV.
START-UP TIME
The start-up time and settling time to within 1% of the final
value can be estimated by t
START
R
SET
(3.7
s/k
) +
10
s. Note the start-up time depends on R
SET
and it is
independent from the setting of the divider pin. For in-
stance with R
SET
= 100k, the LTC6900 will settle with 1%
of its 200kHz final value (N = 10) in approximately 380
s.
Figure 6 shows start-up times for various R
SET
resistors.
Figure 7 shows an application where a second set resistor
R
SET2
is connected in parallel with set resistor R
SET1
via
switch S1. When switch S1 is open, the output frequency
of the LTC6900 depends on the value of the resistor R
SET1
.
When switch S1 is closed, the output frequency of the
LTC6900 depends on the value of the parallel combination
of R
SET1
and R
SET2
.
The start-up time and settling time of the LTC6900 with
switch S1 open (or closed) is described by t
START
shown
above. Once the LTC6900 starts and settles, and switch S1
closes (or opens), the LTC6900 will settle to its new output
frequency within approximately 70
s.
Jitter
The Peak-to-Peak Jitter vs Output Frequency graph, in the
Typical Performance Characteristics section, shows the
typical clock jitter as a function of oscillator frequency and
power supply voltage. The capacitance from the SET pin,
(Pin 3), to ground must be less than 10pF. If this require-
ment is not met, the jitter will increase.
Figure 6. Start-Up Time
APPLICATIO S I FOR ATIO
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LTC6900
9
6900f
APPLICATIO S I FOR ATIO
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V
+
1
2
R
SET1
R
SET2
3
S1
5
V
+
6900 F07
4
GND
LTC6900
3V OR 5V
SET
OUT
DIV
10
100
1
f
OSC
= 10MHz
OR
( )
20k
N R
SET1
f
OSC
= 10MHz
(
)
20k
N R
SET1
//R
SET2
Figure 7
A Ground Referenced Voltage Controlled Oscillator
The LTC6900 output frequency can also be programmed
by steering current in or out of the SET pin, as conceptually
shown in Figure 8. This technique can degrade accuracy as
the ratio of (V
+
V
SET
) / I
RES
is no longer uniquely
dependent of the value of R
SET
, as shown in the LTC6900
Block Diagram. This loss of accuracy will become notice-
able when the magnitude of I
PROG
is comparable to I
RES
.
The frequency variation of the LTC6900 is still monotonic.
Figure 9 shows how to implement the concept shown in
Figure 8 by connecting a second resistor, R
IN
, between the
SET pin and a ground referenced voltage source, V
IN
.
For a given power supply voltage in Figure 9, the output
frequency of the LTC6900 is a function of V
IN
, R
IN
, R
SET
and (V
+
V
SET
) = V
RES
:
f
MHz
N
k
R
R
V
V
V
R
R
OSC
IN
SET
IN
RES
IN
SET
=
+
-
(
)
+
+
10
20
1
1
1
(1)
When V
IN
= V
+
, the output frequency of the LTC6900
assumes the highest value and it is set by the parallel
combination of R
IN
and R
SET
. Also note, the output fre-
quency, f
OSC
, is independent of the value of V
RES
= (V
+
V
SET
) so the accuracy of f
OSC
is within the data sheet limits.
When V
IN
is less than V
+
, and expecially when V
IN
ap-
proaches the ground potential, the oscillator frequency,
f
OSC
, assumes its lowest value and its accuracy is affected
by the change of V
RES
= (V
+
V
SET
). At 25
C V
RES
varies
by
8%, assuming the variation of V
+
is
5%. The tem-
perature coefficient of V
RES
is 0.02%/
C.
By manipulating the algebraic relation for f
OSC
above, a
simple algorithm can be derived to set the values of
external resistors R
SET
and R
IN
, as shown in Figure 9.
1. Choose the desired value of the maximum oscillator
frequency, f
OSC(MAX)
, occurring at maximum input volt-
age V
IN(MAX)
V
+
.
2. Set the desired value of the minimum oscillator fre-
quency, f
OSC(MIN)
, occurring at minimum input voltage
V
IN(MIN)
0.
3. Choose V
RES
= 1.1 and calculate the ratio of R
IN
/R
SET
from the following:
R
R
V
V
f
f
V
V
V
f
f
IN
SET
IN MAX
OSC MAX
OSC MIN
IN MIN
RES
OSC MAX
OSC MIN
=
-
(
)
-
-
(
)
(
)
-
-
+
+
(
)
(
)
(
)
(
)
(
)
(
)
1
1 (2)
Figure 9. Implementation of Concept Shown in Figure 8
Figure 8. Concept for Programming via Current Steering
V
+
1
2
R
SET
I
PR
3
5
5V
V
+
6900 F08
4
GND
LTC6900
0.1
F
OPEN
SET
OUT
DIV
10
100
1
I
RES
V
+
1
2
R
SET
V
RES
R
IN
V
IN
3
5
5V
V
+
6900 F09
4
GND
LTC6900
0.1
F
f
OSC
OPEN
SET
OUT
DIV
10
100
1
+
+
LTC6900
10
6900f
APPLICATIO S I FOR ATIO
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Once R
IN
/R
SET
is known, calculate R
SET
from:
R
MHz
N
k
f
V
V
V
R
R
V
R
R
SET
OSC MAX
IN MAX
RES
IN
SET
RES
IN
SET
=
-
(
)
+
+
+
10
20
1
(
)
(
)
(3)
Example 1:
In this example, the oscillator output frequency has small
excursions. This is useful where the frequency of a system
should be tuned around some nominal value.
Let V
+
= 3V, f
OSC(MAX)
= 2MHz for V
IN(MAX)
= 3V and
f
OSC(MIN)
= 1.5MHz for V
IN
= 0V. Solve for R
IN
/R
SET
by
Equation (2), yielding R
IN
/R
SET
= 9.9/1. R
SET
= 110.1k by
Equation (4). R
IN
= 9.9R
SET
= 1.089M. For standard
resistor values, use R
SET
= 110k (1%) and R
IN
= 1.1M
(1%). Figure 10 shows the measured f
OSC
vs V
IN
. The
1.5MHz to 2MHz frequency excursion is quite limited, so
the curve of f
OSC
vs V
IN
is linear.
Example 2:
Vary the oscillator frequency by one octave per volt.
Assume f
OSC(MIN)
= 1MHz and f
OSC(MAX)
= 2MHz, when the
input voltage varies by 1V. The minimum input voltage is
half supply, that is V
IN(MIN)
= 1.5V, V
IN(MAX)
= 2.5V and
V
+
= 3V.
Equation (2) yields R
IN
/R
SET
= 1.273 and Equation (3)
yields R
SET
= 142.8k. R
IN
= 1.273R
SET
= 181.8k. For
standard resistor values, use R
SET
= 143k (1%) and R
IN
=
182k (1%). Figure 11 shows the measured f
OSC
vs V
IN
. For
V
IN
higher than 1.5V, the VCO is quite linear; nonlinearities
occur when V
IN
becomes smaller than 1V, although the
VCO remains monotonic.
Maximum VCO Modulation Bandwidth
The maximum VCO modulation bandwidth is 25kHz; that
is, the LTC6900 will respond to changes in V
IN
at a rate up
to 25kHz. In lower frequency applications however, the
modulation frequency may need to be limited to a lower
rate to prevent an increase in output jitter. This lower limit
is the master oscillator frequency divided by 20, (f
OSC
/20).
In general, for minimum output jitter the modulation
frequency should be limited to f
OSC
/20 or 25kHz, which-
ever is less. For best performance at all frequencies, the
value for f
OSC
should be the master oscillator frequency
(N = 1) when V
IN
is at the lowest level.
V
IN
(V)
0
0.5
1
1.5
2
2.5
3
f
OSC
(MHz)
6900 F10
2.00
1.95
1.90
1.85
1.80
1.75
1.70
1.65
1.60
1.55
1.50
R
IN
= 1.1M
R
SET
= 110k
V
+
= 3V
N = 1
V
IN
(V)
0
0.5
1
1.5
2
2.5
3
f
OSC
(kHz)
6900 F11
3000
2500
2000
1500
1000
500
0
R
IN
= 182k
R
SET
= 143k
V
+
= 3v
N = 1
Figure 11. Output Frequency vs Input Voltage
Figure 10. Output Frequency vs Input Voltage
LTC6900
11
6900f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
U
PACKAGE DESCRIPTIO
Table 2. Variation of V
RES
for Various Values of R
IN
|| R
SET
R
IN
|| R
SET
(V
IN
= V
+
)
V
RES
, V
+
= 3V
V
RES
, V
+
= 5V
20k
0.98V
1.03V
40k
1.03V
1.08V
80k
1.07V
1.12V
160k
1.1V
1.15V
320k
1.12V
1.17V
V
RES
= Voltage across R
SET
Note: All of the calculations above assume V
RES
= 1.1V, although V
RES
1.1V. For completeness,
Table 2 shows the variation of VRES against various parallel combinations of R
IN
and R
SET
(V
IN
= V
+
). Calulate first with V
RES
1.1V, then use Table 2 to get a better approximation of V
RES
,
then recalculate the resistor values using the new value for V
RES
.
Example 3:
V
+
= 3V, f
OSC(MAX)
= 5MHz, f
OSC(MIN)
= 4MHz, N = 1
V
IN(MAX)
= 2.5V, V
IN(MIN)
= 0.5V
R
IN/
R
SET
= 8.5, R
SET
= 43.2k, R
IN
= 365k
Maximum modulation bandwidth is the lesser of 25kHz or
f
OSC(MIN)
/20 (4MHz/20 = 200kHz)
Maximum V
IN
modulation frequency = 25kHz
Example 4:
V
+
= 3V, f
OSC(MAX)
= 400kHz, f
OSC(MIN)
= 200kHz, N = 10
V
IN(MAX)
= 2.5V, V
IN(MIN)
= 0.5V
R
IN/
R
SET
= 3.1, R
SET
= 59k, R
IN
= 182k
APPLICATIO S I FOR ATIO
W
U
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1.50 1.75
(NOTE 4)
2.80 BSC
0.30 0.45 TYP
5 PLCS (NOTE 3)
DATUM `A'
0.09 0.20
(NOTE 3)
S5 TSOT-23 0302
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 0.90
1.00 MAX
0.01 0.10
0.20 BSC
0.30 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
Maximum modulation bandwidth is the lesser of 25kHz or
f
OSC(MIN)
/20 calculated at N =1 (2MHz/20 = 100kHz)
Maximum V
IN
modulation frequency = 25kHz
LTC6900
12
6900f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2002
LT/TP 0902 2K PRINTED IN USA
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1799
1kHz to 30MHz ThinSOT Oscillator
Identical Pinout, Higher Frequency Operation
TYPICAL APPLICATIO S
U
V
+
1
2
3
5
f
OSC
=
10MHz
10
5V
R
T
100k
THERMISTOR
C1
0.1
F
6900 TA02
4
R
T
: YSI 44011 800 765-4974
GND
LTC6900
SET
OUT
DIV
20k
R
T
6900 TA03
1400
1200
1000
800
600
400
200
0
20 10 0
10 20 30 40 50 60 70 80 90
TEMPERATURE (
C)
FREQUENCY (kHz)
MAX
TYP
MIN
Temperature-to-Frequency Converter
Output Frequency vs Temperature
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