LTC6910-1
1
69101f
, LTC and LT are registered trademarks of Linear Technology Corporation.
s
3-Bit Digital Gain Control (0, 1, 2, 5, 10, 20, 50
and 100V/V)
s
8-Pin TSOT-23 Package
s
Rail-to-Rail Input Range
s
Rail-to-Rail Output Swing
s
Single or Dual Supply: 2.7V to 10.5V Total
s
11MHz Gain Bandwidth Product
s
9nV/
Hz Input Noise at Gain of 100
s
120dB Total System Dynamic Range
s
Input Offset Voltage: 3mV (Gain-of-1)
s
Input Offset Voltage: 1.7mV (Gain-of-10)
Digitally Controlled
Programmable
Gain Amplifier in SOT-23
s
Data Acquisition Systems
s
Dynamic Gain Changing
s
Automatic Ranging Circuits
s
Automatic Gain Control
The LTC
6910-1 is a low noise digitally programmable
gain amplifier (PGA) that is easy to use and occupies very
little PC board space. The gain is adjustable using a 3-bit
digital input to select gains of 0, 1, 2, 5, 10, 20, 50 and
100V/V.
The LTC6910-1 is an inverting amplifier with a rail-to-rail
output. When operated with unity gain, the LTC6910-1
will also process rail-to-rail input signals. A half-supply
reference generated internally at the AGND pin supports
single power supply applications. Operating from single
or split supplies from 2.7V to 10.5V, the LTC6910-1 is
offered in an 8-lead TSOT-23 package. For versions with
other gain ranges, see the LTC6910-2 and LTC6910-3
data sheets.
Single Supply Programmable Amplifier
Frequency Response
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
2
1
3
V
IN
V
OUT
= GAIN V
IN
AGND
1
F OR LARGER
PIN 2 (AGND) PROVIDES BUILT-IN HALF-SUPPLY
REFERENCE WITH INTERNAL RESISTANCE OF 5k.
AGND CAN ALSO BE DRIVEN BY A SYSTEM ANALOG
GROUND REFERENCE NEAR HALF SUPPLY
6910 TA01
5
4
LTC6910-1
6
8
V
+
2.7V TO 10.5V
0.1
F
G2 G1 G0
7
G2
0
0
0
0
1
1
1
1
GAIN
0
1
2
5
10
20
50
100
G1
0
0
1
1
0
0
1
1
G0
0
1
0
1
0
1
0
1
FREQUENCY (Hz)
10
GAIN (dB)
30
50
0
20
40
100
10k
100k
1M
10M
6910 G02
10
1k
GAIN OF 100 (DIGITAL INPUT 111)
GAIN OF 1 (DIGITAL INPUT 001)
GAIN OF 2 (DIGITAL INPUT 010)
GAIN OF 5 (DIGITAL INPUT 011)
GAIN OF 10 (DIGITAL INPUT 100)
GAIN OF 20 (DIGITAL INPUT 101)
GAIN OF 50 (DIGITAL INPUT 110)
V
S
= 10V, V
IN
= 5mV
RMS
LTC6910-1
2
69101f
Total Supply Voltage (V+ to V) ............................. 11V
Input Current .....................................................
25mA
Operating Temperature Range (Note 2)
LTC6910-1C ....................................... 40
C to 85
C
LTC6910-1I ........................................ 40
C to 85
C
LTC6910-1H .................................... 40
C to 125
C
Specified Temperature Range (Note 3)
LTC6910-1C ....................................... 40
C to 85
C
LTC6910-1I ........................................ 40
C to 85
C
LTC6910-1H .................................... 40
C to 125
C
Storage Temperature Range ................. 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
ORDER PART NUMBER
T
JMAX
= 150
C,
JA
= 230
C/W
LTC6910-1CTS8
LTC6910-1ITS8
LTC6910-1HTS8
(Note 1)
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
S
= 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), R
L
= 10k
to midsupply point, unless otherwise noted.
TS8 PART MARKING*
LTB5
ABSOLUTE AXI U RATI GS
W
W
W
U
PACKAGE/ORDER I FOR ATIO
U
U
W
ELECTRICAL CHARACTERISTICS
*The temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature
ranges or other gain ranges.
OUT 1
AGND 2
IN 3
V
4
8 V
+
7 G2
6 G1
5 G0
TOP VIEW
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
Table 1
NOMINAL
NOMINAL
NOMINAL LINEAR INPUT RANGE (V
P-P
)
INPUT
VOLTAGE GAIN
Dual 5V
Single 5V
Single 3V
IMPEDANCE
G2
G1
G0
Volts/Volt
(dB)
Supply
Supply
Supply
(k
)
0
0
0
0
120
10
5
3
(Open)
0
0
1
1
0
10
5
3
10
0
1
0
2
6
5
2.5
1.5
5
0
1
1
5
14
2
1
0.6
2
1
0
0
10
20
1
0.5
0.3
1
1
0
1
20
26
0.5
0.25
0.15
1
1
1
0
50
34
0.2
0.1
0.06
1
1
1
1
100
40
0.1
0.05
0.03
1
GAI SETTI GS A D PROPERTIES
U
U
U
LTC6910-1C
LTC6910-1I
LTC6910-1H
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Voltage Gain (Note 4)
V
S
= 2.7V, Gain = 1, R
L
= 10k
q
0.05
0
0.07
0.06
0
0.07
dB
V
S
= 2.7V, Gain = 1, R
L
= 500
q
0.1 0.02 0.06
0.12 0.02 0.08
dB
V
S
= 2.7V, Gain = 2, R
L
= 10k
q
5.96
6.02
6.08
5.96
6.02
6.08
dB
V
S
= 2.7V, Gain = 5, R
L
= 10k
q
13.85 13.95 14.05
13.83 13.95 14.05
dB
V
S
= 2.7V, Gain = 10, R
L
= 10k
q
19.7
19.9
20.1
19.7
19.9
20.1
dB
V
S
= 2.7V, Gain = 10, R
L
= 500
q
19.6 19.85 20.1
19.4 19.85 20.1
dB
V
S
= 2.7V, Gain = 20, R
L
= 10k
q
25.7
25.9
26.1
25.65 25.9
26.1
dB
V
S
= 2.7V, Gain = 50, R
L
= 10k
q
33.5
33.8
34.1
33.4
33.8
34.1
dB
V
S
= 2.7V, Gain = 100, R
L
= 10k
q
39
39.6
40.2
38.7
39.6
40.2
dB
V
S
= 2.7V, Gain = 100, R
L
= 500
q
37.4
39
40.1
36.4
39
40.1
dB
LTC6910-1
3
69101f
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
S
= 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), R
L
= 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-1C
LTC6910-1I
LTC6910-1H
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Voltage Gain (Note 4)
V
S
= 5V, Gain = 1, R
L
= 10k
q
0.05
0
0.07
0.05
0
0.07
dB
V
S
= 5V, Gain = 1, R
L
= 500
q
0.1 0.01 0.08
0.11 0.01 0.08
dB
V
S
= 5V, Gain = 2, R
L
= 10k
q
5.96
6.02
6.08
5.955 6.02
6.08
dB
V
S
= 5V, Gain = 5, R
L
= 10k
q
13.8 13.95 14.1
13.75 13.95 14.1
dB
V
S
= 5V, Gain = 10, R
L
= 10k
q
19.8
19.9
20.1
19.75 19.9
20.1
dB
V
S
= 5V, Gain = 10, R
L
= 500
q
19.6 19.85 20.1
19.45 19.85 20.1
dB
V
S
= 5V, Gain = 20, R
L
= 10k
q
25.8
25.9
26.1
25.70 25.9
26.1
dB
V
S
= 5V, Gain = 50, R
L
= 10k
q
33.5
33.8
34.1
33.4
33.8
34.1
dB
V
S
= 5V, Gain = 100, R
L
= 10k
q
39.3
39.7
40.1
39.1
39.7
40.1
dB
V
S
= 5V, Gain = 100, R
L
= 500
q
38
39.2
40.1
37
39.2
40.1
dB
V
S
=
5V, Gain = 1, R
L
= 10k
q
0.05
0
0.07
0.05
0
0.07
dB
V
S
=
5V, Gain = 1, R
L
= 500
q
0.1 0.01 0.08
0.1 0.01 0.08
dB
V
S
=
5V, Gain = 2, R
L
= 10k
q
5.96
6.02
6.08
5.96
6.02
6.08
dB
V
S
=
5V, Gain = 5, R
L
= 10k
q
13.80 13.95 14.1
13.80 13.95 14.1
dB
V
S
=
5V, Gain = 10, R
L
= 10k
q
19.8
19.9
20.1
19.75 19.9
20.1
dB
V
S
=
5V, Gain = 10, R
L
= 500
q
19.7
19.9
20.1
19.6
19.9
20.1
dB
V
S
=
5V, Gain = 20, R
L
= 10k
q
25.8 25.95 26.1
25.75 25.95 26.1
dB
V
S
=
5V, Gain = 50, R
L
= 10k
q
33.7 33.85
34
33.6 33.85
34
dB
V
S
=
5V, Gain = 100, R
L
= 10k
q
39.4
39.8
40.2
39.25 39.8
40.2
dB
V
S
=
5V, Gain = 100, R
L
= 500
q
38.8
39.6
40.1
38
39.6
40.1
dB
Signal Attenuation at Gain = 0 Setting
Gain = 0 (Digital Inputs 000), f = 20kHz
q
122
122
dB
Total Supply Voltage
q
2.7
10.5
2.7
10.5
V
Supply Current
V
S
= 2.7V, V
IN
= 1.35V
q
2
3
2
3
mA
V
S
= 5V, V
IN
= 2.5V
q
2.4
3.5
2.4
3.5
mA
V
S
=
5V, V
IN
= 0V, Pins 5, 6, 7 = 5V or 5V
q
3
4.5
3
4.5
mA
V
S
=
5V, V
IN
= 0V, Pin 5 = 4.5V,
q
3.5
4.9
3.5
4.9
mA
Pins 6, 7 = 0.5V (Note 5)
Output Voltage Swing LOW (Note 6)
V
S
= 2.7V, R
L
= 10k to Midsupply Point
q
12
30
12
30
mV
V
S
= 2.7V, R
L
= 500
to Midsupply Point
q
50
100
50
100
mV
V
S
= 5V, R
L
= 10k to Midsupply Point
q
20
40
20
40
mV
V
S
= 5V, R
L
= 500
to Midsupply Point
q
90
160
90
160
mV
V
S
=
5V, R
L
= 10k to 0V
q
30
50
30
50
mV
V
S
=
5V, R
L
= 500
to 0V
q
180
250
180
250
mV
Output Voltage Swing HIGH (Note 6)
V
S
= 2.7V, R
L
= 10k to Midsupply Point
q
10
20
10
20
mV
V
S
= 2.7V, R
L
= 500
to Midsupply Point
q
50
80
50
80
mV
V
S
= 5V, R
L
= 10k to Midsupply Point
q
10
30
10
30
mV
V
S
= 5V, R
L
= 500
to Midsupply Point
q
80
150
80
150
mV
V
S
=
5V, R
L
= 10k to 0V
q
20
40
20
40
mV
V
S
=
5V, R
L
= 500
to 0V
q
180
250
180
250
mV
Output Short-Circuit Current (Note 7)
V
S
= 2.7V
27
27
mA
V
S
=
5V
35
35
mA
AGND Open-Circuit Voltage
V
S
= 5V
q
2.45
2.5
2.55
2.45
2.5
2.55
V
LTC6910-1
4
69101f
LTC6910-1C
LTC6910-1I
LTC6910-1H
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
AGND (Common Mode) Input Voltage Range
V
S
= 2.7V
q
0.55
1.6
0.7
1.5
V
V
S
= 5V
q
0.7
3.65
1.0
3.25
V
V
S
=
5V
q
4.3
3.5
4.3
3.35
V
AGND Rejection (i.e., Common Mode
V
S
= 2.7V, V
AGND
= 1.1V to 1.6V
q
55
80
50
80
dB
Rejection or CMRR)
V
S
=
5V, V
AGND
= 2.5V to 2.5V
q
55
75
50
75
dB
Power Supply Rejection Ratio (PSRR)
V
S
= 2.7V to
5V
q
60
80
60
80
dB
Offset Voltage Magnitude (Referred to Input)
Gain = 1
q
3.0
15
3.0
18
mV
Gain = 10
q
1.7
10
1.7
12
mV
DC Input Resistance (Note 8)
DC V
IN
= 0V
Gain = 0
>100
>100
M
Gain = 1
q
10
10
k
Gain = 2
q
5
5
k
Gain = 5
q
2
2
k
Gain = 10, 20, 50, 100
q
1
1
k
DC Small-Signal Output Resistance
Gain = 0
0.4
0.4
Gain = 1
0.7
0.7
Gain = 2
1
1
Gain = 5
1.9
1.9
Gain = 10
3.4
3.4
Gain = 20
6.4
6.4
Gain = 50
15
15
Gain = 100
30
30
Gain-Bandwidth Product
Gain = 100, f
IN
= 200kHz
8
11
14
8
11
14
MHz
q
6
11
16
5
11
16
MHz
Slew Rate
V
S
= 5V, V
OUT
= 2.8V
P-P
12
12
V/
s
V
S
=
5V, V
OUT
= 2.8V
P-P
16
16
V/
s
Wideband Noise (Referred to Input)
f = 1kHz to 200kHz
Gain = 0 Output Noise
3.8
3.8
V
RMS
Gain = 1
10.7
10.7
V
RMS
Gain = 2
7.3
7.3
V
RMS
Gain = 5
5.2
5.2
V
RMS
Gain = 10
4.5
4.5
V
RMS
Gain = 20
4.2
4.2
V
RMS
Gain = 50
3.9
3.9
V
RMS
Gain = 100
3.4
3.4
V
RMS
Voltage Noise Density (Referred to Input)
f = 50kHz
Gain = 1
25
25
nV/
Hz
Gain = 2
17
17
nV/
Hz
Gain = 5
12
12
nV/
Hz
Gain = 10
10
10
nV/
Hz
Gain = 20
9.4
9.4
nV/
Hz
Gain = 50
8.9
8.9
nV/
Hz
Gain = 100
8.6
8.6
nV/
Hz
Total Harmonic Distortion
Gain = 10, f
IN
= 10kHz, V
OUT
= 1V
RMS
90
90
dB
0.003
0.003
%
Gain = 10, f
IN
= 100kHz, V
OUT
= 1V
RMS
77
77
dB
0.014
0.014
%
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
S
= 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), R
L
= 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-1
5
69101f
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC6910-1C and LTC6910-1I are guaranteed functional over
the operating temperature range of 40
C to 85
C. The LTC6910-1H is
guaranteed functional over the operating temperature range of 40
C to
125
C.
Note 3: The LTC6910-1C is guaranteed to meet specified performance
from 0
C to 70
C. The LTC6910-1C is designed, characterized and
expected to meet specified performance from 40
C to 85
C but is not
tested or QA sampled at these temperatures. LTC6910-1I is guaranteed to
meet specified performance from 40
C to 85
C. The LTC6910-1H is
guaranteed to meet specified performance from 40
C to 125
C.
Note 4: Gain is measured with a DC large-signal test using an output
excursion between approximately 30% and 70% of supply voltage.
Note 5: Operating all three logic inputs at 0.5V causes the supply current
to increase typically 0.1mA from this specification.
Note 6: Output voltage swings are measured as differences between the
output and the respective supply rail.
Note 7: Extended operation with output shorted may cause junction
temperature to exceed the 150
C limit and is not recommended.
Note 8: Input resistance can vary by approximately
30% part-to-part at a
given gain setting.
The
q
denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at T
A
= 25
C. V
S
= 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), R
L
= 10k
to midsupply point, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LTC6910-1C
LTC6910-1I
LTC6910-1H
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Digital Input "High" Voltage
V
S
= 2.7V
q
2.43
2.43
V
V
S
= 5V
q
4.5
4.5
V
V
S
=
5V
q
4.5
4.5
V
Digital Input "Low" Voltage
V
S
= 2.7V
q
0.27
0.27
V
V
S
= 5V
q
0.5
0.5
V
V
S
=
5V
q
0.5
0.5
V
LTC6910-1
6
69101f
TYPICAL PERFOR A CE CHARACTERISTICS
U
W
Output Voltage Swing
vs Load Current
TEMPERATURE (
C)
50
0.2
GAIN CHANGE (dB)
0.1
0
0.1
0.2
0
50
6910 G01
100
GAIN = 100
V
S
=
2.5V
GAIN = 10
GAIN = 1
FREQUENCY (Hz)
10
GAIN (dB)
30
50
0
20
40
100
10k
100k
1M
10M
6910 G02
10
1k
GAIN OF 100 (DIGITAL INPUT 111)
GAIN OF 1 (DIGITAL INPUT 001)
GAIN OF 2 (DIGITAL INPUT 010)
GAIN OF 5 (DIGITAL INPUT 011)
GAIN OF 10 (DIGITAL INPUT 100)
GAIN OF 20 (DIGITAL INPUT 101)
GAIN OF 50 (DIGITAL INPUT 110)
V
S
= 10V, V
IN
= 5mV
RMS
GAIN
1
0
3dB FREQUENCY (MHz) 2.0
4.0
8.0
7.5
7.0
6.5
5.5
5.0
4.5
3.5
3.0
2.5
1.5
1.0
0.5
10
100
6910 G03
6.0
V
IN
= 5mV
RMS
V
S
= 2.7V
V
S
=
5V
Frequency Response
3dB Bandwidth vs Gain Setting
Power Supply Rejection
vs Frequency
Noise Density vs Frequency
OUTPUT CURRENT (mA)
OUTPUT VOTLAGE SWING (V)
(REFERRED TO SUPPLY VOLTAGE)
+V
S
V
S
0.01
1
10
100
6910 G04
0.1
+V
S
0.5
V
S
+ 0.5
+V
S
1.0
V
S
+ 1.0
+V
S
1.5
V
S
+ 1.5
+V
S
2.0
V
S
+ 2.0
V
S
=
2.5V
85
C
25
C
40
C
SOURCE
SINK
FREQUENCY (kHz)
20
REJECTION (dB)
80
90
10
0
70
40
60
50
30
0.1
10
100
1000
6910 G05
1
+SUPPLY
SUPPLY
V
S
=
2.5V
GAIN = 1
FREQUENCY (kHz)
1
10
100
6910 G06
1
10
100
GAIN = 1
GAIN = 10
GAIN = 100
INPUT REFERRED
V
S
=
2.5V
T
A
= 25
C
VOLTAGE NOISE DENSITY (nV/
Hz)
Distortion with Light Loading
(R
L
= 10k)
THD + Noise vs Input Voltage
FREQUENCY (kHz)
0
60
50
30
150
6910 G07
70
80
50
100
GAIN = 100
GAIN = 10
GAIN = 1
200
90
100
40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
=
2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
FREQUENCY (kHz)
0
60
50
30
150
6910 G08
70
80
50
100
GAIN = 100
GAIN = 10
GAIN = 1
200
90
100
40
0.1
0.3
3
0.03
0.01
0.003
0.001
1
THD (AMPLITUDE BELOW FUNDAMENTAL) (dB)
THD (%)
V
S
=
2.5V
V
OUT
= 1V
RMS
(2.83V
P-P
)
THD MEASURES HD2 AND HD3
INPUT VOLTAGE (V
P-P
)
0.01
60
(THD + NOISE)/SIGNAL (dB)
50
40
30
20
0.1
1
10
6910 G09
70
80
100
110
90
f
IN
= 1kHz
V
S
=
5V
NOISE BW = 22kHz
GAIN SETTING = 100
GAIN SETTING = 10
GAIN SETTING = 1
Distortion with Heavy Loading
(R
L
= 500
)
Gain Shift vs Temperature
LTC6910-1
7
69101f
OUT (Pin 1): Analog Output. This is the output of an
internal operational amplifier and swings to near the
power supply rails (V
+
and V
) as specified in the Electrical
Characteristics table. The internal op amp remains active
at all times, including the zero gain setting (digital input
000). As with other amplifier circuits, loading the output as
lightly as possible will minimize signal distortion and gain
error. The Electrical Characteristics table shows perfor-
mance at output currents up to 10mA and current limits
that occur when the output is shorted to midsupply at 2.7V
and
5V supplies. Signal outputs above 10mA are pos-
sible but current-limiting circuitry will begin to affect
amplifier performance at approximately 20mA. Long-term
operation above 20mA output is not recommended. Do
not exceed maximum junction temperature of 150
C. The
output will drive capacitive loads up to 50pF. Capacitances
higher than 50pF should be isolated by a series resistor to
preserve AC stability.
AGND (Pin 2): Analog Ground. The AGND pin is at the
midpoint of an internal resistive voltage divider, develop-
ing a potential halfway between the V
+
and V
pins, with an
equivalent series resistance to the pin of nominally 5k
(Figure 3). AGND is also the noninverting input of the
internal op amp, which makes it the ground reference
voltage for the IN and OUT pins. Because of this, very
"clean" grounding is important, including an analog ground
plane surrounding the package. For dual supply operation,
this ground plane should be at zero volts and the AGND pin
should connect directly to the ground plane (Figure 1). For
single supply operation, in contrast, the V
pin typically
connects to system signal ground. The ground plane
should then tie to V
and the AGND pin should be AC-
bypassed to the ground plane (Figure 2) by at least a 1
F
high quality capacitor.
In noise-sensitive single-supply applications, it is impor-
tant to AC-bypass the AGND pin. Otherwise wideband
noise will enter the signal path from the internal voltage-
divider resistors that set the DC voltage on AGND in single-
supply applications. This noise can reduce SNR by 3dB at
high gain settings. The resistors present a Thvenin equiva-
lent of approximately 5k to the AGND pin. An external
capacitor from AGND to the ground plane, whose imped-
ance is well below 5k at frequencies of interest, will
suppress this noise. A 1
F high quality capacitor is effec-
tive for frequencies down to 1kHz. Larger capacitors
extend this suppression to proportionately lower frequen-
cies. This issue does not arise in dual supply applications
because AGND goes directly to ground.
In applications requiring an analog ground reference other
than half the total supply voltage, the user can override the
built-in analog ground reference by tying the AGND pin to
a reference voltage within the AGND voltage range speci-
fied in the Electrical Characteristics table. The AGND pin
will load the external reference with approximately 5k
U
U
U
PI FU CTIO S
LTC6910-1
DIGITAL GROUND PLANE
(IF ANY)
ANALOG
GROUND
PLANE
1
SINGLE-POINT
SYSTEM GROUND
2
3
4
6910 F01
8
7
6
5
0.1
F
V
+
0.1
F
V
LTC6910-1
DIGITAL GROUND PLANE
(IF ANY)
ANALOG
GROUND
PLANE
1
SINGLE-POINT
SYSTEM GROUND
2
3
4
REFERENCE
V
+
2
6910 F02
8
7
6
5
0.1
F
V
+
1
F
Figure 1. Dual Supply Ground Plane Connection
Figure 2. Single Supply Ground Plane Connection
LTC6910-1
8
69101f
+
INPUT R ARRAY
FEEDBACK R ARRAY
V
6910 F03
OUT
V
+
10k
MOS-INPUT
OP AMP
IN
AGND
10k
2
V
4
V
+
8
G1
G2
G0
1
3
CMOS LOGIC
6
7
5
Figure 3. Block Diagram
U
U
U
PI FU CTIO S
returned to the half-supply potential. AGND should still be
capacitively bypassed to a ground plane as noted above.
Do not connect the AGND pin to the V
pin.
IN (Pin 3): Analog Input. The input signal to the amplifier
in the LTC6910-1 is the voltage difference between the IN
and AGND pins. The IN pin connects internally to a digitally
controlled resistance whose other end is a current sum-
ming point at the same potential as the AGND pin (Fig-
ure 3). At unity gain (digital input 001), the value of this
input resistance is approximately 10k
and the IN voltage
range is rail-to-rail (V
+
to V
). At gain settings above unity
(digital input 010 or higher), the input resistance falls, to
nominally 1k
at gain settings of 10V/V or greater (digital
input 100 or greater). Also, the linear input range falls in
inverse proportion to gain. (The higher gains are designed
to boost lower level signals with good noise perfor-
mance.) In the "zero" gain state (digital input 000), analog
switches disconnect the IN pin internally and this pin
presents a very high input resistance. The input may vary
from rail to rail in the "zero" gain setting but the output is
insensitive to it and remains at the AGND potential.
Table 1 summarizes the LTC6910's behavior for all gain
codes. Circuitry driving the IN pin must consider the
LTC6910-1's input resistance and the variation of this
resistance when used at multiple gain settings. Signal
sources with significant output resistance may introduce
a gain error as the source's output resistance and the
LTC6910-1's input resistance form a voltage divider. This
is especially true at the higher gain settings where the
input resistance is lowest.
In single supply voltage applications at elevated gain
settings (digital input 010 or higher), it is important to
remember that the LTC6910-1's DC ground reference for
both input and output is AGND, not V
. With increasing
gains, the LTC6910-1's input voltage range for unclipped
output is no longer rail-to-rail but shrinks toward AGND.
The OUT pin also swings positive or negative with respect
to AGND. At unity gain (digital input 001), both IN and OUT
voltages can swing from rail to rail (Table 1).
V
, V
+
(Pins 4, 8): Power Supply Pins. The V
+
and V
pins
should be bypassed with 0.1
F capacitors to an adequate
analog ground plane using the shortest possible wiring.
Electrically clean supplies and a low impedance ground are
important for the high dynamic range available from the
LTC6910-1 (see further details under AGND). Low noise
linear power supplies are recommended. Switching power
supplies require special care to prevent switching noise
coupling into the signal path, reducing dynamic range.
G0, G1, G2 (Pins 5, 6, 7): CMOS-Level Digital Gain-
Control Inputs. G2 is the most significant bit (MSB). These
pins control the voltage gain from IN to OUT pins. In the
LTC6910-1, the voltage gain range is 0 to 100V/V in eight
discrete values 0, 1, 2, 5, 10, 20, 50, 100, set respectively
by digital inputs 000 through 111 (or in decimal form, 0
through 7). Digital input code 000 causes a "zero" gain
with very low output noise. In this "zero" gain state the IN
pin is disconnected internally, but the OUT pin remains
active and forced by the internal op amp to the voltage
present on the AGND pin. Note that the voltage gain is
inverting: OUT and IN pins always swing on opposite sides
of the AGND potential. The G pins are high impedance
CMOS logic inputs and must be connected (they will float
to unpredictable voltages if open circuited). Table 1 sum-
marizes the effects of the G-pin code. No speed limitation
is associated with the digital logic because it is memoryless
and much faster than the analog signal path.
LTC6910-1
9
69101f
Functional Description
The LTC6910-1 is a small outline, wideband inverting DC
amplifier whose voltage gain is digitally programmable. It
delivers a choice of eight voltage gains, controlled by the
3-bit digital inputs to the G pins, which accept CMOS logic
levels. The gain code is always monotonic; an increase in
the 3-bit binary number (G2 G1 G0) causes an increase in
the gain. LTC6910-1's nominal gain magnitudes are 0, 1,
2, 5, 10, 20, 50, and 100Volts/Volt (like a gain knob on an
instrument). Gain control within the amplifier occurs by
switching resistors from a matched array in or out of a
closed-loop op amp circuit using MOS analog switches
(Figure 3). Bandwidth depends on gain setting. The lower
gains of 1, 2 and 5V/V (digital inputs 001-011) exhibit
respective 3dB frequencies of 7, 5 and 2.5MHz at a
5V
supply. Gain settings from 10 to 100 (digital inputs 100-
111) give constant gain bandwidth intercept of approxi-
mately 11MHz.
Digital Control
Logic levels for the LTC6910-1 digital gain control inputs
(Pins 5, 6, 7) are nominally rail-to-rail CMOS. Logic 1 is V
+
,
logic 0 is V
or alternatively 0V when using
5V supplies.
The part is tested with the values listed in the Electrical
Characteristics table (Digital Input "High" and "Low" Volt-
ages), which are 10% and 90% of full excursion on the
inputs. That is, the tested logic levels are 0.27V and 2.43V
with a 2.7V supply, 0.5V and 4.5V levels with 0V and 5V
supply rails, and 0.5V and 4.5V logic levels at
5V sup-
plies. Do not attempt to drive the digital inputs with TTL
logic levels. TTL sources should be adapted with suitable
pull-up resistors to 5V so that they will swing to the
positive rail.
AC-Coupled Operation
Adding a capacitor in series with the IN pin makes the
LTC6910-1 into an AC-coupled amplifier, suppressing the
source's DC level (also reducing the offset voltage from
the LTC6910-1 itself). No further components are re-
quired because the input of the LTC6910-1 biases itself
correctly when a series capacitor is added. The IN pin
connects to an internal variable resistor (and floats when
DC open-circuited to a well defined voltage equal to the
AGND input voltage at nonzero gain settings). The value of
this internal input resistor varies between 10k and 1k at
LTC6910-1 gain settings of 1V/V to 100V/V (the right-
most column in Table 1). Therefore, with a series input
capacitor the low frequency cutoff will also vary with gain.
For example, for a low frequency corner of 1kHz or lower,
use a series capacitor of 0.16
F or larger. 0.16
F has a
reactance of 1k
at 1kHz, giving a 1kHz lower 3dB
frequency for gain settings of 10V/V through 100V/V. If the
LTC6910-1 is operated at lower gain settings with an
0.16
F input capacitor, the higher input resistance will
reduce the lower corner frequency down to 100Hz at a gain
setting of 1V/V. These frequencies scale inversely with the
value of the input capacitor.
Note that operating the LTC6910-1 in zero gain mode
(digital inputs 000) open circuits the IN pin and this
demands some care if employed with a series input
capacitor. When the chip enters the zero gain mode, the
opened IN pin tends to freeze the voltage across the
capacitor to the value it held just before the zero gain state.
This can place the IN pin at or near the DC potential of a
supply rail (the IN pin may also drift to a supply potential
in this state due to small junction leakage currents). To
prevent driving the IN pin outside the supply limit and
potentially damaging the chip, avoid AC input signals in
the zero gain state with a series capacitor. Also, switching
later to a nonzero gain value will cause a transient pulse at
the output of the LTC6910-1 (with a time constant set by
the capacitor value and the new LTC6910-1 input resis-
tance value). This occurs because the IN pin returns to the
AGND potential and transient current flows to charge the
capacitor to a new DC drop.
Construction and Instrumentation Cautions
Electrically clean construction is important in applications
seeking the full dynamic range of the LTC6910-1 amplifier.
Short, direct wiring will minimize parasitic capacitance
and inductance. High quality supply bypass capacitors of
0.1
F near the chip provide good decoupling from a clean,
low inductance power source. But several cm of wire (i.e.,
a few microhenrys of inductance) from the power sup-
plies, unless decoupled by substantial capacitance
(
10
F) near the chip, can cause a high-Q LC resonance
APPLICATIO S I FOR ATIO
W
U
U
U
LTC6910-1
10
69101f
in the hundreds of kHz in the chip's supplies or ground
reference. This may impair circuit performance at those
frequencies. A compact, carefully laid out printed circuit
board with a good ground plane makes a significant
difference in minimizing distortion. Finally, equipment to
measure amplifier performance can itself introduce dis-
tortion or noise floors. Checking for these limits with a wire
replacing the chip is a prudent routine procedure.
Expanding an ADC's Dynamic Range
Figure 4 shows a compact data acquisition system for
wide ranging input levels. This figure combines an
LTC6910-1 programmable amplifier (8-lead TSOT-23)
with an LTC1864 analog-to-digital converter (ADC) in an
8-lead MSOP. This ADC has 16-bit resolution and a
maximum sampling rate of 250ksps. The LTC6910-1
expands the ADC's input amplitude range by 40dB while
operating from the same single 5V supply. The 499
resistor and 270pF capacitor couple cleanly between the
LTC6910-1's output and the switched-capacitor input of
the LTC1864.
At a gain setting of 10V/V in the LTC6910-1 (digital input
100) and a 250ksps sampling rate in the LTC1864, a 10kHz
input signal at 60% of full scale shows a THD of 87dB at
the digital output of the ADC. 100kHz input signals under
the same conditions produce THD values around 75dB.
Noise effects (both random and quantization) in the ADC
are divided by the gain of the amplifier when referred to V
IN
in Figure 4. Because of this, the circuit can acquire a signal
that is 40dB down from full scale of 5V
P-P
with an SNR of
over 70dB. Such performance from an ADC alone (70 + 40
= 110dB of useful dynamic range at 250ksps), if available,
would be far more expensive.
Low Noise AC Amplifier with Programmable Gain
and Bandwidth
Analog data acquisition can exploit band limiting as well as
gain to suppress unwanted signals or noise. Tailoring an
analog front end to both the level and bandwidth of each
source maximizes the resulting SNR.
Figure 5 shows a block diagram and Figure 6 the practical
circuit for a low noise amplifier with gain and bandwidth
independently programmable over 100:1 ranges. One
LTC6910-1 controls the gain and another controls the
TYPICAL APPLICATIO S
U
5
1
499
270pF
LTC1864
3
V
IN
AGND
GAIN
CONTROL
1
F
1610 F04
6
4
LTC6910-1
7
8
5V
0.1
F
2
1
F
ADC
CONTROL
V
REF
IN
+
IN
GND
5V
V
CC
SCK
SDO
CONV
Figure 4. Expanding an ADC's Dynamic Range
+
+
+
+
V
IN
C1
GAIN CONTROL PGA
(GAIN A)
V
OUT
= (GAIN A)V
IN
BANDWIDTH CONTROL PGA
(GAIN B)
GAIN = 1
C2
R1
R2
V
OUT
6910 F05
1
2
R1C1
BANDWIDTH
1
R2
(GAIN B)
2
C2
Figure 5. Block Diagram of an AC Amplifier with Programmable Gain and Bandwidth
LTC6910-1
11
69101f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
TYPICAL APPLICATIO S
U
+
+
8
7
6
5
V
V
OUT
R4 15.8k
V
V
+
V
+
LT1884
C2
1
F
C1
10
F R1
15.8k
2
7
8
3
V
IN
6
4
5
1
R2
15.8k
0.1
F
GN2 GN1 GN0
0
0
1
GAIN = 1
0
1
0
GAIN = 2
0
1
1
GAIN = 5
1
0
0
GAIN = 10
1
0
1
GAIN = 20
1
1
0
GAIN = 50
1
1
1
GAIN = 100
BW2 BW1BW0
BANDWIDTH 1Hz TO 10Hz
0
0
1
BANDWIDTH 1Hz TO 20Hz
0
1
0
BANDWIDTH 1Hz TO 50Hz
0
1
1
BANDWIDTH 1Hz TO 100Hz
1
0
0
BANDWIDTH 1Hz TO 200Hz
1
0
1
BANDWIDTH 1Hz TO 500Hz
1
1
0
BANDWIDTH 1Hz TO 1000Hz
1
1
1
0.1
F
0.1
F
V
+
V
1
2
3
4
2
7
8
3
6
4
5
1
0.1
F
0.1
F
0.1
F
V
+
V
LTC6910-1
LTC6910-1
R3
15.8k
BANDWIDTH
CONTROL
GAIN
CONTROL
FREQUENCY (Hz)
60
GAIN (dB)
50
30
20
0
10
1
100
1k
100k
6910 F06b
70
10
10k
10
40
80
GN2 GN1 GN0 = 001
BW2
1
BW1
0
BW0
0
BW2
0
BW1
0
BW0
1
BW2
1
BW1
1
BW0
1
Gain vs Frequency
Figure 6. Low Noise AC Amplifier with Programmable Gain and Bandwidth
bandwidth. An LT1884 dual op amp forms an integrating
lowpass loop with capacitor C2 to set the programmable
upper corner frequency. The LT1884 also supports rail-
to-rail output swings over the total supply voltage range
of 2.7V to 10.5V. AC coupling through capacitor C1
establishes a fixed low frequency corner of 1Hz, which can
be adjusted by changing C1. Alternatively, shorting C1
makes the amplifier DC coupled. (If DC gain is not needed,
however, the AC coupling suppresses several error
sources: any shifts in DC levels, low frequency noise and
all amplifier DC offset voltages other than the low inter-
nally trimmed LT1884 offset in the integrating amplifier.)
Measured frequency responses in Figure 6 demonstrate
bandwidth settings of 10Hz, 100Hz and 1kHz, with digital
codes at the BW inputs of respectively 001, 100 and 111,
and unity gain in each case. By scaling C2, this circuit can
serve other frequency ranges, such as a maximum of
10kHz with 0.1
F using LT1884 (gain-bandwidth product
around 1MHz). Noise floor from internal sources yields an
output SNR of 76dB with 10mV
P-P
input, gain of 100 and
100Hz bandwidth; for 100mV
P-P
input, gain of 10 and
1000Hz bandwidth it is 64dB.
LTC6910-1
12
69101f
PART NUMBER
DESCRIPTION
COMMENTS
LT
1228
100MHz Gain Controlled Transconductance Amplifier
Differential Input, Continuous Analog Gain Control
LT1251/LT1256
40MHz Video Fader and Gain Controlled Amplifier
Two Input, One Output, Continuous Analog Gain Control
LTC1564
10kHz to 150kHz Digitally Controlled Filter and PGA
Continuous Time, Low Noise 8th Order Filter and 4-Bit PGA
LTC6910-2
Digitally Controlled PGA
SOT-23, Gains 0, 1, 2, 4, 8, 16, 32, 64V/V
LTC6910-3
Digitally Controlled PGA
SOT-23, Gains 0, 1, 2, 3, 4, 5, 6, 7V/V
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
FAX: (408) 434-0507
q
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2002
LT/TP 0403 1K PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATIO
U
U
PACKAGE DESCRIPTIO
1.50 1.75
(NOTE 4)
2.80 BSC
0.22 0.36
8 PLCS (NOTE 3)
DATUM `A'
0.09 0.20
(NOTE 3)
TS8 TSOT-23 0802
2.90 BSC
(NOTE 4)
0.65 BSC
1.95 BSC
0.80 0.90
1.00 MAX
0.01 0.10
0.20 BSC
0.30 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
3.85 MAX
0.52
MAX
0.65
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637)
2
1
3
V
IN
V
OUT
= GAIN V
IN
AGND
1
F OR LARGER
PIN 2 (AGND) SETS DC OUTPUT VOLTAGE AND HAS
BUILT-IN HALF-SUPPLY REFERENCE WITH INTERNAL
RESISTANCE OF 5k. AGND CAN ALSO BE DRIVEN BY A
SYSTEM ANALOG GROUND REFERENCE NEAR HALF SUPPLY
C1 VALUE SETS LOWER CORNER FREQUENCY.
THE TABLE SHOWS THIS FREQUENCY WITH
C1 = 1
F. THIS FREQUENCY SCALES INVERSELY
WITH C1
6910 TA02
5
4
LTC6910-1
6
8
V
+
2.7V TO 10.5V
0.1
F
G2 G1 G0
7
G2
0
0
0
0
1
1
1
1
PASSBAND
GAIN
0
1
2
5
10
20
50
100
LOWER 3dB FREQ
WITH C1 = 1
F
--
16Hz
32Hz
80Hz
160Hz
160Hz
160Hz
160Hz
G1
0
0
1
1
0
0
1
1
G0
0
1
0
1
0
1
0
1
C1
AC-Coupled Amplifiers
Frequency Response
FREQUENCY (Hz)
100
10
GAIN (dB)
0
10
20
30
40
50
1k
10k
100k
1M
6910 TA03
V
S
= 10V
V
IN
= 5mV
RMS
G2, G1, G0 = 111
G2, G1, G0 = 110
G2, G1, G0 = 101
G2, G1, G0 = 100
G2, G1, G0 = 011
G2, G1, G0 = 010
G2, G1, G0 = 001
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