1
LTC8043
Serial 12-Bit Multiplying
DAC in SO-8
s
Improved Direct Replacement for DAC-8043 and
MAX543
s
SO-8 Package
s
DNL and INL Over Temperature:
0.5LSB
s
Easy, Fast and Flexible Serial Interface
s
1LSB Maximum Gain Error
s
4-Quadrant Multiplication
s
Low Power Consumption
s
Low Cost
The LTC
8043 is a serial-input 12-bit multiplying digital-
to-analog converter (DAC). It is a superior pin compatible
replacement for the DAC-8043. Improvements include
better accuracy, better stability over temperature and
supply variations, lower sensitivity to output amplifier
offset, tighter timing specifications and lower output ca-
pacitance.
An easy-to-use 3-wire serial interface is well-suited to
remote or isolated applications
The LTC8043 is extremely versatile. It can be used for
2-quadrant and 4-quadrant multiplying, programmable
gain and single supply applications, such as noninverting
voltage output mode.
Parts are available in 8-pin SO and PDIP packages and are
specified over the extended industrial temperature range,
40
C to 85
C.
FEATURES
DESCRIPTIO
N
U
s
Process Control and Industrial Automation
s
Remote Microprocessor-Controlled Systems
s
Digitally Controlled Filters and Power Supplies
s
Programmable Gain Amplifiers
s
Automatic Test Equipment
APPLICATIO
N
S
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
N
U
SO-8 Multiplying DAC Has Easy 3-Wire Serial Interface
V
DD
V
REF
LTC8043
R
FB
GND
4
7
6
5
8
5V
V
IN
CLOCK
DATA
LOAD
CLK
SRI
LD
1
2
3
I
OUT
33pF
V
OUT
LTC8043 TA01
+
LT
1097
Integral Nonlinearity Over Temperature
DIGITAL INPUT CODE
0
1.0
INTEGRAL NONLINERARITY (LSB)
0.5
0
1.0
1024
2048 2560
LTC8043 TPC02
0.5
512
1536
3072 3584 4095
T
A
= 25
C
T
A
= 85
C
T
A
= 40
C
2
LTC8043
LTC8043E
LTC8043F
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Resolution
q
12
12
Bits
INL
Integral Nonlinearity
(Note 1)
q
0.5
1
LSB
DNL
Differential Nonlinearity
Guaranteed Monotonic, T
MIN
to T
MAX
q
0.5
1
LSB
GE
Gain Error
(Note 2)
T
A
= 25
C
1
2
LSB
T
MIN
to T
MAX
q
2
2
LSB
Gain Temperature Coefficient
(Note 3)
q
1
5
1
5
ppm/
C
(
Gain/
Temp)
I
LKG
Output Leakage Current
(Note 4)
T
A
= 25
C
5
5
nA
T
MIN
to T
MAX
q
25
25
nA
Zero-Scale Error
T
A
= 25
C
0.03
0.03
LSB
T
MIN
to T
MAX
q
0.15
0.15
LSB
PSRR
Power Supply Rejection Ratio V
DD
= 5V
5%
q
0.0001
0.002
0.0001
0.002
%/%
ABSOLUTE
M
AXI
M
U
M
RATINGS
W
W
W
U
PACKAGE/ORDER I
N
FOR
M
ATIO
N
W
U
U
V
DD
to GND................................................. 0.5V to 7V
Digital Inputs to GND .................. 0.5V to (V
DD
+ 0.5V)
V
IOUT
to GND ............................... 0.5V to (V
DD
+ 0.5V)
V
REF
to GND..........................................................
25V
V
RFB
to GND ..........................................................
25V
Maximum Junction Temperature .......................... 150
C
Operating Temperature Range ............... 40
C to 85
C
Storage Temperature Range ................ 65
C to 150
C
Lead Temperature (Soldering, 10 sec).................. 300
C
LTC8043EN8
LTC8043FN8
LTC8043ES8
LTC8043FS8
ORDER PART
NUMBER
Consult factory for Military grade parts.
ACCURACY CHARACTERISTICS
V
DD
= 5V, V
REF
= 10V, V
IOUT
= GND = 0V, T
A
= T
MIN
to T
MAX
, unless otherwise specified.
ELECTRICAL CHARACTERISTICS
V
DD
= 5V, V
REF
= 10V, V
IOUT
= GND
= 0V, T
A
= T
MIN
to T
MAX
, unless otherwise specified.
T
JMAX
= 150
C,
JA
= 130
C/ W (N8)
T
JMAX
= 150
C,
JA
= 190
C/ W (S8)
1
2
3
4
TOP VIEW
S8 PACKAGE
8-LEAD PLASTIC SO
N8 PACKAGE
8-LEAD PDIP
8
7
6
5
V
REF
R
FB
I
OUT
GND
V
DD
CLK
SRI
LD
ALL GRADES
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Reference Input
R
REF
V
REF
Input Resistance
(Note 5)
q
7
11
15
k
AC Performance (Note 3)
Output Current Settling Time
(Notes 6, 7)
q
0.25
1
s
Multiplying Feedthrough Error
V
REF
=
10V, 10kHz Sinewave
q
0.7
1
mV
P-P
Digital-to-Analog Glitch Energy
(Notes 6, 8)
q
2
20
nVSEC
THD
Total Harmonic Distortion
(Note 9)
q
108
92
dB
Output Noise Voltage Density
(Note 10)
q
17
nV/
Hz
Analog Outputs (Note 3)
C
OUT
Output Capacitance
DAC Register Loaded to All 1s
q
60
90
pF
DAC Register Loaded to All 0s
q
30
60
pF
3
LTC8043
ELECTRICAL CHARACTERISTICS
V
DD
= 5V, V
REF
= 10V, V
IOUT
= GND
= 0V, T
A
= T
MIN
to T
MAX
, unless otherwise specified.
Note 7: To 0.01% for a full-scale change, measured from
falling edge of LD.
Note 8: V
REF
= 0V. DAC register contents changed from all 0s to all 1s or
from all 1s to all 0s.
Note 9: V
REF
= 6V
RMS
at 1kHz. DAC register loaded with all 1s.
Note 10: 10Hz to 100kHz between R
FB
and I
OUT
. Calculation from e
n
=
4KTRB where: K = Boltzmann constant (J/K
); R = resistance (
);
T = resistor temperature (
K); B = bandwidth (Hz).
BLOCK DIAGRA
M
W
The
q
denotes specifications which apply over the full operating
temperature range.
Note 1:
0.5LSB =
0.012% of full scale.
Note 2: Using internal feedback resistor.
Note 3: Guaranteed by design, not subject to test.
Note 4: I
OUT
with DAC register loaded with all 0s.
Note 5: Typical temperature coefficient is 100ppm/
C.
Note 6: I
OUT
load = 100
in parallel with 13pF.
40k
10k
40k
20k
40k
20k
40k
20k
40k
40k
40k
DECODER
BIT 1
(MSB)
BIT 2
BIT 3
BIT 4
BIT 12
(LSB)
CLK
IN
LOAD
V
DD
V
REF
R
FB
I
OUT
SRI
6
GND
4
3
2
8043 BD
DAC REGISTER
INPUT 12-BIT SHIFT REGISTER
5
7
8
1
LD
CLK
ALL GRADES
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Digital Inputs
V
IH
Digital Input High Voltage
q
2.4
V
V
IL
Digital Input Low Voltage
q
0.8
V
I
IN
Digital Input Current
V
IN
= 0V to V
DD
q
0.001
1
A
C
IN
Digital Input Capacitance
V
IN
= 0V,(Note 3)
q
8
pF
Timing Characteristics (Note 3)
t
DS
Serial Input to Clock Setup Time
q
30
5
ns
t
DH
Serial Input to Clock Hold Time
q
60
25
ns
t
SRI
Serial Input Data Pulse Width
q
80
ns
t
CH
Clock Pulse Width High
q
80
ns
t
CL
Clock Pulse Width Low
q
80
ns
t
LD
Load Pulse Width
q
140
ns
t
ASB
LSB Clocked into Input Register
q
0
ns
to Load DAC Register Time
Power Supply
V
DD
Supply Voltage
q
4.75
5
5.25
V
I
DD
Supply Current
Digital Inputs = 0V or V
DD
q
100
A
Digital Inputs = V
IH
or V
IN
q
500
A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
4
LTC8043
TI I G DIAGRA
U
W
W
SRI
LD
PREVIOUS
WORD
BIT 1
MSB
BIT 2
BIT 11
8043TD01
BIT 12
LSB
t
DS
t
DH
t
CH
t
SRI
t
ASB
t
CL
t
LD
CLK INPUT
TYPICAL APPLICATIO
N
S
N
U
Unipolar Operation (2-Quadrant Multiplication)
V
DD
V
REF
LTC8043
R
FB
GND
4
7
6
5
8
5V
V
REF
10V TO 10V
CLK
SRI
LD
1
2
3
I
OUT
33pF
V
OUT
LTC8043 TA03
+
LT1097
P
Table 1. Unipolar Binary Code Table
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
V
REF
(4095/4096)
V
REF
(2048/4096) = V
REF
/ 2
V
REF
(1/4096)
0V
0.1
F
MSB
LSB
1111 1111 1111
1000 0000 0000
0000 0000 0001
0000 0000 0000
ANALOG OUTPUT
V
OUT
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1257
Complete Serial I/O V
OUT
12-Bit DAC
5V to 15V Single Supply in 8-Pin SO and PDIP
LTC1451/LTC1452/LTC1453
Complete Serial I/O V
OUT
12-Bit DACs
3V/5V Single Supply in 8-Pin SO and PDIP
LTC7541A
Parallel I/O Multiplying 12-Bit DAC
12-Bit Wide Input
LTC7543/LTC8143
Serial I/O Mulitplying 12-Bit DACs
Clear Pin and Serial Data Output (LTC8143)
7
6
5
5V
P
0.1
F
V
DD
V
REF
LTC8043
R
FB
GND
4
8
V
REF
10V TO 10V
CLK
SRI
LD
1
2
3
I
OUT
V
OUT
LTC8043 TA04
+
1/2 LT1112
Table 2. Bipolar Offset Binary Code Table
+V
REF
(2047/2048)
+V
REF
(1/2048)
0V
V
REF
(1/2048)
V
REF
(2048/2048) = V
REF
R3
20k
R1
10k
R2
20k
+
1/2 LT1112
DIGITAL INPUT
BINARY NUMBER
IN DAC REGISTER
MSB LSB
1111 1111 1111
1000 0000 0001
1000 0000 0000
0111 1111 1111
0000 0000 0000
ANALOG OUTPUT
V
OUT
33pF
Bipolar Operation (4-Quadrant Multiplication)
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900
q
FAX
: (408) 434-0507
q
TELEX
: 499-3977
LT/GP 1195 PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1995
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