ii
This document contains proprietary information of LSI Logic Corporation. The
information contained herein is not to be used by or disclosed to third parties
without the express written permission of an officer of LSI Logic Corporation.
Document DB15-000161-00, First Edition (July 2000). This document describes
revision A of the LSI Logic Corporation TinyRISC
BDMR4103 Evaluation Board
User's Guide and will remain the official reference source for all
revisions/releases of this product until rescinded by an update.
To receive product literature, visit us at http://www.lsilogic.com.
LSI Logic Corporation reserves the right to make changes to any products
described herein at any time without notice. LSI Logic does not assume any
responsibility or liability arising out of the application or use of any product
described herein, except as expressly agreed to in writing by LSI Logic; nor does
the purchase or use of a product from LSI Logic convey a license under any
patent rights, copyrights, trademark rights, or any other of the intellectual
property rights of LSI Logic or third parties.
Copyright 2000 by LSI Logic Corporation. All rights reserved.
TRADEMARK ACKNOWLEDGMENT
The LSI Logic logo design, TinyRISC, and MiniRISC are registered trademarks
and SerialICE is a trademark of LSI Logic Corporation. All other brand and
product names may be trademarks of their respective companies.
Preface
iii
Preface
This book is the primary reference and user's guide for the TinyRISC
BDMR4103 Evaluation Board. This guide describes the basic features of
the evaluation board, including hookup procedures and system
configuration. For additional information that relates to the board and its
components, refer to "
Related Publications
," on
page iv
.
Audience
This document assumes that you are familiar with microprocessors and
related support devices. The people who benefit from this book are:
Engineers and managers who are evaluating the LR4103
microprocessor for possible use in a system
Engineers who are designing the microprocessor into a system
Organization
This document has the following chapters:
Chapter 1, Introduction
, gives an overview of the BDMR4103
Evaluation Board and describes its features.
Chapter 2, Installation Procedures
, explains how to connect power
to the BDMR4103 Evaluation Board, go through a quick board check
procedure, and install jumpers.
Chapter 3, Board Design and Layout
, describes the design and
layout of the BDMR4103 Evaluation Board.
Chapter 4, PAL Equations
, provides the PAL equations for the
BDMR4103 Evaluation Board.
Chapter 5, Schematics
, contains the schematics for the BDMR4103
Evaluation Board.
Chapter 6, Bill of Materials
, lists the bill of materials for the
BDMR4103 Evaluation Board.
iv
Preface
Related Publications
TinyRISC
EZ4103 EasyMACRO Microprocessor and FBusMacro
Technical Manual, LSI Logic Corporation, Order Number C14068.
TinyRISC
LR4103 Microprocessor Technical Manual, LSI Logic
Corporation, Document Number DB14-000081-00.
TinyRISC
BDMR4103 Evaluation Kit Getting Started, LSI Logic
Corporation, Document Number DB15-000095-00.
MIPS PROM Monitor and C Run-Time Library User's Guide, LSI Logic
Corporation, Order Number C14017.A.
The C Programming Language, 2nd edition 1988, by B Kerringhan and
D. Ritchie, Prentice Hall.
PC16550D Universal Asynchronous Receiver Transmitter with FIFOs,
National Semiconductor Corp
.
Am79C970A PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller
for PCI Local Bus Product, Advanced Micro Devices.
DS1307/DS1308 64 X 8 Serial Real Time Clock, DALLAS
Semiconductor.
Conventions Used in This Manual
The word
assert means to drive a signal true or active. The word
deassert means to drive a signal false or inactive.
Hexadecimal numbers are indicated by the prefix "0x"--for example,
0x32CF. Binary numbers are indicated by the prefix "0b"--for example,
0b0011.0010.1100.1111.
All signals with names ending in "N" are active LOW; otherwise, signals
are active HIGH.
Preface
v
Abbreviations
The following abbreviations are used in this manual. Note that
abbreviated signal names are not listed:
ASE
Application Specific Extension
CPLD
Complex Programmable Logic Device
DIMM
Dual Inline Memory Module
DIN
Deutsches Institut fr Normung
DIP
Dual In-line Package
DMA
Direct Memory Access
DRAM
Dynamic Random Access Memory
EDO
Extended Data Output
EEPROM
Electronically Erasable Programmable Read Only Memory
EJTAG
Enhanced Joint Test Action Group
EPROM
Erasable Programmable Read Only Memory
FAPI
FBus Advanced Peripheral Interface
FBM
FBusMACRO
FET
Field Effect Transistor
ICE
In-Circuit Emulation
ISA
Instruction Set Architecture
ISP
In-System Programmable
JEDEC
Joint Electrical Device Engineering Committee
JTAG
Joint Test Action Group
k
Kilo-ohm
Kbyte
Kilobyte
LED
Light Emitting Diode
M
Megaohm
Mbyte
Megabyte
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