KEYPAD PROGRAMMABLE DIGITAL LOCK
FEATURES
:
Stand alone lock logic
38416, 4-digit combinations
3 different user programmable codes
Momentary and static lock control outputs
Internal key debounce circuit
Tamper detection output
Status outputs
Low current consumption
+4V to +15V operation (V
DD
-V
SS
)
LS7223 (DIP), LS7223-S (SOIC) - See Figure 1
GENERAL DESCRIPTION:
The LS7223 is a programmable electronic lock implemented
in a monolithic CMOS integrated circuit. The circuit contains
all the necessary memory, decoder and control logic to make
a programmable "keyless" lock system to control electro-
mechanical locks. Input is provided by a matrix keypad whose
maximum allowable size is 4 x 4.
The LS7223 can be programmed to recognize 3 different
codes: one to toggle an output and generate a pulse
(Primary), one to toggle an output (Secondary), and one to
toggle an output and trigger an alarm (Duress). Programming
is done via the keypad inputs. Any entry from the keypad
(when not in the program mode) which does not match one of
the 3 programmed codes causes the Tamper output to
become active.
The monolithic, low power CMOS design of the LS7223
enables it to be designed into typical battery backed-up and
automotive type security systems.
DETAILED DESCRIPTION:
CODES - There are 3 different function codes which the
LS7223 can store in memory. Each code consists of a 4 digit
number which must be entered in exact sequence and before
the keypad entry enable time expires. The 3 codes and their
functions are explained below.
1. The Primary code, when entered from the keypad, causes
the Lock 1 output to toggle and the Momentary output to
momentarily go high. Whenever power is first applied to
the LS7223, the circuit defaults to the Primary code
corresponding to the keys X1 Y1, X1 Y2, X2 Y2, X2 Y1.
The code can then be altered to any other 4 digit code by
entering the Program mode and keying in the new code.
2. The Secondary code, when entered from the key-
pad, causes the Lock 2 output to toggle. The first 3
digits of the Secondary code must be identical to the
first 3 digits of the Primary code; the 4th digit may or
may not be identical for the two codes. When the
two codes are the same in all 4 digits, the entry of
the code will cause both the Lock 1 and the Lock 2
outputs to toggle. Whenever power is first applied
to the LS7223, the circuit defaults to the Secondary
code corresponding to the keys X1 Y1, X1 Y2, X2
Y2, X1 Y1. The code can then be altered by
entering the Program mode.
3. The Duress code, when entered from the keypad,
causes the Lock 1 output to toggle; at the same time
the Alarm output will latch high to enable an external
alarm. The first 3 digits of the Duress code must be
identical to the first 3 digits of the Primary and
Secondary codes; the 4th digit must be different to
activate the Alarm output. Whenever power is first
applied to the LS7223, the circuit defaults to the
Duress code corresponding to the keys X1 Y1, X1
Y2, X2 Y2, X1 Y2. The code can then be altered
the same way as the other two codes.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
LSI
CONNECTION DIAGRAM - TOP VIEW
V
DD
(+V)
CAP-K
LOCK DISPLAY
LOCK 1
LOCK 2
ALARM
TAMPER
CAP-M
PROGRAM
MOM
V
SS
(-V)
R C - O S C
X1
X2
X3
X4
Y1
Y2
Y3
Y4
FIGURE 1
LS7223
December 2002
LSI/CSI
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405
LS7223
7223-121102-1
UL
A3800
PROGRAM MODE
The current Primary/Secondary/Duress codes may be altered to
any value by initializing the Program Mode. The steps involved for
altering the codes are:
1. Enter the current Secondary code causing the Lock 2 output
to toggle.
2. Before the keypad entry enable time expires, enter the key
corresponding to matrix position X4 Y1 two times. This will
cause the Program Mode output to latch high, indicating that
the circuit is now in the Program mode. The keypad entry
enable timer is disabled during the Program mode.
3. Enter a 6-digit number from the keypad. The Program Mode
output will latch low, indicating that the new codes have
successfully been programmed. Of the 6 digits, the first 4
constitute the Primary code; the first 3 and the 5th constitute
the Secondary code and the first 3 and the 6th constitute the
Duress code. If an error is introduced or it is desired to
change the codes before the 6th digit is typed, enter the key
X4 Y3. This will reset the internal memory pointer of the
LS7223 and a new 6-digit number can be entered.
KEYPAD INTERFACE
The four X inputs and four Y outputs are designed for keypad
interface (see Fig. 2). Since the X inputs have internal pull-ups,
the maximum matrix size of 4 by 4 does not have to be utilized.
During normal operation, the LS7223 will scan the matrix look-
ing for a switch closure. Once a closure has been detected,
the internal key debounce logic determines if a "valid" key has
been pressed or that if noise is just present. Only one valid
input will be generated with any key closure. The use of
internal key debouncing and Schmitt triggers on the inputs
provides the LS7223 with very high noise immunity.
TAMPER
When a valid key has been detected by the LS7223, the entry
is compared against the appropriate reference in the internal
memory. If the requirements of digit value and code sequential
position are not fulfilled, the Tamper output will momentarily go
high; this indicates that an illegal code entry was attempted.
The keypad entry enable timer and memory pointer will both be
reset so that entry of the code can be attempted again.
TABLE 1. PIN DESCRIPTIONS
PIN
FUNCTION
DESCRIPTION
1
Vss
Supply voltage negative.
2
RC-OSC
Determines the LS7223's internal clock frequency, which is used for keypad scanning and
debounce. A resistor (to V
DD
) and a capacitor (to Vss) connected to this input sets the
frequency. With a 1.5M
resistor and a 100pF capacitor, the internal frequency is typically
10KHz and the internal anti-bounce is typically 25ms.
3, 4, 5, 6
X1, X2, X3, X4
The four X inputs and four Y outputs are designed to interface to a keypad matrix
7, 8, 9, 10
Y1, Y2, Y3, Y4
whose maximum allowable size is 4 by 4.
11
PROGRAM MODE
This output goes high when the program mode is initiated. It resets to a low state after the 6-
digit Primary/Secondary/Duress combination code has been programmed.
12
CAP-M
A capacitor connected between this input and Vss controls the duration of the Momentary
and Tamper outputs.
13
TAMPER
Whenever a key is entered that is not a valid code element, this output goes high for a
period determined by the capacitor on the CAP-M input.
14
MOMEMTARY
This output generates an active high output every time the Primary code is entered. The
duration of this output is determined by the capacitor on the CAP-M input.
15
ALARM
When the Duress code is entered, this output latches high to enable an external alarm. The
Alarm output resets to a low state when the Primary code is entered again. This output pow-
ers-up to a low state.
16
LOCK 2
Whenever the Secondary code is entered, this output toggles. The output powers-up into a
low state.
17
LOCK1
When ever the Primary code or the Duress code is entered, this output toggles. The output
powers-up into a low state.
18
LOCK STATUS
Functionally, this output is identical to the Lock 1 output, with the exception that its polarity is
reversed with respect to the Lock 1 output. This output is intended for driving a display lamp
to indicate the lock status.
19
CAP-K
A capacitor connected between this input and Vss sets the time limit for entering a 4 digit
code from the keypad. (6 digits when initiating the Program Mode.)
20
V
DD
Supply voltage positive.
7223-013001-2
Quiescent supply current: (100pF capacitor to Vss and 1.5M
resistor to V
DD
, connected to the RC-OSC input)
SYMBOL
V
DD
MAX
UNIT
I
DD
5V
15
A
I
DD
9V
25
A
I
DD
12V
30
A
MAXIMUM RATINGS: (Voltages references to Vss)
RATING
SYMBOL
VALUE
UNIT
DC supply voltage
V
DD
+4 to +18
V
Operating temperature range
T
A
-25 to +70
C
Storage temperature
T
STG
-65 to +150
C
DC Electrical Characteristics:
(Vss = 0V, V
DD
= +4V to +15V, = 25C
TA
+70C unless otherwise specified)
PARAMETER
CONDITIONS
V
DD
MIN
TYP
MAX
UNIT
Output source current
Logic 1 Output
5V
1.50
2.50
-
mA
Momentary, Alarm, Lock 1,
V
OUT
V
DD
- 2V
12V
5.60
8.25
-
mA
Lock 2, Program Mode Outputs
15V
7.25
10.7
-
mA
Output Sink Current
Logic 0 Output
5V
.400
.60
-
mA
Momentary, Alarm, Lock 1,
V
OUT
Vss + 0.4V
12V
1.20
1.70
-
mA
Lock 2, Program Mode Outputs
15V
1.50
2.25
-
mA
Output Source Current
Logic 1 Output
5V
.25
.400
-
mA
Tamper Output
V
OUT
V
DD
- 2V
12V
.90
1.30
-
mA
15V
1.10
1.70
-
mA
Output Sink Current
Logic 0 Output
5V
.060
.100
-
mA
Tamper Output
V
OUT
Vss + 0.4V
12V
.200
.290
-
mA
15V
.250
.370
-
mA
Input Level Detection
V
IH
= Logic 1
5V
3.5
-
V
DD
V
All Inputs
12V
8.0
-
V
DD
V
15V
10.0
-
V
DD
V
V
IL
= Logic 0
5V
Vss
-
1.6
V
12V
Vss
-
4.0
V
15V
Vss
-
5.0
V
KEYPAD ENTRY TIME vs. CAPACITOR ON CAP-K INPUT
ENTRY TIME IN SECONDS
CAPACITANCE IN F
5.0
4.0
3.0
2.0
1.0
1
0
2
3
4
5
6
7
8
9
10
V
DD
= 5V
V
DD
= 9V
V
DD
= 12V
FIGURE 3.
LS7223 PULSE WIDTH ON MOMENTARY AND
TAMPER OUTPUTS vs. CAPACITOR ON CAP-M INPUT
FIGURE 4.
PULSE WIDTH TIME IN SECONDS
CAPACITANCE IN FARADS
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
-
9
10-
8
10
-
7
10
-
6
10
-
5
10-
10
V
DD
= 5V
V
DD
= 9V
V
DD
= 12V
7223-013001-3
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Vss
RC-0SC
X1
X2
X3
X4
Y1
Y2
Y3
Y4
V
DD
CAP-K
LOCK
DISPLAY
LOCK 1
LOCK 2
ALARM
MOM
TAMPER
CAP-M
PROGRAM
R
R
R
R
LOCK
INDICATOR
TO MASTER
ALARM SYSTEM
CONTROLLER
PROGRAM
MODE
INDICATOR
LS7223
X4
X3
X2
X1
Y4
Y3
Y2
Y1
7
8
9
4
5
6
1
2
3
*
#
+V
+V
LOCK #1
LOCK #2
SEE NOTE 3
FIGURE 2. Typical Application
1. Keypad is typical 4 x 3 matrix type. Switch resistance should be
1k
.
2. Configuration shown is typical. The outputs of the LS7223 are functionally designed
to provide either status or display information.
3. Resistors may be added in series with X inputs to provide protection against ESD from the keypad. R = 10k
, 1/4 W
NOTES:
7223-013001-4
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