ii
This document is preliminary. As such, it contains data derived from functional
simulations and performance estimates. LSI Logic has not verified either the
functional descriptions, or the electrical and mechanical specifications using
production parts.
Document MN71-000101-99 A
,
First Edition (February 1995)
This document applies to Revision A of the L64360 and the ATMizerTM Archi-
tecture and to all subsequent versions unless otherwise indicated in a
subsequent edition or an update to this edition of the document.
Publications are stocked at the address given below. Requests should be
addressed to:
LSI Logic Corporation
Literature Distribution, M/S D-102
1551 McCarthy Boulevard
Milpitas, CA 95035
Fax: 408.433.8989
LSI Logic Corporation reserves the right to make changes to any products
herein at any time without notice. LSI Logic does not assume any responsibil-
ity or liability arising out of the application or use of any product described
herein, except as expressly agreed to in writing by LSI Logic; nor does the
purchase or use of a product from LSI Logic convey a license under any patent
rights, copyrights, trademark rights, or any other of the intellectual property
rights of LSI Logic or third parties.
Copyright
1995 by LSI Logic Corporation. All rights reserved.
TRADEMARK ACKNOWLEDGMENT
LSI Logic logo design is a registered trademark and ATMizer and Self-Embed-
ding are trademarks of LSI Logic Corporation. All other brand and product
names may be trademarks of their respective companies.
Preface
iii
Preface
This book is the primary reference and technical manual for the L64360 chip
and the ATMizer Architecture upon which it is based. It contains a complete
functional description of the L64360 and the ATMizer Architecture and
includes complete physical and electrical specifications for the L64360.
Audience
This book assumes that the reader has some familiarity with microprocessors
and related support devices. This book is written for:
s
Engineers and managers who are evaluating the L64360 or the ATMizer
Architecture for possible use in a system
s
Engineers who are designing the L64360 or the ATMizer Architecture into
a system
Organization
This book has the following chapters and appendices:
s
Chapter 1, Introduction,
provides an overview of the ATMizer Architec-
ture, describes some ATMizer Architecture applications, and lists the
ATMizer Architecture's features.
s
Chapter 2, Functional Overview,
provides a functional overview of the
ATMizer Architecture and the L64360 implementation.
s
Chapter 3, Signal Descriptions,
describes the signals that comprise the bit-
level interface to the L64360.
s
Chapter 4, ATMizer Processing Unit (APU) and Prefetch Buffer,
describes the function and operation of the ATMizer Processing Unit and
the Prefetch Buffer.
s
Chapter 5, Instruction RAM (IRAM) and Serial Interface,
describes the
function and operation of the Serial Interface and how to load the Instruc-
tion RAM.
s
Chapter 6, Virtual Channel RAM (VCR),
describes the function and
operation of the Virtual Channel RAM.
iv
Preface
s
Chapter 7, Pacing Rate Unit (PRU),
describes the function and operation
of the Pacing Rate Unit.
s
Chapter 8, DMA Controller (DMAC),
describes the function and opera-
tion of the DMA Controller, which is contained within the Host/DMA Port.
s
Chapter 9, ATM Cell Interface (ACI),
describes the function and opera-
tion of the ATM Cell Interface.
s
Chapter 10, Secondary Port (SP),
describes the function and operation of
the Secondary Port.
s
Chapter 11, System Mapping,
describes the ATMizer Architecture system
hardware map.
s
Chapter 12, Operation,
describes the ATMizer Architecture operation.
s
Chapter 13, Functional Waveforms,
contains and describes the ATMizer
Architecture functional waveforms.
s
Chapter 14, Registers,
describes and summarizes all the ATMizer Archi-
tecture registers.
s
Chapter 15, Specifications,
describes the electrical and mechanical charac-
teristics of the L64360.
s
Appendix A, Glossary of Abbreviations,
provides a glossary of abbrevia-
tions that are used in this manual.
s
Appendix B, Customer Feedback,
provides a form that you may use to
fax LSI Logic your comments on the content and quality of this manual.
Related
Publications
CW33300 Enhanced Self-EmbeddingTM Processor Core User's Manual, Order
No. C14014
LR33300 and LR33310 Self-EmbeddingTM Processors User's Manual, Order
No. J14028
Conventions Used
in this Manual
The first time a word or phrase is defined in this manual, it is italicized.
The following signal naming conventions are used throughout this manual:
s
A level-significant signal that is true or valid when the signal is LOW
always has an overbar (
) over its name.
s
An edge-significant signal that initiates actions on a HIGH-to-LOW transi-
tion always has an overbar (
) over its name.
The word assert means to drive a signal true or active. The word deassert
means to drive a signal false or inactive.
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