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Электронный компонент: SpeedREACHDPS8002

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The
Communications
Company
TM
SpeedREACH
TM
DPS8002 -- Dual
ADSL Full Rate Analog Front End
O V E R V I E W
LSI Logic's SpeedREACH DPS8002 is a highly integrated component
containing two complete analog front ends (AFEs) for full-rate or G.lite ADSL in a
small 12 mm X 12 mm 80-pin package for central office (CO) equipment. In
the receive (RX) portion of the chip, for each channel, the incoming analog
differential signal (maximum level 4 V peak-to-peak differential) enters the chip
at the RX1 In and RX2 In pins, respectively. The analog signal path is partitioned
into a continuous-time (CT) section and an analog-digital converter (ADC). The CT
section consists of a number of stages of programmable gain followed by a 4th-
order low-pass filter. The gain is set by the user by programming the appropriate
receive-gain (RXGAIN) register. The output of the filter is fed directly to the
ADC, which samples at 1.104 MS/s and outputs a 16-bit wide parallel word.
In the transmit (TX) portion of the chip, for each channel, the incoming
16-bit digital word is fed to the digital-analog converter (DAC) at a 4.416 MHz
update rate. The DAC output is re-sampled (de-glitched) and is passed to the
CT section comprising a 4th-order low-pass filter followed by a programmable
attenuation amplifier (PAA). The amount of attenuation is set by the user by
programming the appropriate transmit-gain (TXGAIN) register. The output of the
PAA appears at the TX1 Out or TX2 Out pins, respectively, and can drive an
AC-coupled load of 2 k with maximum level of 2.5 V.
F E A T U R E S
ADSL CO AFE with two full RX and
TX analog signal paths (excluding
POTS reject filter and high-voltage line
drivers/receivers)
Fully monolithic: minimal external
components required (2 precision
resistors, 4 non-critical resistors, and
decoupling capacitors)
Compatible with ITU G.992.1 (G.dmt)
and G.992.2 (G.lite) standards
Upstream RX channel: support for
both 138 kHz and 276 kHz (for ADSL
over ISDN)
Downstream TX channel: support for both
552 kHz (G.lite) and 1.104 MHz (G.dmt)
14-bit linear 1.104 MS/s ADCs and
14-bit linear 4.416 MHz DACs
4th-order low-pass filters for RX/TX paths,
with 5% cutoff frequency accuracy
Programmable gain stages and
attenuators in RX and TX paths
Receive path noise PSD:
<-150 dBm/Hz
Integrated wakeup detector (no DSP
needed for wakeup) supporting both
G.hs (G.994.1) and legacy ANSI
T1E1.413 Issue 2 wakeup protocols
Power: 800 mW max (both channels
operating, full-rate mode)
TX1 Out
TX LPF
1.1MHz/
552kHz
DAC
4.4MHz
4 or 2
PAA
TX2 Out
TX LPF
1.1MHz/
552kHz
DAC
4.4MHz
4 or 2
PAA
ADC
1.1MS/s
RX1 In
Fine PGA
Low-Noise Coarse PGA
RX LPF
138kHz/
276kHz
ADC
1.1MS/s
RX2 In
Fine PGA
Low-Noise Coarse PGA
RX LPF
138kHz/
276kHz
MCLK
35.328 MHz
2 G.hs Wakeup Detectors
1
1
Figure 1. Block diagram of the SpeedREACH DPS8002.
The
Communications
Company
TM
SpeedREACH
TM
DPS8002
The chip requires a single low-jitter 35.328 MHz clock to be applied at the
master clock (MCLK) pin. All clock generation is performed internally and all
converter and sample and hold (S/H) clocks in both RX and TX paths are directly
derived from MCLK. The interface is a low-pincount nibble/serial mode interface.
The SpeedREACH DPS8002 includes an all-analog energy detector to
perform the ADSL wakeup function in the CO (e.g., corresponding to the R-ACT-
REQ tone in the T1.413 ADSL specification, or R-TONES in the G.hs/G.994.1
standard). Most of the CO modem can therefore be powered down while it is
waiting for activity from the CPE device, resulting in considerable power savings.
Either channel can be powered down independently.
A 4-wire serial port provides a simple DSP interface. The serial port is used
to modify internal register values, which in turn control attenuation/gain settings,
filter bandwidths and the power down of individual blocks. The chip is powered
off a +5 V supply, while all digital I/Os run off a +3.3 V supply. The DPS8002 is
available in an 80-pin LQFP plastic package. The operating temperature range is
between -40 C and +80 C.
For more information please call:
LSI Logic Corporation
North American Headquarters
Milpitas, CA
Tel: 800 574 4286
LSI Logic Europe Ltd.
European Headquarters
United Kingdom
Tel: 44 1344 426544
Fax: 44 1344 481039
LSI Logic KK Headquarters
Tokyo, Japan
Tel: 81 3 5463 7165
Fax: 81 3 5463 7820
LSI Logic web site
www.lsilogic.com
LSI Logic logo design, is a registered trademark
and SpeedREACH is a trademark of LSI Logic
Corporation. All other brand and product names
may be trademarks of their respective companies.
LSI Logic Corporation reserves the right to make
changes to any products and services herein at any
time without notice. LSI Logic does not assume any
responsibility or liability arising out of the
application or use of any product or service
described herein, except as expressly agreed to in
writing by LSI Logic; nor does the purchase, lease,
or use of a product or service from LSI Logic
convey a license under any patent rights,
copyrights, trademark rights, or any other of the
intellectual property rights of LSI Logic or of third
parties.
Copyright 2001 by LSI Logic Corporation.
All rights reserved.
Order No. R20030
101.1k.JG.LT - Printed in USA