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(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com

8 Megabit (256K x 32-Bit)

EEPROM MCM

79C0832

01.10.05 Rev 14

EATURES

· 256k x 32-bit EEPROM MCM
· R

-P

® radiation-hardened against natural

· space radiation
· Total dose hardness:

- >100 krad (Si)
- Dependent upon orbit

· Excellent Single event effects

- SEL

> 120 MeV/mg/cm

- SEU > 90 MeV/mg/cm

read mode

- SEU = 18 MeV/mg/cm

write mode

· High endurance

- 10,000 cycles/byte (Page Programming Mode)
- 10 year data retention

· Page Write Mode: 1 to 8 X 128 byte page
· High Speed:

- 150 and 200 ns maximum access times

· Automatic programming

- 10 ms automatic Page/Byte write

· Low power dissipation

- 160 mW/MHz active current
- 880 µ W standby current

ESCRIPTION

Maxwell Technologies' 79C0832 multi-chip module (MCM)
memory features a greater than 100 krad (Si) total dose toler-
ance, dependent upon orbit. Using Maxwell Technologies' pat-
ented radiation-hardened R

-P

® MCM packaging

technology, the 79C0832 is the first radiation-hardened 8
megabit MCM EEPROM for space application. The 79C0832
uses eight 1 Megabit high speed CMOS die to yield an 8
megabit product. The 79C0832 is capable of in-system electri-
cal byte and page programmability. It has a 128 x 8 byte page
programming function to make its erase and write operations
faster. It also features Data Polling and a Ready/Busy signal to
indicate the completion of erase and programming operations.
In the 79C0832, hardware data protection is provided with the
RES pin, in addition to noise protection on the WE signal and
write inhibit on power on and off. Software data protection is
implemented using the JEDEC optional standard algorithm.

Maxwell Technologies' patented R

-P

® packaging technol-

ogy incorporates radiation shielding in the microcircuit pack-
age. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, R

-P

provides greater than 100

krad (Si) radiation dose tolerance. This product is available
with screening up to Maxwell Technologies self-defined Class
K.

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

ABLE

1. 79C0832 P

INOUT

ESCRIPTION

YMBOL

ESCRIPTION

84-77, 29-37

ADDR0 to ADDR16

Address Input

48-55, 66-73, 96,

1-7, 18-25

I/O0 to I/O31

Data Input/Output

Output Enable

41, 43

CE0-1

Chip Enable 0 through 1

Write Enable

10, 17, 28, 40, 44,

58, 65, 76, 87, 93

Power Supply

8, 9, 11-16, 26, 27,

38, 42, 46, 56, 57,

59, 60, 62-64, 74,
75, 85, 86, 88-92,

94, 95

GND

Ground

RDY/BUSY

Ready/Busy

RES

Reset

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

ABLE

2. 79C0832 A

BSOLUTE

AXIMUM

ATINGS

ARAMETER

YMBOL

NIT

Supply Voltage

-0.6

7.0

Input Voltage

-0.5

1. V

min = -3.0V for pulse width <50ns.

7.0

Package Weight

Grams

TBD

Thermal Impedance

C/W

Operating Temperature Range

OPR

-55

125

Storage Temperature Range

STG

-65

150

ABLE

3. 79C0832 R

ECOMMENDED

DC O

PERATING

ONDITIONS

ARAMETER

YMBOL

NIT

Supply Voltage

4.5

5.5

Input Voltage

RES_PIN

-0.3

2.2

-0.5

1. V

min = -1.0V for pulse width < 50 ns

0.8

+0.3

V
V
V

Operating Temperature Range

OPR

-55

125

ABLE

4. D

ELTA

IMITS1

1. Parameters are measured and recorded per MIL-STD-883 for Class K devices

ARAMETER

ARIATION2

2. Specified value in Table 6

CC1A

+/- 10 %

CC1D

+/- 10 %

CC2A

+/- 10 %

- ADDR, CE, OE, WE

+/- 10 %

- D0-D31

+/- 10 %

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

ABLE

5. 79C0832 C

APACITANCE

= 25

C, f = 1 MHz)

ARAMETER

YMBOL

NIT

Input Capacitance : V

= 0V

0-1

A0-A16

RES

Output Capacitance: V

OUT

= 0V

Out

RDY/BSY

O ut

D0-D31

1. Guaranteed by design.

ABLE

6. 79C0832 DC E

LECTRICAL

HARACTERISTICS

= 5V ±10%, T

= -55

+125°C)

ARAMETER

EST

ONDITION

YMBOL

UBGROUPS

NITS

Input Leakage Current

A0-A16, CE,WE, OE

= V

1, 2, 3

µ A

2.2

=0V

1.1

Input Leakage Current
D0-D31

1, 2, 3

µ A

Output Leakage Current (V

= 5.5V, V

OUT

= 5.5V/0.4V)

1, 2, 3

µ A

Standby V

Current

CE = ADDR=WE=OE =V

CC1A

1, 2, 3

µ A

CE = V

IH;

ADDR=WE=OE =V

CC1B

CE = ADDR=WE=OE =V

CC1C

CE =V

, ADDR=WE=OE =0V

CC1D

Operating
V

Current

1,3

OE = 0V ADDR=WE=V

OUT

= 0mA, CE Duty = 100%,

Cycle = 1 us at V

= 5.5V

CC2A

1, 2, 3

OE =ADDR=WE=0V
I

OUT

= 0mA, CE Duty = 100%,

Cycle = 1 us at V

= 5.5V

CC2B

1, 2, 3

OE = 0V ADDR=WE=V

OUT

= 0mA, CE Duty = 100%,

Cycle = 150 ns at V

= 5.5V

CC2C

1, 2, 3

200

OE =ADDR=WE=0V
I

OUT

= 0mA, CE Duty = 100%,

Cycle = 150 ns at V

= 5.5V

CC2D

1, 2, 3

225

Input Voltage

RES_PIN

1, 2, 3

2.2

-0.5

0.8

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

Output Voltage

Data Lines: V

Min, I

= 2.1mA

RDY/BSY_Line: V

Min, I

= 12mA

Data Lines: V

Min, I

= -400µ A

RDY/BSY_Line: V

Min, I

= -12mA

All Outputs: V

Min , I

= -100uA

1, 2, 3

2.4

3.15

- 0.3V

0.4
0.4

--
--
--

V
V
V
V
V

1. All Inputs are tied to V

with a 5.5K

W resistor, except for RES which is 30KW.

2. For RES I

=800uA max.

3. Only one CE Active (Low)

ABLE

7. 79C0832 AC E

LECTRICAL

HARACTERISTICS

FOR

EAD

PERATION

= 5V ±10%, T

= -55

+125°C)

ARAMETER

YMBOL

UBGROUPS

NIT

Address Access Time CE = OE = V

, WE = V

-150
-200

ACC

9, 10, 11

--
--

150
200

Chip Enable Access Time OE = V

, WE = V

-150
-200

9, 10, 11

--
--

150
200

Output Enable Access TIme CE = V

, WE = V

-150
-200

9, 10, 11

0
0

125

Output Hold to Address Change CE = OE =V

, WE = V

-150
-200

9, 10, 11

0
0

--
--

Output Disable to High-Z

CE = V

, WE = V

-150
-200

CE = OE = V

, WE = V

-150
-200

DFR

9, 10, 11

0
0

50
60

350
450

RES to Output Delay CE = OE = V

, WE = V

-150
-200

9, 10, 11

0
0

450
650

1. Test conditions: input pulse levels = 0.4V to 2.4V; input rise and fall times < 20 ns; output load = 1 TTL gate + 100 pF (including

scope and jig); reference levels for measuring timing = 0.8 V/1.8 V.

2. t

and t

DFR

are defined as the time at which the output becomes an open circuit and data is no longer driven.

3. Guaranteed by design.

ABLE

6. 79C0832 DC E

LECTRICAL

HARACTERISTICS

= 5V ±10%, T

= -55

+125°C)

ARAMETER

EST

ONDITION

YMBOL

UBGROUPS

NITS

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

ABLE

8. 79C0832 AC E

LECTRICAL

HARACTERISTICS

FOR

RITE

PERATION

= 5V ±10%, T

= -55

+125°C)

ARAMETER

YMBOL

UBGROUPS

NITS

Address Setup Time

-150
-200

9, 10, 11

0
0

--
--

Chip Enable to Write Setup Time (WE controlled)

-150
-200

9, 10, 11

0
0

--
--

Write Pulse Width
CE controlled

-150
-200

WE controlled

-150
-200

9, 10, 11

250
350

--
--

Address Hold Time

-150
-200

9, 10, 11

150
200

--
--

Data Setup Time

-150
-200

9, 10, 11

100
150

--
--

Data Hold Time

-150
-200

9, 10, 11

10
10

--
--

Chip Enable Hold Time (WE controlled)

-150
-200

9, 10, 11

0
0

--
--

Write Enable to Write Setup Time (CE controlled)

-150
-200

9, 10, 11

0
0

--
--

Write Enable Hold Time (CE controlled)

-150
-200

9, 10, 11

0
0

--
--

Output Enable to Write Setup Time

-150
-200

OES

9, 10, 11

0
0

--
--

Output Enable Hold Time

-150
-200

OEH

9, 10, 11

0
0

--
--

Write Cycle Time

-150
-200

9, 10, 11

--
--

10
10

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

Data Latch Time

-150
-200

9, 10, 11

300
400

--
--

Byte Load Window

-150
-200

9, 10, 11

100
200

--
--

µ s

Byte Load Cycle

-150
-200

BLC

9, 10, 11

.55
.95

30
30

µ s

Time to Device Busy

-150
-200

9, 10, 11

120
170

--
--

Write Start Time

-150
-200

9, 10, 11

150
250

--
--

RES to Write Setup Time

-150
-200

9, 10, 11

100
200

--
--

µ s

to RES Setup Time

-150
-200

RES

9, 10, 11

1
3

--
--

µ s

1. Use this device in a longer cycle than this value.

2. t

must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the

internal write operation within this value.

3. Next read or write operation can be initiated after t

if polling techniques or RDY/BUSY are used.

4. Guaranteed by design.

ABLE

9. 79C0832 M

ODE

ELECTION

ARAMETER

I/O

RES

RDY/BUSY

Read

OUT

Standby

High-Z

Write

--> V

Deselect

High-Z

Write Inhibit

Data Polling

Data Out (I/O7)

Program Reset

High-Z

1. Refer to the recommended DC operating conditions.

2. For CE

0-1

only one CE can be used ("on") at a time.

ABLE

8. 79C0832 AC E

LECTRICAL

HARACTERISTICS

FOR

RITE

PERATION

= 5V ±10%, T

= -55

+125°C)

ARAMETER

YMBOL

UBGROUPS

NITS

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

IGURE

7. S

OFTWARE

ATA

ROTECTION

IMING

AVEFORM

(1) (

PROTECTION

MODE

)

IGURE

8. S

OFTWARE

ATA

ROTECTION

AVEFORM

(2) (

NON

PROTECTION

MODE

)

EEPROM A

PPLICATION

OTES

This application note describes the programming procedures for the EEPROM modules and with details of various
techniques to preserve data integrity.

Automatic Page Write

Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle. Loading
the first byte of data, the data load window opens 30µ s for the second byte. In the same manner each additional byte
of data can be loaded within 30µ s of the preceding falling edge of either WE or CE. When CE and WE are kept high
for 100µ s after data input, the EEPROM enters the write mode automatically and the data input is written into the
EEPROM.

WE, CE Pin Operation

During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of
WE or CE.

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

Data Polling

Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a
write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is per-
forming a write operation.

RDY/Busy Signal

RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal
goes low (V

OL)

after the first write signal. At the end of the write cycle, the RDY/Busy returns to a high state ( V

RES Signal

When RES is LOW (V

), the EEPROM cannot be read or programmed. The EEPROM data must be protected by

keeping RES low when V

is power on and off. RES should be high (V

) during read and programming operations.

Data Protection

To protect the data during operation and power on/off, the EEPROM has the internal functions described below.

1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.

During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming
mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its
width is 20ns or less in programming mode. Be careful not to allow noise of a width more than 20ns on the control
pins

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

2. Data Protection at V

on/off

When V

is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to

programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable
state during V

on/off by using a CPU reset signal to RES pin.

3. RES Signal

RES should be kept at V

level when V

is turned on or off. The EEPROM breaks off programming operation when RES

become low, programming operation doesn't finish correctly in case that RES falls low during programming operation. RES
should be kept high for 10 ms after the last data is input

4. Software Data Protection

Enable

The 79C0832 contains a software controlled write protection feature that allows the user to inhibit all write operations to the
device. This is useful in protecting the device from unwanted write cycles due to uncontrollable circuit noise or inadvertent
writes caused by minor bus contentions. Software data protection is enabled by writing the following data sequence to the
EEPROM and allowing the write cycle period (t

) of 10ms to elapse:

Software Data Protection Enable Sequence

10ms

Address

5555

AAAA or 2AAA

5555

Data

AA AA AA AA

55 55 55 55

A0 A0 A0 A0

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

5. Writing to the Memory with Software Data Protection Enabled

To write to the device once Software protection is enabled, the enable sequence must precede the data to be written. This
sequence allows the write to occur while at the same time keeping the software protection enabled

Sequence for Writing Data with Software Protection Enabled

6. Disabling Software Protection

Software data protection mode can be disabled by inputting the following 6 bytes sequence. Once the software protection
sequence has been written, no data can be written to the memory until the write cycle (T

) has elapsed.

Software Protection Disable Sequence

Devices are shipped in the "unprotected" state, meaning that the contents of the memory can be changed as
required by the user. After the software data protection is enabled, the device enters the Protect Mode
where no further write commands have any effect on the memory contents.

Address

5555

AAAA or 2AAA

5555

Data

AA AA AA AA

55 55 55 55

A0 A0 A0 A0

Write Address(s)

Normal Data Input

Address

5555

AAAA or 2AAA

5555

Data

AAAA or 2AAA

55 55 55 55

20 20 20 20

5555

AA AA AA AA

80 80 80 80

55 55 55 55

AA AA AA AA

5555

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

Note: All dimensions in inches

96-P

-P

® Q

UAD

LAT

ACKAGE

YMBOL

IMENSION

.184

.200

.216

.010

.012

.013

---

.009

.012

1.408

1.420

1.432

1.162

.050

.129

---

2.528

2.543

2.485

2.500

2.505

---

1.700

.152

.165

.178

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

96 P

-T

OLERANT

UAD

LAT

ACKAGE

Note: All dimensions in inches

YMBOL

IMENSION

.167

.183

.199

.010

.012

.013

.009

.012

1.408

1.420

1.432

1.162

.050

.129

2.528

2.543

2.485

2.500

2.505

1.700

.152

.165

.178

L1(sq)

L(sq)

D(sq)

Pin #1 ID

MAXWELL

TECHNOLOGIES

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

96 P

RAY

UAD

LAT

ACKAGE

Note: All dimensions in inches

YMBOL

IMENSION

.200

.222

.245

.007

.010

.013

.009

.013

1.690

1.707

1.725

1.150

0.050

.278

3.000

3.020

3.040

2.985

3.000

3.005

2.090

2.200

2.210

.115

.130

.145

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

Important Notice:

These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies
functionality by testing key parameters either by 100% testing, sample testing or characterization.

The specifications presented within these data sheets represent the latest and most accurate information available to
date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no
responsibility for the use of this information.

Maxwell Technologies' products are not authorized for use as critical components in life support devices or systems
without express written approval from Maxwell Technologies.

Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Tech-
nologies. Maxwell Technologies' liability shall be limited to replacement of defective parts.

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8 Megabit (256K x 32-Bit) EEPROM MCM

79C0832

Product Ordering Options

Model Number

Feature

Option Details

79C0832

-XX

Access Time

Screening Flow

Package

Radiation Feature

Base Product
Nomenclature

15 = 150 ns
20 = 200 ns

Multi Chip Module (MCM)

K = Maxwell Self-Defined Class K
H = Maxwell Self-Defined Class H
I = Industrial (testing @ -55°C,
+25°C, +125°C)
E = Engineering (testing @ +25°C)

Q = Quad Flat Pack

RP = R

-P

® package

XP = Xray-Pak Package
RT1 = Guaranteed to 10 krad at
die level
RT2 = Guaranteed to 25 krad at
die level
RT4 = Guaranteed to 40 krad at

8 Megabit (256K x 32-Bit)
EEPROM MCM

1) Products are manufactureded and screened to Maxwell Technologies self-defined Class H and Class K flows.

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