1
P/N:PM0766
REV. 1.5, MAY. 26, 2005
FEATURES
Bit organization
- 8Mb x 8 (byte mode)
- 4Mb x 16 (word mode)
Fast access time
- Random access:90/25ns(max.)
Page Size
- 8 words per page
Current
- Operating:20mA
- Standby:15uA(max.)
Supply voltage
- VCC : 2.7 ~ 3.6V
- VCCQ : 2.7 ~ 3.6V
Package
- 64 ball mini BGA (10.0mm X 13.0mm, ball pitch
1.0mm)
- 56 pin TSOP (14mm x 20mm)
Temperature
- -25~85
C
PIN DESCRIPTION
Symbol
Pin Function
A0~A22
Address Inputs, A0 not used in word
mode
D0~D15
Data Outputs
CE0#, CE1# Chip Enable Input
CE2#
OE#
Output Enable Input
BYTE#
Word/Byte mode Selection
VCC
Power Supply Pin
VCCQ
Output VCC Pin
GND
Ground Pin
NC
No Connection
PIN CONFIGURATION
MX23L6414
64M-BIT MASK ROM
PRELIMINARY
56 TSOP (Normal Type)
A22
CE1#
A21
A20
A19
A18
A17
A16
VCC
A15
A14
A13
A12
CE0#
NC
NC
A11
A10
A9
A8
GND
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NC
NC
OE#
NC
D15
D7
D14
D6
GND
D13
D5
D12
D4
VCCQ
GND
D11
D3
D10
D2
VCC
D9
D1
D8
D0
A0
BYTE#
NC
CE2#
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
MX23L6414
CHIP ENABLE TRUTH TABLE
CE2#
CE1#
CE0#
Device
L
L
L
Enabled
L
L
H
Disabled
L
H
L
Disabled
L
H
H
Disabled
H
L
L
Enabled
H
L
H
Enabled
H
H
L
Enabled
H
H
H
Disabled
Note: for single-chip applications, CE2#, CE1# can be
strapped to GND.
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P/N:PM0766
REV. 1.5, MAY. 26, 2005
MX23L6414
64 Mini BGA (Top View, Balls Facing Down)
CE#
OE#
Byte#
D0~D7
D8~D15
Power
Disabled
X
X
High Z
High Z
Stand-by
Enabled
H
X
High Z
High Z
Active
Enabled
L
L
D0~D7
High Z
Active
Enabled
L
H
D0~D7
D8~D15
Active
MODE SELECTION
ORDER INFORMATION
Part No.
Speed
Package
Grade
Remark
MX23L6414TI-90
90ns
56 pin TSOP
Industrial
MX23L6414TI-10
100ns
56 pin TSOP
Industrial
MX23L6414TI-12
120ns
56 pin TSOP
Industrial
MX23L6414XI-90
90ns
64 ball mini BGA
Industrial
MX23L6414XI-10
100ns
64 ball mini BGA
Industrial
MX23L6414XI-12
120ns
64 ball mini BGA
Industrial
MX23L6414XI-12G
120ns
64 ball mini BGA
Industrial
Pb-free
A1
A1
B1
A2
C1
A3
D1
A4
E1
D8
F1
BYTE#
A2
A6
B2
GND
C2
A7
D2
A5
E2
D1
F2
D0
A3
A8
B3
A9
C3
A10
D3
A11
E3
D9
F3
D10
A4
NC
B4
CE0#
C4
A12
D4
NC
E4
D3
F4
D11
A5
A13
B5
A14
C5
A15
D5
NC
E5
D4
F5
D12
A6
VCC
B6
NC
C6
NC
D6
NC
E6
NC
F6
NC
A7
A18
B7
A19
C7
A20
D7
A16
E7
D15
F7
NC
A8
A22
B8
CE1#
C8
A21
D8
A17
E8
NC
F8
OE#
G1
NC
H1
CE2#
G2
A0
H2
NC
G3
D2
H3
VCC
G4
VCCQ
H4
GND
G5
D5
H5
D13
G6
D6
H6
GND
G7
D14
H7
D7
G8
NC
H8
NC
10.0 mm
13.0 mm
Note: Industrial grade temperature: -25 ~ 85
C
Commercial grade temperature: 0 ~ 70
C
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P/N:PM0766
REV. 1.5, MAY. 26, 2005
MX23L6414
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Voltage on any Pin Relative to VSS
VIN
-0.3V to 3.9V
Ambient Operating Temperature
Topr
-25
C to 85
C
Storage Temperature
Tstg
-65
C to 125
C
DC CHARACTERISTICS (Ta = -25
C ~ 85
C, VCC = 2.7V~3.6V)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
2.4V
-
IOH = -400uA
Output Low Voltage
VOL
-
0.4V
IOL = 1.6mA
Input High Voltage
VIH
2.2V
VCCQ+0.5V
Input Low Voltage
VIL
-0.5V
0.8V
Input Leakage Current
ILI
-
10uA
0V, VCC
Output Leakage Current
ILO
-10
10uA
0V, VCC
Operating Current
ICC
-
20mA
f=5MHz, CE#=VIL, OE#=VIH
all output open
Standby Current (CMOS)
ISTB
-
15uA
CE#>VCC-0.2V
Input Capacitance
CIN
-
10pF
Ta = 25
C, f = 1MHZ
Output Capacitance
COUT
-
10pF
Ta = 25
C, f = 1MHZ
AC CHARACTERISTICS (Ta = -25
C ~ 85
C, VCC = 2.7V~3.6V)
Item
Symbol
23L6414-90
23L6414-10
23L6414-12
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
tRC
90ns
-
100ns
-
120ns
-
Address Access Time
tAA
-
90ns
-
100ns
-
120ns
Chip Enable Access Time
tACE
-
90ns
-
100ns
-
120ns
Page Mode Access Time
tPA
-
25ns
-
25ns
-
25ns
Output Enable Time
tOE
-
25ns
-
25ns
-
25ns
Output Hold After Address
tOH
0ns
-
0ns
-
0ns
-
Output High Z Delay
tHZ
-
20ns
-
20ns
-
20ns
Note:Output high-impedance delay (tHZ) is measured
from OE# or CE# going high, and this parameter guar-
anteed by design over the full voltage and temperature
operating range - not tested.
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P/N:PM0766
REV. 1.5, MAY. 26, 2005
MX23L6414
AC Test Conditions
Input Pulse Levels
0.4V~2.4V
Input Rise and Fall Times
5ns
Input Timing Level
1.5V
Output Timing Level
1.5V
Output Load
See Figure
100pF output load
capacitance
TIMING DIAGRAM
PAGE READ
RANDOM READ
A4-A22
A0,A1,A2,A3
DATA
Note: CE#, OE# are enable.
Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
VALID ADD
VALID
1'st ADD
2'nd ADD
tPA
tAA
3'rd ADD
VALID
VALID
tACE
tAA
tOH
tHZ
ADD
ADD
ADD
ADD
CE#
OE#
DATA
VALID
VALID
VALID
tRC
tOE
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C<100pF
IOL (load)=1.6mA
IOH (load)=-400uA
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P/N:PM0766
REV. 1.5, MAY. 26, 2005
MX23L6414
REVISION HISTORY
Revision
Description
Page
Date
1.0
1. Random access:90/35(max.)-->80/25(max.)
P1,3
AUG/29/2001
2. Add page size -- 8 words per page
P1
3. Package:64 ball mini BGA(8.0mmx10.0mm)-->64ball mini BGA
P1
(10.0x13.0mm)
4. Add Order Information
P2
5. Modify Standby Current:10uA-->15uA
P1,3
6. Change heading as "RELIMINARY "
P1
1.1
1. Modify DC Characteristics--VOH:VCCQ-0.2V-->2.4V, IOH=-100uA--> P3
SEP/10/2001
-400uA, VOL:0.2V-->0.4V, IOL:100uA-->1.6mA, VIH:2.0-->2.2V
2. Modify AC Test Conditions--Input Pulse Levels:0~VCCQ-->0.4V~2.4V, P4
Input/Output Timing Level:VCCQx0.5-->1.5V, Output Load:30pF-->
100pF output load capacitance
1.2
Add CE#=VIL, OE#=VIH in DC Characteristics's ICC
P3
OCT/02/2001
1.3
1. Modify fast access time:80ns-->90ns
P1~3
MAY/07/2002
1.4
1. Modify Operating Current : 40 --> 20mA
P1,3
DEC/31/2002
1.5
1. Added Pb-free package
P2
MAY/26/2005
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