1
P/N:PM0464
REV. 1.7,AUG. 20, 2001
FEATURES
Bit organization
- 1M x 8 (byte mode)
- 512K x 16 (word mode)
Fast access time
- Random access: 100ns (max.)
Current
- Operating: 20mA
- Standby: 5uA
Supply voltage
- 3.3V
10%
Package
- 44 pin SOP (500mil)
- 42 pin PDIP (600mil)
- 48 pin TSOP (type 1)
- 44 pin TSOP (type 2)
PIN CONFIGURATION
44 SOP/44TSOP
ORDER INFORMATION
Part No.
Access Time Package
MX23L8100MC-10
100ns
44 pin SOP
MX23L8100MC-12
120ns
44 pin SOP
MX23L8100MC-15
150ns
44 pin SOP
MX23L8100PC-10
100ns
42 pin PDIP
MX23L8100PC-12
120ns
42 pin PDIP
MX23L8100PC-15
150ns
42 pin PDIP
MX23L8100TC-10
100ns
48 pin TSOP*
MX23L8100TC-12
120ns
48 pin TSOP
MX23L8100TC-15
150ns
48 pin TSOP
MX23L8100RC-10
100ns
48 pin RTSOP*
MX23L8100RC-12
120ns
48 pin RTSOP
MX23L8100RC-15
150ns
48 pin RTSOP
MX23L8100YC-10
100ns
44 pin TSOP
MX23L8100YC-12
120ns
44 pin TSOP
MX23L8100TI-10
100ns
48 pin TSOP*
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
D0
D8
D1
D9
D2
D10
D3
D11
NC
NC
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
MX23L8100
MX23L8100
8M-BIT MASK ROM(8/16 BIT OUTPUT)
42 PDIP
48 TSOP (for word mode only)
48 Reverse TSOP (for word mode only)
NC
A16
A15
A14
A13
A12
A11
A10
A9
A8
NC
VSS
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VSS
VSS
D15
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX23L8100
(Normal Type)
NC
A16
A15
A14
A13
A12
A11
A10
A9
A8
NC
VSS
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VSS
VSS
D15
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MX23L8100
(Reverse Type)
MX23L8100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
D0
D8
D1
D9
D2
D10
D3
D11
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
NC
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
Note: 1.48-TSOP and 48-RTSOP support word mode only,
not for byte mode.
2.MX23L8100TI-10 is for industrial grade, tempera-
ture -40~85
C
2
P/N:PM0464
REV. 1.7, AUG. 20, 2001
MX23L8100
PIN DESCRIPTION
Symbol
Pin Function
A0~A18
Address Inputs
D0~D14
Data Outputs
D15/A-1
D15(Word Mode)/LSB Address (Byte
Mode)
CE
Chip Enable Input
OE
Output Enable Input
Byte
Word/Byte Mode Selection
VCC
Power Supply Pin
VSS
Ground Pin
NC
No Connection
MODE SELECTION
CE OE Byte D15/A-1 D0~D7 D8~D15 Mode
Power
H
X
X
X
High Z
High Z
-
Stand-by
L
H
X
X
High Z
High Z
-
Active
L
L
H
Output D0~D7 D8~D15 Word
Active
L
L
L
Input
D0~D7
High Z
Byte
Active
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Voltage on any Pin Relative to VSS
VIN
-1.3V to VCC+2.0V (Note)
Ambient Operating Temperature
Topr
0
C to 70
C
Storage Temperature
Tstg
-65
C to 125
C
BLOCK DIAGRAM
Note: Minimum DC voltage on input or I/O pins is -0.5V.
During voltage transitions, inputs may undershoot VSS
to -1.3V for periods of up to 20ns. Maximum DC voltage
on input or I/O pins is VCC+0.5V. During voltage transi-
tions, input may overshoot VCC to VCC+2.0V for peri-
ods of up to 20ns.
Address
Buffer
Memory
Array
Page
Buffer
Word/
Byte
Output
Buffer
D0
D15/(D7)
A0
A18
CE
BYTE
OE
3
P/N:PM0464
REV. 1.7, AUG. 20, 2001
MX23L8100
DC CHARACTERISTICS (Ta = 0
C ~ 70
C, VCC = 3.3V
10%)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
24V
-
IOH = -0.4mA
Output Low Voltage
VOL
-
0.4V
IOL = 1.6mA
Input High Voltage
VIH
2.2V
VCC+0.3V
Input Low Voltage
VIL
-0.3V
0.8V
Input Leakage Current
ILI
-
5uA
0V, VCC
Output Leakage Current
ILO
-
5uA
0V, VCC
Operating Current
ICC1
-
20mA
f=10MHz, all output open
Standby Current (TTL)
ISTB1
-
1mA
CE=VIH
Standby Current (CMOS)
ISTB2
-
5uA
CE> VCC - 0.2V
Input Capacitance
CIN
-
10pF
Ta = 25
C, f = 1MHZ
Output Capacitance
COUT
-
10pF
Ta = 25
C, f = 1MHZ
AC CHARACTERISTICS (Ta = 0
C ~ 70
C, VCC = 3.3V
10%)
Item
Symbol
23L8100-10
23L8100-12
23L8100-15
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
tRC
100ns
-
120ns
-
150ns
-
Address Access Time
tAA
-
100ns
-
120ns
-
150ns
Chip Enable Access Time
tACE
-
100ns
-
120ns
-
150ns
Output Enable Time
tOE
-
50ns
-
60ns
-
70ns
Output Hold After Address
tOH
0ns
-
0ns
-
0ns
-
Output High Z Delay
tHZ
-
20ns
-
20ns
-
20ns
AC Test Conditions
Input Pulse Levels
0.4V~2.4V
Input Rise and Fall Times
10ns
Input Timing Level
1.4V
Output Timing Level
1.4V
Output Load
See Figure
Note:Output high-impedance delay (tHZ) is measured
from OE or CE going high, and this parameter guaran-
teed by design over the full voltage and temperature op-
erating range - not tested.
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C<100pF
IOL (load)=1.6mA
IOH (load)=-0.4mA
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