1
P/N:PM0135
REV. 4.2, JUN. 19, 2003
PIN DESCRIPTION
PIN CONFIGURATION
32 PLCC
32 PDIP / 32 SOP
FEATURES
Bit organization
- 512K x 8 (byte mode)
Fast access time
- Random access: 90ns (max.)
Current
- Operating: 35mA
- Standby: 100uA
Supply voltage
- 5V
10%
Package
- 32 pin PDIP (600 mil)
- 32 pin PLCC
- 32 pin SOP (450 mil)
- 32 pin TSOP (8mm x 20mm)
ORDER INFORMATION
Part No.
Access Time
Package
MX23C4000PC-90
90ns
32 pin PDIP
MX23C4000PC-10
100ns
32 pin PDIP
MX23C4000PC-12
120ns
32 pin PDIP
MX23C4000PC-15
150ns
32 pin PDIP
MX23C4000QC-10
100ns
32 pin PLCC
MX23C4000QC-12
120ns
32 pin PLCC
MX23C4000QC-15
150ns
32 pin PLCC
MX23C4000MC-90
90ns
32 pin SOP
MX23C4000MC-10
100ns
32 pin SOP
MX23C4000MC-12
120ns
32 pin SOP
MX23C4000MC-15
150ns
32 pin SOP
MX23C4000TC-10
100ns
32 pin TSOP
MX23C4000TC-12
120ns
32 pin TSOP
MX23C4000TC-15
150ns
32 pin TSOP
Symbol
Pin Function
A0~A18
Address Inputs
D0~D7
Data Outputs
CE
Chip Enable Input
OE
Output Enable Input
VCC
Power Supply Pin
VSS
Ground Pin
NC
No Connection
MX23C4000
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
VSS
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A18
A17
A14
A13
A8
A9
A11
OE
A10
CE
D7
D6
D5
D4
D3
1
4
5
9
13
14
17
20
21
25
29
32
30
A14
A13
A8
A9
A11
OE
A10
CE
D7
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
VSS
D3
D4
D5
D6
A12
A15
A16
NC
VCC
A18
A17
MX23C4000
32 TSOP
A11
A9
A8
A13
A14
A17
A18
VCC
NC
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
OE
A10
CE
D7
D6
D5
D4
D3
VSS
D2
D1
D0
A0
A1
A2
A3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
MX23C4000
MX23C4000
4M-BIT MASK ROM (8 BIT OUTPUT)
2
P/N:PM0135
REV. 4.2, JUN. 19, 2003
MX23C4000
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Power Supply Voltage
VCC
-0.5V to 7.0V
Input Voltage
VI
-0.5V to VCC + 0.5V
Output Voltage
VO
-0.5V to VCC + 0.5V
Ambient Operating Temperature
Topr
-10
C to 70
C
Storage Temperature
Tstg
-65
C to 125
C
AC CHARACTERISTICS (Ta = -10
C ~ 70
C, VCC = 5.0V
10%)
Item
Symbol 23C4000-90 23C4000-10 23C4000-12 23C4000-15
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
tRC
90ns
-
100ns
-
120ns
-
150ns
-
Address Access Time
tAA
-
90ns
-
100ns
-
120ns
-
150ns
Chip Enable Access Time
tACE
-
90ns
-
100ns
-
120ns
-
150ns
Output Enable Time
tOE
-
45ns
-
50ns
-
60ns
-
70ns
Output Hold After Address
tOH
0ns
-
0ns
-
0ns
-
0ns
-
Output High Z Delay
tHZ
-
20ns
-
20ns
-
20ns
-
20ns
Note :
Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by
design over the full voltage and temperature operating range - not tested.
DC CHARACTERISTICS (Ta = -10
C ~ 70
C, VCC = 5.0V
10%)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
0.8VCC
-
IOH = -100uA
Output Low Voltage
VOL
-
0.4V
IOL = 2.1mA
Input High Voltage
VIH
2.2V
VCC+0.5V
Input Low Voltage
VIL
-0.3V
0.8V
Input Leakage Current
ILI
-
10uA
0V, VCC
Output Leakage Current
ILO
-
10uA
0V, VCC
Operating Current
ICC1
-
35mA
tRC = 100ns, all output open
Standby Current (TTL)
ISTB1
-
1mA
CE = VIH
Standby Current (CMOS)
ISTB2
-
100uA
CE > VCC - 0.2V
Input Capacitance
CIN
-
10pF
Ta = 25
C, f = 1MHz
Output Capacitance
COUT
-
10pF
Ta = 25
C, f = 1MHz
Note: minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions, inputs may undershoot VSS to -
2.0V for periods of up to 20ns. Maximum DC voltage on input or I/O pins is VCC+0.5V. During voltage transitions,
input may overshoot VCC to VCC+2.0V for periods of up to 20ns.
3
P/N:PM0135
REV. 4.2, JUN. 19, 2003
MX23C4000
AC Test Conditions
Input Pulse Levels
: 0.4V~2.4V
Input Rise and Fall Times : 10ns
Input Timing Level
: 1.5V
Output Timing Level
: 0.8V and 2.0V
Output Load
: See Figure
TIMING DIAGRAM
RANDOM READ
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C<100pF
IOL (load)=2.1mA
IOH (load)=-100uA
tACE
tAA
tOH
tHZ
ADD
ADD
ADD
ADD
CE
OE
DATA
Note:CE, OE are enable
VALID
VALID
VALID
tRC
tOE
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