1
P/N:PM0406
64M-BIT Mask ROM (8/16 Bit Output)
For SOP and TSOP Packages
FEATURES
Bit organization
- 8M x 8 (byte mode)
- 4M x 16 (word mode)
Fast access time
- Random access: 100ns (max.)
Current
- Operating: 70mA
- Standby: 100uA (max.)
Supply voltage
- 5V10%
Package
- 44 pin SOP (500 mil)
- 48 pin TSOP (12mm x 20mm)
ORDER INFORMATION
Part No.
Access Time
Package
MX23C6410MC-10
100ns
44 pin SOP
MX23C6410MC-12
120ns
44 pin SOP
MX23C6410MC-15
150ns
44 pin SOP
MX23C6410TC-10
100ns
48 pin TSOP
MX23C6410TC-12
120ns
48 pin TSOP
MX23C6410TC-15
150ns
48 pin TSOP
MX23C6410RC-10
100ns
48 pin TSOP
(Reverse type)
MX23C6410RC-12
120ns
48 pin TSOP
(Reverse type)
MX23C6410RC-15
150ns
48 pin TSOP
(Reverse type)
PIN CONFIGURATION
REV. 2.7, JAN. 15, 2002
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A21
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
VSS
OE
D0
D8
D1
D9
D2
D10
D3
D11
A20
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
MX23C6410
MX23C6410
48 TSOP (NORMAL TYPE)
44 SOP
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX23C6410
(Normal Type)
48 TSOP (REVERSE TYPE)
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MX23C6410
(Reverse Type)
3
P/N:PM0406
REV. 2.7, JAN. 15, 2002
MX23C6410
DC CHARACTERISTICS (Ta = 0
C ~ 70
C, VCC = 5V
10%)
Item
Symbol
MIN.
MAX.
Conditions
Output High Voltage
VOH
2.4V
-
IOH = -1.0mA
Output Low Voltage
VOL
-
0.4V
IOL = 2.1mA
Input High Voltage
VIH
2.2V
VCC+0.3V
Input Low Voltage
VIL
-0.3V
0.8V
Input Leakage Current
ILI
-
5uA
0V, VCC
Output Leakage Current
ILO
-
5uA
0V, VCC
Operating Current
ICC1
-
70mA
f=5MHz, all output open
Standby Current (TTL)
ISTB1
-
1mA
CE = VIH
Standby Current (cmos)
ISTB2
-
100uA
CE>VCC-0.2V
Input Capacitance
CIN
-
10pF
Ta = 25
C, f = 1MHZ
Output Capacitance
COUT
-
10pF
Ta = 25
C, f = 1MHZ
AC CHARACTERISTICS (Ta = 0
C ~ 70
C, VCC = 5V
10%)
Item
Symbol
23C6410-10
23C6410-12
23C6410-15
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read Cycle Time
tRC
100ns
-
120ns
-
150ns -
Address Access Time
tAA
-
100ns
-
120ns
-
150ns
Chip Enable Access Time
tACE
-
100ns
-
120ns
-
150ns
Output Enable Time
tOE
-
50ns
-
60ns
-
70ns
Output Hold After Address
tOH
0ns
-
0ns
-
0ns
-
Output High Z Delay
tHZ
-
20ns
-
20ns
-
20ns
Note:Output high-impedance delay (tHZ) is measured from
OE or CE going high, and this parameter guaranteed by de-
sign over the full voltage and temperature operating range -
not tested.
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Voltage on any Pin Relative to VSS
VIN
-0.8V to VCC+2.0V (Note)
Ambient Operating Temperature
Topr
0
C to 70
C
Storage Temperature
Tstg
-65
C to 125
C
Note: Minimum DC voltage on input or I/O pins is -0.5V. Dur-
ing voltage transitions, inputs may undershoot VSS to -0.8V
for periods of up to 20ns. Maximum DC voltage on input or I/
O pins is VCC+0.5V. During voltage transitions, input may
overshoot VCC to VCC+2.0V for periods of up to 20ns.
4
P/N:PM0406
REV. 2.7, JAN. 15, 2002
MX23C6410
TIMING DIAGRAM
RANDOM READ
tACE
tAA
tOH
tHZ
ADD
ADD
ADD
ADD
CE
OE
DATA
Note:CE, OE are enable
VALID
VALID
VALID
tRC
tOE
AC Test Conditions
Input Pulse Levels
0.4V~ 2.4V
Input Rise and Fall Times
10ns
Input Timing Level
1.4V
Output Timing Level
0.8V and 2.0V
Output Load
See Figure
Note:No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
DOUT
C<100pF
IOL (load)=2.1mA
IOH (load)=-1mA
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