TH8100
LIN Slave Controller for Switches
TH8100
Short
Datasheet
Page
1
of
13
January 2003
Rev 005
Features
Features
Features
Features
o
LIN-Protocol Controller based upon the LIN protocol specification 1.3
-
MLX4 Dual Task MCU
o
LIN-Transceiver based on the LIN protocol specification 1.3
-
Slew rate control
-
Transmission speed up to 20kb/s
-
Current limitation
-
Internal slave termination (30k
)
-
Under voltage lockout
-
High resistive termination in sleep mode for short to ground failure handling
o
17 Switch inputs for switch matrix up to 5 x 5 or single switches and encoder reading
o
Three high current PWM outputs up to 50 mA with configurable PWM frequency and slew
rate limitation, constant current source mode 2 to 30mA
o
LIN to SPI gateway via software possible
o
3 ADC channels, one with high voltage option
o
Very low standby current, 10uA in sleep mode
o
Wake up by LIN traffic or up to 6 local sources
o
Operating voltage VSUP = 7 to 18V
o
12 MHz internal RC-Oscillator (Tolerance < 15% long term; < 2% short term)
o
EEPROM with internal chargepump
o
Overtemperature shutdown
o
Watchdog
o
Direct powered from 12V boardnet with low voltage detection
o
40V load dump protected
o
Small MLPQ 28 pin package, body size 6 x 6mm
General Description
General Description
General Description
General Description
This IC is a full integrated LIN Slave for matrix switch or single switch applications in automotive
environment. It is suitable for LIN bus systems conform to "LIN protocol specification" Rev 1.3.
The combination of physical layer LIN transceiver and LIN protocol controller in combination with switch
matrix inputs and PWM outputs makes it possible to develop simple, but powerful and cheap switch slave
nodes in LIN Bus systems.
TH8100
LIN Slave Controller for Switches
TH8100
Short
Datasheet
Page
2
of
13
January 2003
Rev 005
1.
1.
1.
1. Ele
Ele
Ele
Electrical Characteristics
ctrical Characteristics
ctrical Characteristics
ctrical Characteristics
All voltages are referenced to ground (GND). Positive currents flow into the IC. The absolute maximum
ratings given in the table below are limiting values that do not lead to a permanent damage of the device but
exceeding any of these limits may do so. Long term exposure to limiting values may affect the reliability of
the device. Reliable operation of the TH8100 is only specified within the limits shown in "Operating
conditions".
1.1 Operating
Conditions
Parameter
Symbol
Min
Max
Unit
Battery supply voltage
V
S
7 18
V
Operating ambient temperature
T
amb
-40
+125
C
Table 1 - Operating Conditions
1.2 Absolute Maximum Ratings
Parameter
Symbol
Condition
Min
Max
Unit
t < 1 min
-1.0
30
Battery Supply Voltage
V
S
t < 500 ms
40
V
BUS voltage
V
BUS
t < 500ms
-20
40
V
Transient supply voltage
V
S.tr1
ISO 7637/1 pulse 1
[1]
-150
V
Transient supply voltage
V
S..tr2
ISO 7637/1 pulses 2
[1]
+100
V
Transient supply voltage
V
S..tr3
ISO 7637/1 pulses 3A, 3B
-150
+150
V
Transient bus voltage
V
BUS..tr1
ISO 7637/1 pulse 1
[2]
-150
V
Transient bus voltage
V
BUS.tr2
ISO 7637/1 pulses 2
[2]
+100
V
Transient bus voltage
V
BUS.tr3
ISO 7637/1 pulses 3A, 3B
[2]
-150
+150
V
DC voltage on CMOS I/O pins
V
DC
-0.3 +7 V
ESD capability of pin LIN
ESD
BUSHB
Human body model, equivalent to
discharge 100pF with 1.5k
,
-4 +4
kV
ESD capability of any other pins
ESD
HB
Human body model, equivalent to
discharge 100pF with 1.5k
,
-2 +2
kV
Maximum latch up free current at any Pin
I
LATCH
-500 +500 mA
T
amb
= +125 C
1.2
T
amb
= +105 C
2.1
Maximum power dissipation
[3]
P
tot
T
amb
= + 95 C
2.6
W
Thermal impedance
[3]
JA
in free air
21
K/W
Storage temperature
T
stg
-55 +150
C
Junction temperature
Tvj
-40
+150
C
Table 2 - Absolute Maximum Ratings
[1]
ISO 7637 test pulses are applied to VS via a reverse polarity diode and >1uF blocking capacitor .
[2]
ISO 7637 test pulses are applied to BUS via a coupling capacitance of 1 nF.
[3]
Simulated value for low conductance board (JEDEC)
TH8100
LIN Slave Controller for Switches
TH8100
Short
Datasheet
Page
3
of
13
January 2003
Rev 005
2.
2.
2.
2. Block Diagram
Block Diagram
Block Diagram
Block Diagram
Figure 1 - Block diagram
TH8100
LIN Slave Controller for Switches
TH8100
Short
Datasheet
Page
4
of
13
January 2003
Rev 005
3.
3.
3.
3. Application Examples
Application Examples
Application Examples
Application Examples
3.1 Sample Application 1 Switch Matrix
In this sample application the IC can realize the polling of a Switch-Matrix with a maximum of 5x5 switches.
Additional it is possible to use three outputs for a PWM control.
The polling of switches occurs in a defined timing regime. The timing regime is controlled via the MCU.
TH8100
LIN
MUST
KL15
SW2.5/ADC.3
ADC.1/WAKE
GND
VDD
47nF
VS
2.2F
SW4.3/PWM.3
SW4.1/PWM.1
SW4.2/PWM.2
220pF
EMC Filter
V
Bat
SW2.1
SW2.2
SW2.3
SW2.4/ADC.2
SW1.1
SW1.2
SW1.3
SW1.4
SW1.5
SW3.1
SW3.2
SW3.3
SW3.4
SW3.5
SW3.6
SW3.7
47nF
2.2F
Figure 2 Sample application 1 circuitry
TH8100
LIN Slave Controller for Switches
TH8100
Short
Datasheet
Page
5
of
13
January 2003
Rev 005
If more than two switches are closed at the same time, it can happen that reading the switches gives a
wrong result. A "ghost" switch is detected, that means it will read out a switch is pressed, but this switch isn't
really pressed (See Figure 3). To avoid this effect, diodes can be used for decoupling the switches. The
diodes prevent the fault current by a closed switch in another row.
Note: This wiring with diodes is only necessary if it is possible to press more than three switches at the same
time.
Example: In a matrix without diodes (left example) the open switch 2b ("ghost" switch from left example) is
recognized as closed. The closed switches 1b, 1c and 2c setup a wrong current path. This wrong path is
prevented in the protected wiring (right example) by the diode 1c.
a
b
c
1
2
3
a
b
c
1
2
3
wrong realization
correct realization
Figure 3 - Reading the switch matrix
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