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Электронный компонент: AN-45

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SY88353BL
3.3V, 3.2 Gbps Limiting Post Amplifier with
Programmable Decision Threshold
MLF and MicroLeadFrame are trademarks of Amkor Technology, Inc.
Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 http://www.micrel.com
April 2006
1
M9999-042506-A
hbwhelp@micrel.com
or (408) 955-1690



General Description
The SY88353BL limiting post amplifier is designed for
use in fiber-optic receivers, and is specially optimized for
WDM applications where optical amplifiers such as
EDFAs and Raman amplifier are used. The device
connects to typical transimpedance amplifiers (TIAs).
The linear signal from TIAs can contain significant
amounts of noise that is unevenly distributed between
top and bottom rails due to the ASE noise generated by
the optical amplifiers, crosstalk, or non-linear effect in
the fiber. In order to optimize the BER in such noisy
conditions, the decision threshold between bit 1 and bit
0, needs to be moved to the rail that contains less noise.
The SY88353BL features a pin at which an external
voltage can be applied to move the crossing point up
and down, from 20% to 80%, for BER optimization
purposes.
The SY88353BL operates from a single +3.3V power
supply, over temperatures ranging from 40
o
C to +85
o
C.
Signals with data rates from 155Mbps up to 3.2Gbps,
and as small as10mV
pp
, can be amplified to drive
devices with CML or PECL inputs.
The SY88353L features a Loss-of-Signal (LOS) open-
collector TTL output. A programmable Loss-of-Signal
level set pin (LOS
LVL
) sets the sensitivity of the input
amplitude detection. LOS asserts high if the input
amplitude falls below the threshold sets by LOS
LVL
and
de-asserts low otherwise. The enable bar input (/EN)
de-asserts the true output signal without removing the
input signal. The LOS output can be fed back to the /EN
input to maintain output stability under a loss-of-signal
condition. Typically, 3.3dB LOS hysteresis is provided to
prevent chattering.
All support documentation can be found on Micrel's web
site at:
www.micrel.com
.
Features
Single 3.3V power supply
Fast LOS release/assert
155Mbps to 3.2Gbps operation
Low-noise CML data outputs
Chatter-free Open-Collector TTL loss-of-signal (LOS)
output.
TTL /EN input
Programmable LOS level set (LOS
LVL
)
Programmable Decision Threshold
Available in a tiny 3mm x 3mm MLFTM package
Applications
WDM Systems
Gigabit Ethernet, 1X and 2X Fibre Channel
SONET/SDH: OC-3/12/24/48 STM1/4/8/16
Low-gain TIA interface
Markets
Datacom/telecom
Optical transceiver
Micrel, Inc.
SY88353BL
April 2006
2
M9999-042506-A
hbwhelp@micrel.com
or (408) 955-1690
Typical Application Circuit
Programmable Decision Threshold
Fixed Decision Threshold
Ordering Information
Part Number
Package
Type
Operating
Range
Package Marking
Lead Finish
SY88353BLMG
MLF-16
Industrial
SY88353BL with Pb-Free bar line indicator
NiPdAu Pb-Free
SY88353BLMGTR
(1)
MLF16
Industrial
SY88353BL with Pb-Free bar line indicator
NiPdAu Pb-Free
Notes:
1. Tape
and
Reel.


Pin Configuration
16-Pin MLFTM (MLF-16)
Micrel, Inc.
SY88353BL
April 2006
3
M9999-042506-A
hbwhelp@micrel.com
or (408) 955-1690
Pin Description
Pin Number
Pin Name
Type
Pin Function
1
DIN
Data Input
True data input.
4
/DIN
Data Input
Complementary data input.
5 VTHN DC
Input
Tie this pin to pin 6 (VTHREF) and apply a DC voltage on pin 16
(VTHP) for signal crossing adjustment. Connect to ground if no
crossing adjustment is needed.
6 VTHREF
1.25V Reference voltage (referenced to ground) for decision
threshold adjustment.
7 LOS
Open-collector TTL
output
Loss-of-Signal: asserts high when the data input amplitude falls
below the threshold set by LOS
LVL
.
9
/DOUT
CML Output
Complementary data output.
12
DOUT
CML Output
True data output.
14 LOSLVL
Input Loss-of-Signal Level Set. A resistor from this pin to V
CC
sets the
threshold for the data input amplitude at which LOS will be
asserted.
15 /EN
TTL Input: Default is
HIGH.
/Enable: This input enables the outputs when it is LOW. Note
that this input is internally connected to a 25k pull-up resistor
and will default to a logic HIGH state if left open.
16 VTHP DC
Input
Apply a DC voltage from 0 to 2.4V to adjust the signal crossing
level when pin 5 (VTHN) is tied to pin 6 (VTHREF). 1.25V sets
the crossing close to 50%. Connect to ground if no crossing
adjustment is needed.
2, 3, 10, 11
GND
Ground
Device ground.
8, 13
VCC
Power Supply
Positive power supply.

Micrel, Inc.
SY88353BL
April 2006
4
M9999-042506-A
hbwhelp@micrel.com
or (408) 955-1690
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) ....................................... 0V to +4.0V
Input Voltage (DIN, /DIN) .......................................0 to V
CC
Output Current (I
OUT
)
Continuous........................................................ 25mA
/EN Voltage ............................................................0 to V
CC
V
REF
Current .......................................... -800A to +500A
LOS
LVL
Voltage................................................. V
REF
to V
CC
Lead Temperature (soldering, 20sec.) ................... +260C
Storage Temperature (T
s
) ....................... 65C to +150C
Operating Ratings
(2)
Supply Voltage (V
CC
)............................. +3.0V to +3.6V
Ambient Temperature (T
A
) ................... 40C to +85C
Junction Temperature (T
J
) ................. 40C to +120C
Supply Voltage (V
CC
) ........................... +3.0V to +3.6V
Ambient Temperature (T
A
).................. 40C to +85C
Package Thermal Resistance
(3)
MLFTM
(
JA
) Still-air ............................................... 60C/W
(
JB
) ........................................................... 33C/W
DC Electrical Characteristics
V
CC
= 3.0 to 3.6V; T
A
= 40C to +85C, typical values at V
CC
= 3.3V, T
A
= 25C.
Symbol Parameter
Condition
Min
Typ Max Units
I
CC
Power Supply Current
No output load
45
62
mA
LOS
LVL
LOS
LVL
Voltage
V
CC
-1.3
V
CC
V
V
OH
DOUT, /DOUT HIGH Voltage
V
CC
-0.020 V
CC
-0.005 V
CC
V
V
OL
DOUT, /DOUT LOW Voltage
V
CC
-0.475 V
CC
-0.400 V
CC
-0.350
V
V
OFFSET
Differential Output Offset
80
mV
V
THREF
Decision Threshold Reference
Voltage
1.25
V
Z
0
Single-Ended
Output
Impedance
40 50 60
Z
I
Single-Ended Input Impedance
40
50
60
TTL DC Electrical Characteristics
V
CC
= 3.0 to 3.6V; T
A
= 40C to +85C, typical values at V
CC
= 3.3V, T
A
= 25C.
Symbol Parameter
Condition
Min
Typ Max Units
Output signal Crossing Range
Lower Limit
20
%
Output signal Crossing Range
Upper Limit
VTHN connected to VTHREF and 0-
2.4V applied to VTHP.
20
DIN 100(mVpp), see Figure on
page 6.
80 %
V
IH
/EN Input HIGH Voltage
2.0
V
V
IL
/EN Input LOW Voltage
0.8
V
I
IH
/EN Input HIGH Current
V
IN
= 2.7V
V
IN
= V
CC
20
100
A
A
I
IL
/EN Input LOW Current
V
IN
= 0.5V
-0.3
mA
I
CEX
LOS Output Leakage Current
V
OUT
= V
CC
100
A
V
OL
LOS Output LOW Level
Sinking 2mA
0.5
V




Micrel, Inc.
SY88353BL
April 2006
5
M9999-042506-A
hbwhelp@micrel.com
or (408) 955-1690
AC Electrical Characteristics
V
CC
= 3.0 to 3.6V; R
Load
= 50 to V
CC
; T
A
= 40C to +85C, typical values at V
CC
= 3.3V, T
A
= 25C.
Symbol Parameter
Condition
Min
Typ Max Units
t
r
, t
f
Output Rise/Fall Time
(20% to 80%)
Note 4
60
100
ps
t
JITTER
Deterministic
Random
Note 5
Note 6
15
5
ps
PP
ps
RMS
V
ID
Differential Input Voltage Swing
20
1800
mV
PP
V
OD
Differential Output Voltage
Swing
Note 4
700 800
950
mV
PP
T
OFF
LOS Release Time
Note 9
2 10
s
T
ON
LOS Assert Time
Note 9
2 10
s
LOS
AL
Low LOS Assert Level
R
LOSLVL
= 15k, Note 7
9
mV
PP
LOS
DL
Low LOS De-assert Level
R
LOSLVL
= 15k, Note 7
13
mV
PP
HYS
L
Low LOS Hysteresis
R
LOSLVL
= 15k, Note 8
3.2
dB
LOS
AM
Medium LOS Assert Level
R
LOSLVL
= 5k,
Note
7
17
mV
PP
LOS
DM
Medium LOS De-assert Level
R
LOSLVL
= 5k,
Note
7
25
mV
PP
HYS
M
Medium
LOS
Hysteresis
R
LOSLVL
= 5k,
Note
8
3.3 dB
LOS
AH
High LOS Assert Level
R
LOSLVL
= 100, Note 7
47
mV
PP
LOS
DH
High LOS De-assert Level
R
LOSLVL
= 100, Note 7
70
mV
PP
HSY
H
High LOS Hysteresis
R
LOSLVL
= 100, Note 8
3.4
dB
B
-3dB
3dB
Bandwidth
2.0 GHz
A
V(Diff)
Differential Voltage Gain
38
dB
S
21
Single-Ended
Small-Signal
Gain
26 32 dB
Notes
:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for
extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
JB
uses a 4-
layer and
JA
in still-air number, unless otherwise stated.
4. Amplifier in limiting mode. Input is a 200MHz square wave.
5. Deterministic jitter measured using 2.5Gbps K28.5 pattern, V
ID
= 10mV
PP
.
6. Random jitter measured using 2.5Gbps K28.7 pattern, V
ID
= 10mV
PP
.
7. See "Typical Operating Characteristics" for a graph showing how to choose a particular R
LOSLVL
for a particular LOS assert and its associated de-
assert amplitude.
8. This specification defines electrical hysteresis as 20log (LOS De-Assert/LOS Assert). The ratio between optical hysteresis and electrical
hysteresis is found to vary between 1.5 and 2, depending upon the level of received optical power and ROSA characteristics. Based upon that
ratio, the optical hysteresis corresponding to the electrical hysteresis range 1dB-4.5 dB, shown in the AC characteristics table, will be 0.5dB-3dB
Optical Hysteresis.
9. In real world applications, the LOS Release/Assert time can be strongly influenced by the RC time constant of the AC-coupling cap and the 50
input termination. To keep this time low, use a decoupling cap with the lowest value that is allowed by the data rate and the number of
consecutive identical bits in the application. Typical values are in the range of 0.001F to 1.0F.