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Электронный компонент: MIC502BM

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May 1999
163
MIC502
MIC502
Micrel
MIC502
Fan Management IC
Advance Information
Features
Temperature-proportional fan speed control
Low-cost, efficient PWM fan drive
4.5V to 13.2V IC supply range
Controls any voltage fan
Overtemperature detection with fault output
Integrated fan startup timer
Automatic user-specified sleep mode
Supports low-cost NTC/PTC thermistors
8-pin DIP and SOIC packages
Applications
NLX and ATX power supplies
Personal computers
File servers
Telecom and networking hardware
Printers, copiers, and office equipment
Instrumentation
Uninterruptable power supplies
Power amplifiers
Ordering Information
Part Number
Temperature Range
Package
MIC502BN
40
C to +85
C
8-pin Plastic DIP
MIC502BM
40
C to +85
C
8-pin SOIC
General Description
The MIC502 is a thermal and fan management IC which
supports the features for NLX/ATX power supplies and other
control applications.
Fan speed is determined by an external temperature sensor,
typically a thermistor-resistor divider, and (optionally) a sec-
ond signal, such as the NLX "FanC" signal. The MIC502
produces a low-frequency pulse-width modulated output for
driving an external motor drive transistor. Low-frequency
PWM speed control allows operation of standard brushless
dc fans at low duty cycle for reduced acoustic noise and
permits the use of a very small power transistor. The PWM
time base is determined by an external capacitor.
An open-collector overtemperature fault output is asserted if
the primary control input is driven above the normal control
range.
The MIC502 features a low-power sleep mode with a user-
determined threshold. Sleep mode completely turns off the
fan and occurs when the system is asleep or off (both control
inputs very low). A complete shutdown or reset can also be
initiated by external circuitry as desired.
The MIC502 is available as 8-pin plastic DIP and SOIC
packages in the 40
C to +85
C industrial temperature
range.
Typical Application
VT1
CF
VSLP
GND
VDD
OUT
OTF
VT2
1
2
3
4
8
7
6
5
R1
T1
R3
R4
C
F
R2
12V
R
BASE
Overtemperature
Fault Output
MIC502
Secondary
Fan-control
Input
Fan
Q1
MIC502
Micrel
MIC502
164
May 1999
Pin Description
Pin Number
Pin Name
Pin Function
1
VT1
Thermistor 1 (Input): Analog input of approximately 30% to 70% of V
DD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to
external thermistor network (or other temperature sensor). Pull low for
shutdown.
2
CF
PWM Timing Capacitor (External Component): Positive terminal for the
PWM triangle-wave generator timing capacitor. The recommended C
F
is
0.1
F for 30Hz PWM operation.
3
VSLP
Sleep Threshold (Input): The voltage on this pin is compared to V
T1
and V
T2
.
When V
T1
< V
SLP
and V
T2
< V
SLP
the MIC502 enters sleep mode until V
T1
or
V
T2
rises above V
WAKE
. (V
WAKE
= V
SLP
+ V
HYST
.) Grounding VSLP
disables the sleep-mode function.
4
GND
Ground
5
VT2
Thermistor 2 (Input): Analog input of approximately 30% to 70% of V
DD
produces active duty cycle of 0% to 100% at driver output (OUT). Connect to
motherboard fan control signal or second temperature sensor.
6
/OTF
Overtemperature Fault (Output): Open-collector output (active low).
Indicates overtemperature fault condition (V
T1
> V
OT
) when active.
7
OUT
Driver Output: Asymmetical-drive active-high complimentary PWM output.
Typically connect to base of external NPN motor control transistor.
8
VDD
Power Supply (Input): IC supply input; may be independent of fan power
supply.
Pin Configuration
1
2
3
4
8
7
6
5
VDD
OUT
OTF
VT2
VT1
CF
VSLP
GND
8-Pin SOIC (M)
8-Pin DIP (N)
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MIC502
MIC502
Micrel
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
DD
) .................................................. +14V
Output Sink Current (I
OUT(sink)
) .................................. 10mA
Output Source Current (I
OUT(source)
) .......................... 25mA
Input Voltage (any pin) ......................... 0.3V to V
DD
+0.3V
Junction Temperature (T
J
) ...................................... +125
C
Storage Temperature (T
A
) ....................... 65
C to +150
C
Lead Temperature (Soldering, 5 sec.) ...................... 260
C
ESD, Note 3
Operating Ratings
(Note 2)
Supply Voltage (V
DD
) ................................ +4.5V to +13.2V
Sleep Voltage (V
SLP
) ........................................ GND to V
DD
Temperature Range (T
A
) ........................... 40
C to +85
C
Power Dissipation at 25
C
SOIC ................................................................... 800mW
DIP ...................................................................... 740mW
Derating Factors
SOIC ............................................................... 8.3mW/
C
Plastic DIP ....................................................... 7.7mW/
C
Electrical Characteristics
4.5V
V
DD
13.2V, Note 4; T
A
= 25, bold values indicate 40
C
T
A
+85
C; unless noted
Symbol
Parameter
Condition
Min
Typ
Max
Units
I
DD
Supply Current, Operating
VSLP = grounded, OTF, OUT = open,
0.5
1.2
mA
C
F
= 0.1
F, V
T1
= V
T2
= 0.7 V
DD
I
DD(slp)
Supply Current, Sleep
VT1 = grounded,
240
400
A
VSLP, OTF, OUT = open, C
F
= 0.1
F
Driver Output
t
R
Output Rise Time, Note 5
I
OH
= 10mA
TBD
50
s
t
F
Output Fall Time, Note 5
I
OL
= 1mA
TBD
50
s
I
OL
Output Sink Current
V
OL
= 0.5V
0.9
mA
I
OH
Output Source Current
4.5V
V
DD
5.5V, V
OH
= 2.4V
10
mA
10.8V
V
DD
13.2V, V
OH
= 3.2V
10
mA
I
OS
Sleep-Mode Output Leakage
V
OUT
= 0V
1
A
Thermistor and Sleep Inputs
V
PWM(max)
100% PWM Duty Cycle
67
70
73
%V
DD
Input Voltage
V
PWM(span)
V
PWM(max)
V
PWM(min)
37
40
43
%V
DD
V
HYST
Sleep Comparator Hysteresis
8
11
14
%V
DD
V
IL
VT1 Shutdown Threshold
0.7
V
V
IH
VT1 Startup Threshold
1.1
V
V
OT
VT1 Overtemperature Fault
Note 6
74
77
80
%V
DD
Threshold
I
VT
, I
VSLP
VT1, VT2, VSLP Input Current
2.5
1
A
t
RESET
Reset Setup Time
minimum time V
T1
< V
IL
, to guarantee reset,
30
s
Note 5
Oscillator
f
Oscillator Frequency, Note 7
4.5V
V
DD
5.5V, C
F
= 0.1
F
24
27
30
Hz
10.8V
V
DD
13.2V, C
F
= 0.1
F
27
30
33
Hz
f
MIN
, f
MAX
Oscillator Frequency Range
Note 7
15
90
Hz
t
STARTUP
Startup Interval
64/f
s
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Micrel
MIC502
166
May 1999
Symbol
Parameter
Condition
Min
Typ
Max
Units
Overtemperature Fault Output
V
OL
Active (Low) Output Voltage
I
OL
= 2mA
0.3
V
I
OH
Off-State Leakage
V
/OTF
= V
DD
1
A
Note 1.
Exceeding the absolute maximum rating may damage the device.
Note 2.
The device is not guaranteed to function outside its operating rating.
Note 3.
Devices are ESD sensitive. Handling precautions recommended.
Note 4:
Part is functional over this V
DD
range; however, it is characterized for operation at 4.5V
V
DD
5.5V and 10.8V
V
DD
13.2V ranges. These
ranges correspond to nominal V
DD
of 5V and 12V, respectively.
Note 5.
Guaranteed by design.
Note 6.
V
OT
is guaranteed by design to always be higher than V
PWM(max)
.
Note 7.
Logic time base and PWM frequency. For other values of C
F
, f(Hz) = 30Hz
0.1 F
C
, where C is in
F.
Timing Diagrams
V
OH
V
OL
50%
80%
40%
0%
100%
40%
70%
t
STARTUP
t
PWM
Output
Duty Cycle
A
B
C
D
E
F
G
0.7V
DD
0.3V
DD
0.3V
DD
V
T1
V
T2
V
SLP
100%
0%
30%
70%
80%
50%
40%
40%
Input
Signal
Range
V
OT
V
IH
V
IL
0V
V
OH
V
OL
V
OUT
V
OTF
0V
0V
Figure 1. Typical System Behavior
Note A.
Output duty-cycle is initially determined by V
T1
, as it is greater than V
T2
.
Note B.
PWM duty-cycle follows V
T1
as it increases.
Note C.
V
T1
drops below V
T2
. V
T2
now determines the output duty-cycle.
Note D.
The PWM duty-cycle follows V
T2
as it increases.
Note E.
Both V
T1
and V
T2
decrease below V
SLP
but above V
IL
. The device enters sleep mode.
Note F.
The PWM `wakes up' because one of the control inputs (V
T1
in this case) has risen above V
WAKE
. The startup timer is triggered, forcing OUT
high for 64 clock periods. (V
WAKE
= V
SLP
+ V
HYST
. See "Electrical Characteristics.")
Note G.
Following the startup interval, the PWM duty-cycle is the higher of V
T1
and V
T2
.
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MIC502
MIC502
Micrel
V
OH
V
OL
40%
60%
30%
0%
100%
t
STARTUP
t
PWM
Output
Duty Cycle
H
I
J
K
M
N
L
0.7V
DD
0.3V
DD
0.3V
DD
V
T1
V
T2
V
SLP
100%
0%
20%
60%
40%
30%
PWM
Range
V
OT
V
IH
V
IL
0V
V
OH
V
OL
V
OUT
V
OTF
O
100%
V
DD
0V
V
DD
0V
0V
Figure 2. MIC502 Typical Power-Up System Behavior
Note H.
At power-on, the startup timer forces OUT on for 64 PWM cycles of the internal timebase (t
PWM
). This insures that the fan will start from a
dead stop.
Note I.
The PWM duty-cycle follows the higher of V
T1
and V
T2,
in the case, V
T1
.
Note J.
The PWM duty-cycle follows V
T1
as it increases.
Note K.
PWM duty-cycle is 100% (OUT constantly on) anytime V
T1
> V
PWM(max)
.
Note L.
/OTF is asserted anytime V
T1
> V
OT
. (The fan continues to run at 100% duty-cycle.)
Note M. /OTF is deasserted when V
T1
falls below V
OT
; duty-cycle once again follows V
T1
.
Note N.
Duty-cycle follows V
T1
until V
T1
< V
T2
, at which time V
T2
becomes the controlling input signal. Note that V
T1
is below V
SLP
but above V
IH
; so
normal operation continues. (Both V
T1
and V
T2
must be below V
SLP
to active sleep mode.)
Note O.
All functions cease when V
T1
< V
IL
; this occurs regardless of the state of V
T2
.
MIC502
Micrel
MIC502
168
May 1999
Functional Diagram
Oscillator
Start-Up
Timer
CLK
RESET
OUT
VT2
VT1
CF
OTF
OUT
Driver
GND
VSLP
Power-On
Reset
ENABLE
Sleep
Control
VDD
Overtemperature
Reset
Sleep
Bias
V
IL
PWM
8
3
5
6
7
4
2
1
Typical Characteristics
1
10
100
1000
3000
0.001
0.01
0.1
1
FREQUENCY (Hz)
CAPACITANCE (
F)
PWM Frequency vs.
Timing Capacitor Value
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MIC502
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Micrel
Functional Description
Oscillator
A capacitor connected to CF determines the frequency of the
internal time base which drives the state-machine logic and
determines the PWM frequency. This operating frequency
will be typically 30Hz to 60Hz. (C
F
= 0.1
F for 30Hz.)
Pulse-Width Modulator
A triangle-wave generator and threshold detector comprise
the internal pulse-width modulator (PWM). The PWM's out-
put duty-cycle is determined by the higher of V
T1
or V
T2
. A
typical voltage range of 30% to 70% of V
DD
applied to the VT1
and VT2 pins corresponds to 0% to 100% duty-cycle. Since
at least one of the control voltage inputs is generally from a
thermistor-resistor divider connected to V
DD
, the PWM out-
put duty cycle will not be affected by changes in the supply
voltage.
Driver Output
OUT is a complementary push-pull digital output with asym-
metric drive (approximately 10mA source, 1mA sink--see
"Electrical Characteristics"). It is optimized for directly driving
an NPN transistor switch in the fan's ground-return. See
"Applications Information" for circuit details.
Shutdown/Reset
Internal circuitry automatically performs a reset of the MIC502
when power is applied. The MIC502 may be shut down at any
time by forcing V
T1
below its V
IL
threshold. This is typically
accomplished by connecting the VT1 pin to open-drain or
open-collector logic and results in an immediate and asyn-
chronous shutdown of the MIC502. The OUT and /OTF pins
will float while V
T1
is below V
IL
.
If V
T1
then rises above V
IH
, a device reset occurs. Reset is
equivalent to a power-up condition: the state of /OTF is
cleared, a startup interval is triggered, and normal fan opera-
tion begins.
Startup Interval
Any time the fan is started from the off state (power-on or
coming out of sleep mode or shutdown mode), the PWM
output is automatically forced high for a startup interval of 64
t
PWM
. Once the startup interval is complete, PWM operation
will commence and the duty-cycle of the output will be
determined by the higher of V
T1
or V
T2
.
Overtemperature Fault Output
/OTF is an active-low, open-collector logic output. An over-
temperature condition will cause /OTF to be asserted. An
overtemperature condition is determined by V
T1
exceeding
the normal operating range of 30% to 70% of V
DD
by > 7% of
V
DD
. Note that V
OT
is guaranteed by design to always be
higher than V
PWM(max)
.
Sleep Mode
When V
T1
and V
T2
fall below V
SLP
, the system is deemed
capable of operating without fan cooling and the MIC502
enters sleep mode and discontinues fan operation. The
threshold where the MIC502 enters sleep mode is deter-
mined by V
SLP
. Connecting the VSLP pin to ground disables
sleep mode.
Once in sleep mode, all device functions cease (/OTF in-
active, PWM output off) unless V
T1
or V
T2
rise above V
WAKE
.
(V
WAKE
= V
SLP
+ V
HYST
.) V
HYST
is a fixed amount of hyster-
esis added to the sleep comparator which prevents erratic
operation around the V
SLP
operating point. The result is
stable and predictable thermostatic action: whenever pos-
sible the fan is shut down to reduce energy consumption and
acoustic noise, but will always be activated if the system
temperature rises.
If the device powers-up or exits its reset state, the fan will not
start unless V
T1
or V
T2
rises above V
WAKE
.
System Operation
Power Up
A complete reset occurs when power is applied.
OUT is off (low) and /OTF is inactive (high/floating).
If V
T1
< V
IL
, the MIC502 remains in shutdown.
The startup interval begins. OUT will be on (high) for 64
clock cycles (64
t
PWM
).
Following the startup interval, normal operation begins.
Reset Startup Timer;
Deassert /OTF;
OUT Off (Low).
V
T1
> V
OT
?
POWER ON
V
T1
< V
IL
?
NO
NO
OUT Held On (High)
During Startup
Interval.
Startup Interval
Finished
?
Deassert OUT
(OUT = Low)
YES
NO
Assert /OTF While
V
T1
> V
OT
NORMAL
OPERATION
YES
YES
Figure 3. Power-Up Behavior
MIC502
Micrel
MIC502
170
May 1999
Normal Operation
Normal operation consists of the PWM operating to control
the speed of the fan according to V
T1
and V
T2
. Exceptions to
this otherwise indefinite behavior can be caused by any of
three conditions: V
T1
exceeding V
OT
, an overtemperature
condition; V
T1
being pulled below V
IL
initiating a device
shutdown and reset; or both V
T1
and V
T2
falling below V
SLP
,
activating sleep mode. Each of these exceptions is treated as
follows:
Overtemp?
V
T1
> V
OT
?
NORMAL
OPERATION
V
T1
and V
T2
< V
SLEEP
?
NO
OUT Duty Cycle
Proportional to
Greater of V
T1
, V
T2
YES
Assert /OTF while
V
T1
> V
OT
Reset?
V
T1
< V
IL
?
POWER ON
SLEEP
YES
NO
YES
NO
Figure 4. Normal System Behavior
Overtemperature: If the system temperature rises
typically 7% above the 100% duty-cycle operating point,
/OTF will be activated to indicate an overtemperature
fault. (V
T1
> V
OT
) Overtemperature detection is essen-
tially independent of other operations--the PWM
continues its normal behavior; with V
T1
> V
PWM(max)
, the
output duty-cycle will be 100%. If V
T1
falls below V
OT
,
the overtemperature condition is cleared and /OTF is no
longer asserted. It is assumed that in most systems, the
/OTF output will initiate power supply shutdown.
Shutdown/Reset: If V
T1
is driven below V
IL
an immedi-
ate, asynchronous shutdown occurs. While in shutdown
mode, OUT is off (low), and /OTF is unconditionally
inactive (high/floating). If V
T1
subsequently rises above
V
IH
, a device reset will occur. Reset is indistinguishable
from a power-up condition. The state of /OTF is cleared,
a startup interval is triggered, and normal fan operation
begins.
Sleep: If V
T1
and V
T2
fall below V
SLP
, the device enters
sleep mode. All internal functions cease unless V
T1
or
V
T2
rise above V
WAKE
. (V
WAKE
= V
SLP
+ V
HYST
.) The
/OTF output is unconditionally inactive (high/floating)
and the PWM is disabled during sleep. (OUT will float.)
Sleep Mode
During normal operation, if V
T1
and V
T2
fall below V
SLP
, the
device will go into sleep mode and fan operation will stop. The
MIC502 will exit sleep mode when V
T1
or V
T2
rise above V
SLP
by the hysteresis voltage, V
HYST
. When this occurs, normal
operation will resume. The resumption of normal operation
upon exiting sleep is indistinguishable from a power-on reset.
(See "Sleep: Normal Operation," above.)
Disable PWM
Reset Released
V
T1
> V
IH
?
SLEEP
Reset Initiated
V
T1
< V
IL
?
YES
YES
Wake Up?
V
T1
or V
T2
>
V
SLP
+V
HYST
?
POWER ON
NO
NO
NO
YES
Figure 5. Sleep-Mode Behavior
May 1999
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MIC502
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Applications Information
The Typical Application drawing on page 1 illustrates a typical
application circuit for the MIC502. Interfacing the MIC502
with a system consists of the following steps:
1. Selecting a temperature sensor
2. Interfacing the temperature sensor to the VT1 input
3 Selecting a fan-drive transistor, and base-drive current
limit resistor
4. Deciding what to do with the Secondary
Fan-Control Input
5. Making use of the Overtemperature Fault Output.
Temperature Sensor Selection
Temperature sensor T1 is a negative temperature coefficient
(NTC) thermistor. The MIC502 can be interfaced with either
a negative or positive tempco thermistor; however, a nega-
tive temperature coefficient thermistor typically costs less
than its equivalent positive tempco counterpart. While a
variety of thermistors can be used in this application, the
following paragraphs reveal that those with an R25 rating
(resistance at 25
C) of from about 50k
to 100k
lend
themselves nicely to an interface network that requires only
a modest current drain. Keeping the thermistor bias current
low not only indicates prudent design; it also prevents self-
heating of the sensor from becoming an additional design
consideration. It is assumed that the thermistor will be located
within the system power supply, which most likely also
houses the speed-controlled fan.
Temperature Sensor Interface
As shown by the Electrical Characteristics table, the working
voltage for input VT1 is specified as a percentage of V
DD
. This
conveniently frees the designer from having to be concerned
with interactions resulting from variations in the supply volt-
age. By design, the operating range of VT1 is from about 30%
of V
DD
to about 70% of V
DD
.
V
PWM(min)
= V
PWM(max)
V
PWM(span)
When V
T1
= V
PWM(max)
0.7V
DD
, a 100% duty-cycle motor
drive signal is generated. Conversely, when V
T1
= V
PWM(min)
0.3V
DD
, the motor-drive signal has a 0% duty cycle.
Resistor voltage divider R1 || T1, R2 in the Typical Application
diagram is designed to preset V
T1
to a value of V
PWM
that
corresponds to the slowest desired fan speed when the
resistance of thermistor T1 is at its highest (cold) value. As
temperature rises the resistance of T1 decreases and V
T1
increases because of the parallel connection of R1 and T1.
Since V
T1
= V
PWM(min)
represents a stopped fan (0% duty-
cycle drive), and since it is foreseen that at least some cooling
will almost always be required, the lowest voltage applied to
the VT1 input will normally be somewhat higher than 0.3V
DD
(or >V
PWM(min)
). It is assumed that the system will be in sleep
mode rather than operate the fan at a very low duty cycle
(<< 25%). Operation at very low duty cycle results in relatively
little airflow. Sleep mode should be used to reduce acoustic
noise when the system is cool. For a given minimum desired
fan speed, a corresponding V
T1(min)
can be determined via
the following observation:
since
V
PWM(max)
= 70% of V
DD
100% RPM
and
V
PWM(min)
= 30% of V
DD
0% RPM
then
V
PWM(span)
= 40% of V
DD
100% RPM
range.
Figure 6 shows the following linear relationship between the
voltage applied to the VT1 input, motor drive duty cycle, and
approximate motor speed.
since
V
T1
= 0.7V
DD
100% PWM
then
V
T1
= 0.6V
DD
75% PWM
and
V
T1
= 0.5V
DD
50% PWM
and
V
T1
= 0.4V
DD
25% PWM.
In addition to the R25 thermistor rating, sometimes a data
sheet will provide the ratio of R25/R50 (resistance at 25
C
divided by resistance at 50
C) is given. Sometimes this is
given as an R0/R50 ratio. Other data sheet contents either
specify or help the user determine device resistance at
arbitrary temperatures. The thermistor interface to the MIC502
usually consists of the thermistor and two resistors.
0
20
40
60
80
100
0
20
40
60
80
100
DUTY CYCLE (%)
V
T1
/SUPPLY VOLTAGE (%)
Figure 6. Control Voltage vs. Fan Speed
Design Example
The thermistor-resistor interface network is shown in the
Typical Application drawing. The following example describes
the design process: A thermistor data sheet specifies a
thermistor that is a candidate for this design as having an R25
resistance of 100k
. The data sheet also supports calcula-
tion of resistance at arbitrary temperatures, and it was discov-
ered the candidate thermistor has a resistance of 13.6k at
70
C (R70). Accuracy is more important at the higher tem-
perature end of the operating range (70
C) than the lower end
because we wish the overtemperature fault output (/OTF) to
be reasonably accurate--it may be critical to operating a
power supply crowbar or other shutdown mechanism, for
example. The lower temperature end of the range is less
important because it simply establishes minimum fan speed,
which is when less cooling is required.
MIC502
Micrel
MIC502
172
May 1999
Referring to the "Typical Application," the following approach
can be used to design the required thermistor interface
network:
Let
R1 =
R
T1
= 13.6k
(at 70
C)
and
V
T
= 0.7V
DD
(70% of V
DD
)
Since
V =
V
R2
R
|| R1+ R2
T
DD
T1
(
)
0.7 =
R2
R
+ R2
T1
(
)
0.7R
T1
+ 0.7R2 = R2
0.7R
T1
= 0.3R2
and
R2 = 2.33R
T1
= 2.33
13.6k = 31.7k
33k
Let's continue by determining what the temperature-propor-
tional voltage is at 25
C.
Let
R1 =
and
R
T1
= 100k
(at 25
C).
From
V =
V
R2
R
+ R2
T
DD
T1
(
)
V =
V
33k
100k + 33k
T
DD
(
)
V
T
= 0.248V
DD
Recalling from above discussion that the desired V
T
for 25
C
should be about 40% of V
DD
, the above value of 24.8% is far
too low. This would produce a voltage that would stop the fan
(recall from the above that this occurs when V
T
is about 30%
of V
DD
. To choose an appropriate value for R1 we need to
learn what the parallel combination of R
T1
and R1 should be
at 25
C:
Again
V =
V
R2
R
|| R1+ R2
T
DD
T1
(
)
0.4 =
R2
R
|| R1+ R2
T1
(
)
0.4(R
T1
|| R1) + 0.4R2 = R2
0.4(R
T1
|| R1) = 0.6R2
and
R
T1
|| R1 = 1.5R2 = 1.5
33k = 49.5k
Since
R
T1
= 100k
and
RT1 || R1 = 49.5k
50k
let
R1 = 100k
While that solves the low temperature end of the range, there
is a small effect on the other end of the scale. The new value
of V
T
for 70
C is 0.734, or about 73% of V
DD
. This represents
only a 3% shift from the design goal of 70% of V
DD
. In
summary, R1 = 100k, and R2 = 33k. The candidate thermistor
used in this design example is the RL2010-54.1K-138-D1,
manufactured by Keystone Thermometrics.
The R25 resistance (100k
) of the chosen thermistor is
probably on the high side of the range of potential thermistor
resistances. The result is a moderately high-impedance
network for connecting to the V
T1
and/or V
T2
input(s). Be-
cause these inputs can have up to 1
A of leakage current,
care must be taken if the input network impedance becomes
higher than the example. Leakage current and resistor accu-
racy could require consideration in such designs. Note that
the V
SLP
input has this same leakage current specification.
Secondary Fan-Control Input
The above discussions also apply to the secondary fan-
control input, VT2, pin 5. It is possible that a second ther-
mistor, mounted at another temperature-critical location out-
side the power supply, may be appropriate. There is also the
possibility of accommodating the NLX "FanC" signal via this
input. If a second thermistor is the desired solution, the VT2
input may be treated exactly like the VT1 input. The above
discussions then apply directly. If, however, the NLX FanC
signal is to be incorporated into the design then the operating
voltage (V
DD
= 5V vs. V
DD
= 12V) becomes a concern. The
FanC signal is derived from a 12V supply and is specified to
swing at least to 10.5V. A minimum implementation of the
FanC signal would provide the capability of asserting full-
speed operation of the fan; this is the case when 10.5V
FanC
12V. This FanC signal can be applied directly to the
VT2 input of the MIC502, but only when its V
DD
is 12V. If this
signal is required when the MIC502 V
DD
= 5V a resistor
divider is necessary to reduce this input voltage so it does not
exceed the MIC502 V
DD
voltage. A good number is 4V
(80%V
DD
).
Because of input leakage considerations, the impedance of
the resistive divider should be kept at
100k
. A series
resistor of 120k
driven by the Fan C signal and a 100k
shunt resistor to ground make a good divider for driving the
V
T2
input.
Transistor and Base-Drive Resistor Selection
The OUT motor-drive output, pin 7, is intended for driving a
medium-power device, such as an NPN transistor. A rather
ubiquitous transistor, the 2N2222A, is capable of switching
up to about 400mA. It is also available as the PN2222A in a
plastic TO-92 package. Since 400mA is about the maximum
current for most popular computer power supply fans (with
many drawing substantially less current) and since the MIC502
provides a minimum of 10mA output current, the PN2222A,
with its minimum
of 40, is the chosen motor-drive transistor.
May 1999
173
MIC502
MIC502
Micrel
The design consists soley of choosing the value R
BASE
in
Figures 7 and 8. To minimize on-chip power dissipation in the
MIC502, the value of R
BASE
should be determined by the
power supply voltage. The Electrical Characteristics table
specifies a minimum output current of 10mA. However,
different output voltage drops (V
DD
V
OUT
) exist for 5V vs.
12V operation. The value R
BASE
should be as high as
possible for a given required transistor base-drive current in
order to reduce on-chip power dissipation.
Referring to the "Typical Application" and to the "Electrical
Characteristics" table, the value for R
BASE
is calculated as
follows. For V
DD
= 5V systems, I
OH
of OUT (pin 7) is
guaranteed to be a minimum of 10mA with a V
OH
of 2.4V.
R
BASE
then equals (2.4V V
BE
)
10mA = 170
.
For V
DD
= 12V systems, R
BASE
= (3.4 0.7)
0.01 = 250
.
Overtemperature Fault Output
The /OTF output, pin 6, is an open-collector NPN output. It is
compatible with CMOS and TTL logic and is intended for
alerting a system about an overtemperature condition or
triggering a power supply crowbar circuit. If V
DD
for the
MIC502 is 5V the output should not be pulled to a higher
voltage. This output can sink up to 2mA and remain compat-
ible with the TTL logic-low level.
Timing Capacitors vs. PWM Frequency
The recommended C
F
(see first page) is 0.1
F for opertaion
at a PWM frequency of 30Hz. This frequency is factory
trimmed within
3Hz using a 0.1% accurate capacitor. If it is
desired to operate at a different frequency, the new value for
C
F
is calculated as follows:
C =
3
f
, where C is in
F and f is in Hz.
The composition, voltage rating, ESR, etc., parameters of the
capacitor are not critical. However, if tight control of frequency
vs. temperature is an issue, the temperature coefficient may
become a consideration.
VT1
CF
VSLP
GND
VDD
OUT
OTF
VT2
1
2
3
4
8
7
6
5
R1
100k
T1
R3
56k
R4
56k
C
F
R2
33k
5V
R
BASE
Overtemperature
Fault Output
MIC502
NLX FanC
Signal Input
Yate Loon
YD80SM-12
or similar fan
Q1
0.1F
180
100k
47k
Keystone Thermonics
RL2010-54.1K-138-D1
or similar
120k
12V
Figure 7. Typical 5V V
DD
Application Circuit
VT1
CF
VSLP
GND
VDD
OUT
OTF
VT2
1
2
3
4
8
7
6
5
R1
100k
T1
R3
56k
R4
56k
C
F
R2
33k
12V
R
BASE
Overtemperature
Fault Output
MIC502
NLX FanC
Signal Input
Yate Loon
YD80SM-12
or similar fan
Q1
0.1F
280
5V
4.7k
47k
Keystone Thermonics
RL2010-54.1K-138-D1
or similar
Figure 8. Typical 12V V
DD
Application Circuit