ML2722
900MHz
Low-IF 1.5Mbps FSK Transceiver
Final Datasheet
DS2722-F-05
DECEMBER 2003
GENERAL DESCRIPTION
The ML2722 is a fully integrated 1.5Mbps frequency
shift keyed (FSK) transceiver that operates in the
unlicensed 900MHz ISM frequency band. The device
has been optimized for digital cordless telephone
applications and includes all the frequency generation,
receive and transmit functions. Automatically adjusted
filters eliminate mechanical tuning. The transmitter
generates a -1 dBm FSK output signal. The single
conversion Low-IF receiver has all the sensitivity and
selectively advantages of a traditional super-
heterodyne without requiring costly, bulky external
filters, while providing the integration advantages of
direct conversion.
The phase locked loop (PLL) synthesizer is completely
integrated, including the voltage controlled oscillator
(VCO), tuning circuits, and VCO resonator. This allows
the ML2722 to be used in frequency hopped spread
spectrum (FHSS) applications.
The ML2722 contains internal voltage regulation. It also
contains PLL and transmitter configuration registers.
The device can be placed in a low power standby mode
for current sensitive applications. It is packaged in a
32TQFP.
PIN CONFIGURATION
VCC5
TRFO
RVCC4
RRFI
GND
GND
GND
GND
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
24
23
22
21
20
19
18
17
XCEN
RXON
PAON
EN
DATA
CLK
TPC/TPQ
VSS
REF
RVCC1
QPO
GND
VCC2
RVCC3
VTUNE
GND
DOUT
VDD
DIN
RVCC7
RSSI/TPI
RVCC6
VBG
GND
ORDERING INFORMATION
PART NUMBER TEMPERATURE RANGE
PACKAGE
PUBLICATION
ML2722DH
-10
o
C to +60
o
C
32 Pin TQFP 7mm body DS2722-F-05
FEATURES
Single chip ISM band 900MHz Radio Transceiver
with -1 dBm transmit output power
1.5Mbps maximum data rate
Typical receiver sensitivity: -95dBm at 12.5% CER
Fully integrated frequency synthesizer with internal
VCO resonator
Automatic filter calibration: Requires no mechanical
tuning adjustments during manufacturing
Low IF Receiver: No external IF filters required
Control outputs correctly sequence and control
external PA
3-wire control interface
Analog RSSI output
APPLICATIONS
900MHz FSK Data Transceivers
-
Digital Cordless Phones
-
Wireless Streaming Media
-
Wireless PC Peripherals
BLOCK DIAGRAM
ML2722
DS2722-F-05
FINAL DATASHEET
DECEMBER 2003
2
TABLE OF CONTENTS
GENERAL DESCRIPTION............................................................................................................................................1
PIN CONFIGURATION .................................................................................................................................................1
ORDERING INFORMATION .........................................................................................................................................1
FEATURES....................................................................................................................................................................1
APPLICATIONS.............................................................................................................................................................1
BLOCK DIAGRAM ........................................................................................................................................................1
TABLE OF CONTENTS ................................................................................................................................................2
CHANGE LOG ..............................................................................................................................................................2
SIMPLIFIED APPLICATIONS DIAGRAM......................................................................................................................3
ELECTRICAL CHARACTERISTICS .............................................................................................................................4
PIN DESCRIPTIONS ....................................................................................................................................................7
FUNCTIONAL DESCRIPTION....................................................................................................................................13
MODES OF OPERATION ...........................................................................................................................................15
DATA INTERFACES....................................................................................................................................................18
CONTROL INTERFACES AND REGISTER DESCRIPTIONS ...................................................................................20
PHYSICAL DIMENSIONS (INCHES/MILLIMETERS).................................................................................................27
ORDERING INFORMATION .......................................................................................................................................27
WARRANTY ................................................................................................................................................................28
CHANGE LOG
VERSION
DATE
AUTHOR
CHANGES/COMMENTS
DS2722-F-03
9/26/03
Derby
Reformatted and updated from F02
DS2722-F-04
10/13/03
Derby
Error on Page 21 Table 5 Divide Ratio = fc / 0.512
DS2722-F-05
12/12/03
Derby
Some graphics printed poorly to PDF.
ML2722
DS2722-F-05
FINAL DATASHEET
DECEMBER 2003
3
SIMPLIFIED APPLICATIONS DIAGRAM
IMAGE
REJECT
MIXER
ML2722
IF DEMOD
CIRCUITS
CONTROL
LOGIC
PLL
BASEBAND
IC
RRFI
DOUT
DIN
RSSI
REF
CLK,
DATA,
EN
XCEN,
RXON
2
VCC5
TX DATA
FILTER
LOOP
FILTER
BATTERY
AND
PROTECTION
CIRCUITS
VTUNE
QPO
QUADRATURE
DIVIDE BY 2
1.83GHz VCO
TX RF
BUFFER
PA
TRFO
3
SWITCH
DRIVERS
RF PIN
DIODE
SWITCH
ANTENNA
MATCHING
NETWORK
FILTER
LNA
PAON,
TPC
2
Figure 1. Simplified Application Diagram
ML2722
DS2722-F-05
FINAL DATASHEET
DECEMBER 2003
4
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional device operation is not implied.
VDD, VCC5.................................................................................................................................................................6.0 V
VSS, GND..............................................................................................................................................................0 0.3V
Junction Temperature ............................................................................................................................................... 150C
Storage Temperature Range.......................................................................................................................-65C to 150C
Lead Temperature (Soldering, 10s) .......................................................................................................................... 260C
OPERATING CONDITIONS
Normal Temperature Range..........................................................................................................................-10C to 60C
VCC5 Range................................................................................................................................................... 2.7V to 4.5V
Thermal Resistance (
JA
) .................................................................................................................................... 100C/W
VDD Range (VCC5 = VDD) ............................................................................................................................ 2.7V to 4.5V
Unless otherwise specified, VCC5 & VDD = 2.7V to 3.8V, T
A
= Operating Temperature Range (Note 1) 6.144 or
12.288MHz reference frequency input
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
POWER CONSUMPTION
I
STBY
All Circuits, Standby Mode
10
100
A
I
RX,
I
TX
Receive or Transmit Mode
T
A
= 25C, VCC5 & VDD = 3.3V
30
50
63.5
mA
I
RX,
I
TX
Receive or Transmit Mode
T
A
= Operating Temperature Range
20
50
70
mA
SYNTHESIZER
f
C
LO output frequency
In 512 KHz steps
902
928
MHz
N
Phase noise at driver output
1.2 MHz
3 MHz
>7 MHz
VCO phase locked, loop bandwidth
50KHz. Discontinuities, other than
reference spurs, not allowed.
-100
-120
-125
dBc/Hz
f
REF
LO PLL reference frequency at
phase detector
PLL main divider input is at 1.83 GHz
1.024
MHz
N
LO division range integer
PLL divider limits
1024
4093
Count
I
P
LO charge pump sink/source
current
5.5
mA
t
TX2RX
LO lock up time for
Transmit/Receive frequency
change
From RXON asserted
50
s
t
FH
LO lock up time for channel
switch
From EN asserted, any channel
change in 902 to 928 MHz band
100
s
t
WAKE
LO lock up time from sleep
From XCEN, PLL dividers
programmed
240
s
V
FREF
Reference signal input level
6.144 or 12.288MHz sine wave,
capacitively coupled
2.0
3.0
Vp-p
ML2722
DS2722-F-05
FINAL DATASHEET
DECEMBER 2003
5
RECEIVER
Z
IN
Receiver RF impedance
f
c
=915 MHz
17-j50
NF
Receiver RF noise figure
f
c
=915 MHz
9
dB
DR
RX
Data Rate
FSK modulation, fdev=+/-460KHz
1.536
Mbps
S
Input Sensitivity
For better than 12.5% CER
-95
dBm
BW
RX
Bandwidth
3dB nominal
770
kHz
P
IMAX
Maximum RX RF input
<12.5% CER at 1.536Mchip/s
8
dBm
I
IP3
Receiver input IP3
Test tones 2 and 4 channels away
-12
dBm
LO Leakage at RXI
-80
dBm
IRR
Receive RF mixer image
rejection
Measured at 3.5MHz offset
35
dB
Adjacent channel rejection
-80dBm wanted signal <12.5% CER
(a single interferer with 2GFSK
modulation to give a
-20dBc bandwidth of 1.5MHz)
1 channel
2 channels
3 or more channels
15
40
45
dB
Receiver settling time
RXON high to valid data
120
s
IF FILTERS
f
IFC
IF filter center frequency
After Automatic Filter Alignment
1.024
MHz
BW
IF
IF filter 3dB bandwidth
After Automatic Filter Alignment
1405
kHz
LIMITER, AGC, AND FM DEMODULATOR
t
OVLD
Recovery from overload
From 0dBm at input
5
12
s
Eb/No
For 12.5% CER
3
dB
Co-Channel rejection, 12.5%
CER
-80 dBm, modulated with 1.536Mbps
GFSK, BT=0.5, PRBS data
4
dB
AM tolerance for 12.5% or better
CER
-80 dBm wanted signal, AM
modulation depth at 100 KHz rate
90
%
RSSI PERFORMANCE
t
RRSSI
RSSI rise time: < -100dBm to
-15dBm into the IF mixer
20 pF load, 20% to 80%
1
5.3
10
s
t
FRSSI
RSSI fall time: <-15dBm to
<-100dBm into the IF mixer
20 pF load, 20% to 80%
1
4.4
10
s
V
RSMX
RSSI maximum voltage
-15dBm in
2.2
2.8
V
V
RSMN
RSSI minimum voltage
No signal
0.05
V
G
RSMID
RSSI sensitivity, mid range
28
35
42
mV/dB
P
RSMX
RSSI maximum signal
Sensitivity is >50% mid range
-20
dBm
P
RSMN
RSSI minimum signal
Sensitivity is >50% mid range
-95
dBm
RSSI accuracy
Measured at -40dBm input power
1.5
1.9
2.1
V
PDF 
ZIP