May 1997

ML4411

/ML4411A

Sensorless Spindle Motor Controller

The ML4411A includes a comparator on the P3 output to
prevent cross-conduction.

FEATURES

Back-EMF commutation provides maximum torque
for minimum "spin-up" time for spindle motors

Accurate, jitter-free phase locked motor speed

feedback output

Linear or PWM motor current control

Easy microcontroller interface for optimized start-up
sequencing and speed control

Power fail detect circuit with delayed braking

Drives external N-channel FETs and P-channel FETs

Back-EMF comparator detects motor rotation after
power fail for fast re-lock after brownout

* This Product Is Obsolete

** This Product Is End Of Life As Of August 1, 2000

GENERAL DESCRIPTION

The ML4411 provides complete commutation for delta or
wye wound Brushless DC (BLDC) motors without the need
for signals from Hall Effect Sensors. This IC senses the
back EMF of the three motor windings (no neutral
required) to determine the proper commutation phase
angle using Phase Lock Loop techniques. This technique
will commutate virtually any 3-phase BLDC motor and is
insensitive to PWM noise and motor snubbing. The
ML4411 is architecturally similar to the ML4410 but with
improved braking and brown-out recovery circuitry.

Included in the ML4411 is the circuitry necessary for a
Hard Disk Drive microcontroller driven control loop.
The ML4411 controls motor current with either a constant
off-time PWM or linear current control driven by the
microcontroller. Braking and Power Fail are also included
in the ML4411.

The timing of the start-up sequencing is determined by the
micro, allowing the system to be optimized for a wide
range of motors and inertial loads.

The ML4411 modulates the gates of external N-Channel
power MOSFETs to regulate the motor current. The IC
drives P-Channel MOSFETs directly.

BLOCK DIAGRAM

BLDC

MOTOR

POWER

DRIVERS

GATE

DRIVE

LOGIC

AND

CONTROL

BACK-EMF

SAMPLER

VCO

LINEAR OR PWM

CURRENT CONTROL

POWER

FAIL

DETECT

VCO

VCO/TACH OUT

RESET

ENABLE E/A

BRAKE

DIS PWR

CMD

LIMIT

PWR FAIL

VCC

GND

OTA

SENSE

BRK

N1-3

P1-3

VCC2

PH3

PH2

PH1

PATENTED

RAMP

ML4411/ML4411A

PIN CONFIGURATION

GND

Signal and Power Ground

Drives the external P-channel
transistor driving motor PH1

Drives the external P-channel
transistor driving motor PH2

CC2

12V power and power for the
braking function

Drives the external P-channel
transistor driving motor PH3

OTA

Compensation capacitor for linear
motor current amplifier loop

BRK

Capacitor which stores energy to
charge N-channel MOSFETs for
braking with power off.

DIS PWR

A logic 0 on this pin turns off the N
and P outputs and causes the TACH
comparator output to appear on TACH
OUT

9-11 N1, N2 N3 Drives the external N-channel

MOSFETs for PH1, PH2, PH3

12 I

SENSE

Motor current sense input

13 C

Timing capacitor for fixed off-time
PWM current control

14 C

VCO

Timing capacitor for VCO

15 VCO/TACH Logic Output from VCO or TACH

OUT

comparator

16 RESET

Input which holds VCO off and sets the

IC to the RESET condition

17 PWR FAIL

A "0" output indicates 5V or 12V is
under-voltage. This is an open
collector output with a 4.5k� pull-up
to +5V

18 ENABLE E/A A "1" logic input enables the error

amplifier and closes the back-EMF
feedback loop

19 +5V

5V power supply input

20 RC

VCO loop filter components

21 I

RAMP

Current into this pin sets the initial
acceleration rate of the VCO during
start-up

22 PH1

Motor Terminal 1

23 PH2

Motor Terminal 2

24 PH3

Motor Terminal 3

25 V

12V power supply. Terminal which is
sensed for power fail

26 BRAKE

A "0" activates the braking circuit

27 I

LIMIT

Sets the threshold for the PWM
comparator

28 I

CMD

Current Command for Linear Current
amplifier

PIN NAME

FUNCTION

PIN NAME

FUNCTION

PIN DESCRIPTION

ML4411

28-Pin SOIC (S28W)

GND

VCC2

OTA

BRK

DIS PWR

SENSE

VCO

CMD

LIMIT

BRAKE

VCC

PH3

PH2

PH1

RAMP

+5V

ENABLE E/A

PWR FAIL

RESET

VCO/TACH OUT

TOP VIEW

ML4411/ML4411A

ELECTRICAL CHARACTERISTICS

Unless otherwise specified, T

= Operating Temperature Range, V

= V

CC2

= 12V, R

SENSE

= 1�, C

OTA

= C

VCO

= 0.01�F,

= 0.02�F

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Oscillator (VCO) Section (V

PIN16

= 5V)

Frequency vs. V

PIN 20

1V - V

PIN20

- 10V

300

Hz/V

Frequency

VCO

= 6V

1450

1800

2150

VCO

= 0.5V

140

210

Reset Voltage at C

VCO

Mode = 0

125

250

Sampling Amplifier (Note 1)

State R

125

250

PIN18

= 0V, R

RAMP

= 39k�

100

130

�A

PIN18

= 5V, State A, V

PH2

= 4V

�A

PIN18

= 5V, State A, V

PH2

= 6V

�13

�A

PIN18

= 5V, State A, V

PH2

= 8V

�30

�50

�90

�A

PIN21

= 39k� to +5V

1.0

1.1

1.20

Motor Current Control Section

SENSE

Gain

PIN27

= 5V, 0V - V

PIN28

- 2.5V

4.5

5.5

V/V

One Shot Off Time

�s

CMD

Transconductance Gain

0.19

mmho

CMD

, I

LIM

Bias Current

= 0

�100

�400

Power Fail Detection Circuit

12V Threshold

9.1

9.8

10.5

Hysteresis

150

5V Threshold

3.8

4.25

4.5

Hysteresis

Logic Inputs

Voltage High (V

)

Voltage Low (V

)

0.8

Current High (I

)

= 2.7V

�10

�A

Current Low (I

)

= 0.4V

�500

�350

�200

�A

ABSOLUTE MAXIMUM RATINGS

Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.

Supply Voltage (pins 4, 25) ........................................ 14V
Output Current (pins 2, 3, 5, 9,10,11) ................. �150mA
Logic Inputs (pins 16, 17, 18, 25) .................... �0.3 to 7V
Junction Temperature ............................................ 150�C
Storage Temperature Range ..................... �65�C to 150�C
Lead Temperature (Soldering 10 sec.) .................... 150�C
Thermal Resistance (

) ...................................... 60�C/W

OPERATING CONDITIONS

Temperature Range ........................................ 0�C to 70�C
VCC Voltage +12V (pin 25) ........................... 12V � 10%

+5V (pin 19) ................................................ 5V � 10%

I(RAMP) current (Pin 21) ................................. 0 to 100�A
I Control Voltage Range (pins 27, 28) ................ 0V to 7V

ML4411/ML4411A

ELECTRICAL CHARACTERISTICS

(Continued)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Braking Circuit (V

PIN17

= 0V)

Brake Active Threshold

0.8

1.2

1.6

PIN 26 Bias Current

PIN26

= 0V

0.3

�A

N-Channel Leakage

, V

CC2

= 0V

0.06

PIN17

= 0V, V

= 4V

BRK

Current

, V

CC2

= 0V, V

PIN26

= 3V

�A

PIN7

= 6V

Outputs (I

CMD

= I

LIMIT

= 2.5V)

Low

= 0.8V

19.5

= 0.4V

High

= �10�A

� 0.4

P3 Comparator Threshold

CC2

� 1.6

CC2

� 0.8

High

PIN12

= 0V

CC2

� 3.2

� 1.2

Low

= 1mA

0.2

0.7

LOGIC Low (V

)

OUT

= 0.4mA

0.5

VCO/TACH V

OUT

= �100�A

2.4

POWER FAIL V

OUT

= �10�A

PIN19

� 0.2 V

PIN19

� 0.1

PIN19

Supply Currents (N and P Outputs Open)

5V Current

Current

CC2

Current

ML4411

CC2

Current

ML4411A

2.6

3.75

Note 1. For explanation of states, see Figure 5 and Table 1.

ML4411/ML4411A

maximum voltage at any PH input does not exceed VCC.

NEUTRAL

120

180

240

300

Figure 2. Typical motor phase waveform with Back-EMF

superimposed (Ideal Commutation)

VCO AND PHASE DETECTOR CALCULATIONS

The VCO should be set so that at the maximum frequency
of operation (the running speed of the motor) the VCO
control voltage will be no higher than VCC

MIN

� 1V. The

VCO maximum frequency will be:

POLES RPM

MAX

�

0 05

where POLES is the number of poles on the motor and
RPM is the maximum motor speed in Revolutions Per

FUNCTIONAL DESCRIPTION

The ML4411 provides closed-loop commutation for
3-phase brushless motors. To accomplish this task, a VCO,
integrating Back-EMF Sampling error amplifier and
sequencer form a phase-locked loop, locking the VCO to
the back-EMF of the motor. The IC also contains circuitry
to control motor current with either linear or constant off-
time PWM modes. Braking and power fail detection
functions are also provided on chip. The ML4411 is
designed to drive external power transistors (N-channel
sinking transistors and PNP sourcing transistors) directly.

Start-up sequencing and motor speed control are
accomplished by a microcontroller. Speed sensing is
accomplished by monitoring the output of the VCO,
which will be a signal which is phased-locked to the
commutation frequency of the motor.

BACK-EMF SENSING AND COMMUTATOR

The ML4411 contains a patented back-EMF sensing
circuit which samples the phase which is not energized
(Shaded area in figure 2) to determine whether to increase
or decrease the commutator (VCO) frequency. A late
commutation causes the error amplifier to charge the
filter (RC) on pin 20, increasing the VCO input while
early
commutation causes pin 20 discharge. Analog speed
control loops can use pin 20 as a speed feedback voltage.

The input impedance of the three PH inputs is about 8K�
to GND. When operating with a higher voltage motor, the
PH inputs should be divided down in voltage so that the

FIGURE 1. BACK EMKF sensing block diagram

NEUTRAL

SIMULATOR

A +

B +

MULTIPLEXER

VCO

COMMUTATION

LOGIC

SIGN

CHANGER

�

I(PIN 21)

LOOP FILTER

Va � Vb

VCO /TACH OUT

�

DIS PWR

ROTATION

SENSE

ML4411/ML4411A

Minute.

The minimum VCO gain derived from the specification
table (using the minimum Fvco at V

VCO

= 6V) is:

VCO MIN

VCO

(

)

�

2 42 10

Assuming that the V

VCO(MAX)

= 9.5V, then

VCO

MAX

�

9 5 2 42 10

POLES RPM

VCO

�

460

�

3000

2500

2000

1500

1000

500

0.01

�

0.02

�

FREQUENCY (Hz)

VCO

(VOLTS)

Figure 3. VCO Output Frequency vs. V

VCO

(Pin 20)

Figure 4 shows the transfer function of the Phase Lock
Loop with the phase detector formed from the sampled
phase through the Gm amplifier with the loop filtered
formed by R, C1, and C2.

The impedance of the loop filter is

C s

LEAD

LAG

( )

(

)

(

)

VCO

�

OUT

VCO

(HZ/V)

Gm = 1.25 x 10

�4

SAMPLED

PHASE

Figure 4. Back EMF Phase Lock Loop Components

Where the lead and lag frequencies are set by:

LEAD

R C

LAG

R C C

1 2

START-UP SEQUENCING

When the motor is initially at rest, it is generating no
back-EMF. Because a back-EMF signal is required for
closed loop commutation, the motor must be started
"open-loop" until a velocity sufficient to generate some
back-EMF is attained (around 100 RPM). The following
steps are a typical procedure for starting a motor which is
at rest.

Step 1: The IC is held in reset (state R) with full power
applied to the windings (see figure 6). This aligns the rotor
to a position which is 30� (electrical) before the center of
the first commutation state.

Step 2: Reset is released, and a fixed current is input to
pin 21 and appears as a current on pin 20, and will ramp
the VCO input voltage, accelerating the motor at a fixed
rate.

Step 3: When the motor speed reaches about 100 RPM,
the back EMF loop can be closed by pulling pin 18 high.

RESET/
ALIGN

P1, P3, N2 ON

OPEN-LOOP

(STEPPING)

CLOSED LOOP

VCO FREQUENCY

RESET

ENABLE E/A

Figure 6. Typical Start-up Sequence.

Using this technique, some reverse rotation is possible.
The maximum amount of reverse rotation is 360/N, where
N is the number of poles. For an 8 pole motor, 45� reverse
rotation is possible.

For quick recovery following a momentary power failure,
the following steps can be taken:

LIMIT

STEP

CMD

FIXED

MAX

FIXED

MAX

Table 2. Start-up Sequence.

ML4411/ML4411A

OUTPUTS

INPUT

STATE

SAMPLING

R OR 0

OFF

N/A

OFF

PH2

OFF

PH1

OFF

PH3

OFF

PH2

OFF

PH1

OFF

PH3

Table 1. Commutation States.

RESET

4.3 V

VCO

2.3 V

VCO OUT

STATE

Figure 5. Commutation Timing and Sequencing.

ADJUSTING OPEN LOOP STEP RATE

RAMP

should be set so that the VCO's frequency ramp

during "open loop stepping" phase of motor starting is less
than the motor's acceleration rate. In other words, the
motor must be able to keep up with the VCO's ramp rate
in open loop stepping mode. The VCO's input voltage
(V

PIN 20

) ramp rate is given by:

VCO

RAMP

since

VCO

�

VCO MAX

VCO

(

)

= �

4 10

then combining the 3 equations I

RAMP

can be calculated

from the desired maximum open loop stepping rate the
motor can follow.

RAMP

VCO

�

(

)

4 10

Step 1a: The IC is held in reset (state R) with I

CMD

low

and DIS PWR low. The Micro Processor monitors the VCO/
TACH OUT pin to determine if a signal is present. If a
signal is present, the frequency is determined (by
measuring the period). If a signal is not present, proceed
to the routine described above for starting a motor which
is a rest.

Step 2a: Release RESET and DIS PWR. Apply a current to
pin 21 and monitor the VCO/TACH OUT pin for VCO
frequency.

Step 3a: When the VCO frequency approaches 6 X the
motor frequency (or where the motor frequency has
decelerated to by coasting during the time the VCO
frequency was ramping up) the back EMF loop can be
closed by pulling pin 18 high and motor current brought
up with I

CMD

or I

LIMIT

ML4411/ML4411A

The motor will start more consistently and tolerate a wider
variation in open loop step rate if there is some damping
on the motor (such as head drag) during the open loop
modes.

The tolerance of the open loop step VCO acceleration

VCO

depends on the tolerances of K

VCO

, I

RAMP

, C1,

C2, and C

VCO

. For more optimum spin up times, these

variables can be digitally "calibrated" out by the
microprocessor using the following procedure:

1. Reset the IC by holding pin 16 low for at least 5�s.

2. Go into open loop step mode with no current on

the motor and measure the difference between the
first two complete VCO periods with the PWM
signal at 50% duty cycle:

ENABLE E/A = (see below)
I

CMD

= 0V

PWM OUT = 50%

I(RAMP)

VCO/TACH OUT

PWM OUT

MicroP

ML4411

Figure 7. Auto-Calibration of Open-Loop Step

Rate.

3. Compute a correction factor to adjust I

RAMP

current

by changing the PWM duty cycle from the
Micro (D.C.)

DC NEW

DESIRED

MEASURED

VCO

. .(

)

(

)

(

)

�

4. Use new computed duty cycle for open loop

stepping mode and proceed with a normal start-up
sequence.

If this auto calibration is used ENABLE E/A can be tied
permanently high, eliminating a line from the Micro.
Since there is offset associated with the Phase Detector
Error Amp (E/A), more current than is being injected by
I

RAMP

may be taken out of pin 20 if the offset is positive

(into pin 20) if the error amp were enabled during the
open loop stepping mode. In that case, V

VCO

would not

rise and the motor would not step properly. The effect of
E/A offset can also be canceled out by the auto calibration
algorithm described above allowing the E/A to be
permanently enabled.

OTA

�

1 875 10

�

PWM AND LINEAR CURRENT CONTROL

To facilitate speed control, the ML4411 includes two
current control loops -- linear and PWM (figure 9). The
linear control loop senses the motor current on the I

SENSE

terminal through R

SENSE

. An internal current sense

amplifier's (A2) output modulates the gates of the 3 N-
channel MOSFET's when OTA OUT is tied to OTA IN, or
can modulate a single MOSFET gate tied to OTA OUT.
When operated in this mode, OTA IN is tied to 12V, and
N1-N3 are saturated switches. This method produces the
lowest current ripple at the expense of an extra MOSFET.

The linear current control modulates the gates of the
external MOSFET drivers. Amplifier A2 is a
transconductance amplifier which amplifies the difference
between I

CMD

and I

SENSE

. The transconductance gain of

A2 is:

�

1 875 10

The current loop is compensated by C

OTA

which forms a

pole given by

OTA

�

9 375 10

This time constant should be fast enough so that the
current loop settles in less than 10% of T

VCO

at the

highest motor speed to avoid torque ripple to V

mismatch of the N-Channel MOSFETs.

The I

SENSE

input pin should be kept below 1V. If I

SENSE

goes above 1V, a bias current of about �300�A will flow
out of pin 12 and the N outputs will be inhibited. Bringing
I

SENSE

below 0.7V removes the bias current to its normal

level. For this reason, the noise filter resistor on the I

SENSE

pin (1K� on Figure 10) should be less than 1.5K�.

The noise filter time constant should be great enough to
filter the leading edge current spike when the N-FETs turn
on but small enough to avoid excessive phase shift in the
I

SENSE

signal.

OUTPUT DRIVERS

The motor's source drivers (P1 thru P3) are open-collector
NPN's with internal 16K� pull-up resistors. N3is inhibited
until P3 is within 1.4V (typ) of V

CC2

on the ML4411A.

Drivers N1 through N3 are totem-pole outputs capable of
sourcing and sinking 10mA. Switching noise in the
external MOSFETs can be reduced by adding resistance in
series with the gates.

ML4411/ML4411A

BRAKING

As shown in figure 9, the braking circuit pulls the N-
Channel MOSFET gates high when BRAKE falls below a
1.4V threshold. After a power failure, C

DLY

is discharged

slowly through R

DLY

providing a delay for retract to occur

before the braking circuit is activated. The N-Channel
buffer (B1) tri-states when the BRAKE pin reaches 2.1V to
ensure that no charge from C

BRK

is lost through the pull-

down transistor in B1. To brake the motor with external
signals, first disable power by pulling pin 8 low, then pull
pin 26 below 1.4V using an open drain (or diode isolated)
output.

The bias current for the Braking circuits comes from
VCC2. When the N-Channel MOSFETs turn on, no
additional power is generated for VCC2 (motor back-EMF
rectified through out the MOSFET body diodes). After
VCC2 drops below 4V, Q2 turns off. Continued braking
relies on the C

of the N-Channel MOSFETs to sustain

the MOSFET gate enhancement voltage.

0.01

0.02

0.03

0.04

0.05

OFF

(�s)

Figure 8. I

LIMIT

Output Off-Time vs. C

P3 ONLY

�

VCC2 � 3V

COMM. LOGIC

DLY

BRAKE

DLY

1.4V

�

VCC2

DIS PWR

COMMUTATION

LOGIC

UVLO

LIMIT

CMD

SENSE

�

= 5

ONE

SHOT

VCC

VCC2

P1 . . . P3

N1 . . . N3

SENSE

VIN

OTA

BRK

VCC

2.1V

�

VCC2

DIS PWR

VCC2

16K

POWER FAIL

4.5K

UVLO

TRI-

ST.

Figure 9. Current Control, Output Drive and Braking Circuits.

ML4411/ML4411A

APPLICATIONS

Figure 10 shows a typical application of the ML4411 in a
hard disk drive spindle control. Although the timing
necessary to start the motor in most applications would be
generated by a microcontroller, Fig. 11 shows a simple
"one shot" start-up timing approach.

Speed control can be accomplished either by:

1. Sensing the VCO OUT frequency with a

Microcontroller and adjusting I

CMD

via an analog

output form the Micro (PWM DAC).

2. Using analog circuitry for speed control. (Fig. 12).

OUTPUT STAGE HINTS

In the circuit in Figure 10, Q1, Q2, and Q3 are IRFR9024
or equivalent. Q4, Q5, and Q6 are IRFR024 or equivalent.
New MOSFET packaging technology such as the Little
Foot

series may decrease the PC board space. These

packages, however have much lower thermal inertia and
dissipation capabilities than the larger packages, and care
should be taken not to exceed their rated current and
junction temperature.

Since the output section in a full bridge application
consists of three half-H switches, cross-conduction can
occur. Cross-conduction is the condition where an N-FET
and P-FET in the same phase of the bridge conduct
simultaneously. This could happen under two conditions
(see figure 13):

CMD

LIMIT

BRAKE

VCC

PH3

PH2

PH1

RAMP

+5V

ENABLE E/A

PWR FAIL

RESET

VCO/TACH OUT

GND

VCC2

OTA

BRK

DIS PWR

SENSE

VCO

COMMAND

+12

510K

0.22

0.5

0.1

VCC2

1N5819

0.1

+12V

TO VCC

510

0.01

0.22

0.02

0.01

ENABLE ERROR AMP

RESET (FROM MICRO)

POWER FAIL TO MICRO

VCO OUT

DISABLE POWER

100pF

+12

510

Figure 10. ML4411 Typical Application

ML4411/ML4411A

+5V

TO ML4411
PIN 16

IC1

TO ML4411
PIN 18

1/6

ML4411

PIN 17

Figure 11. Analog Start-up Circuit

TO ML4411
PIN 28

�

+12V

TO ML4411

PIN 20

SYMBOL

VALUE

LM358

IC1

74HC14

D1, D2

IN4148

1 M �

100K�

SYMBOL

VALUE

100K�

50K�

3.3�F

0.47�F

Figure 12. Analog Speed Control

In Condition 2 above, the P-Channel MOSFET is pulled up
inside the ML4411 with a 16K� resistor. If the current
through C(CGp) is greater than V

� 16K when the

N-FET turns on, the P-FET could turn on simultaneously,
causing cross-conduction. Adding R1 as shown in Figure
14 eliminates this. The size of R1 will depend on the fall
time of the phase voltage, and the size of the C(DGp). D1
may be needed for high power applications to limit the
negative current pulled (through C(DGn)) out of the
substrate diode in the ML4411 when P-FET turns off.

C(DGn)

C(DGp)

RG(P)

RG(N)

VCC2

Figure 14. Causes of Cross-conduction

Adding a series damping resistor to the N-FET gate (RGn)
will slow the fall time. The damping resistor should be
low enough to:

Avoid turning on the N-Channel gate when the PNP
turns on via the same mechanism outlined in condition
2 above

Not severely increase the switching losses in the N-FET

UNIPOLAR OPERATION

Unipolar mode offers the potential advantage of lower
motor drive cost by only requiring the use of 3 transistors
to drive the motor. The ML4411 will operate in unipolar
mode (Figure 15) provided the following precautions are
taken:

1. The IC supplies should not exceed 12V + 10%.

2. The phase pins on the IC should not exceed the

supply voltage.

VCC2

INHIBIT N3

�

ML4411A ONLY

16K

Figure 13. Alternate cross-conduction prevention for

ML4411A

1. When transitioning from mode 0 to mode A (see table

1) P3 goes from on to off at the same time N3 goes
from off to on. If the P3 turns off slowly and N3 turns
on quickly, cross-conduction may occur. This condition
has been prevented inside the IC on the ML4411A
through the addition of comparator A6 on the P3
output (Figure 9). This comparator may cause an
oscillation when the N3 switches on due to the
capacitive coupling effect described below pulling the
P3 pin below VCC2-1.4V. To avoid this, use the circuit
in Figure 13.

2. When the MOSFET in the same phase switches on gate

current flows due to capacitive coupling of current
through the MOSFET's drain to gate capacitance. This
could cause the device that was off to be turned on.

ML4411/ML4411A

CMD

LIMIT

BRAKE

VCC

PH3

PH2

PH1

RAMP

+5V

ENABLE E/A

PWR FAIL

RESET

VCO/TACH OUT

GND

VCC2

OTA

BRK

DIS PWR

SENSE

VCO

0.01

1.2K

0.5

10K

+12

�

+12

3.3K

10K

2.2

DLY

+12

0.01

0.02

Figure 15. ML4411 Unipolar Drive Application

In unipolar operation, the motor`s windings must be
allowed to drive freely to:

F(MAX)

= V

SUPPLY (MAX)

+ V

EMF (MAX)

Therefore, there can be no diodes to clamp the inductive
energy to V

SUPPLY

. This energy must be clamped,

however, to avoid an over-voltage condition on the
MOSFETs and other components. Typically, a V

CLAMP

voltage is created to provide the clamping voltage. The
inductive energy may either be dissipated (Figure 16) or
alternately efficiently regenerated back to the system
supply (Figure 17).

The circuit in Figure 15 is designed to minimize the
external components necessary, at some compromise to
performance. The 3 resistors from the motor phase
windings to the PH inputs work with the ML4411`s 8K�
internal resistance to ground to divide the motor`s
phase voltage down, providing input signals that do not
exceed 12V.

CLAMP

= +24V

12V

BATTERY

0.1

+12V TO

VCC AND VCC2

+12V

REG

12V

LDO

0.1

1000

0.1

+5V

Figure 16. Dissipative Clamping Technique

This circuit uses analog speed regulation. The 1M�
resistor from Pin 20 to the speed regulation op amp
provides the function of injecting current into the VCO
loop filter for the open loop stepping phase of start-up
operation. The "one shot" circuitry to time the reset is
replaced by a diode and RC delay from the rising edge or
the POWERFAIL signal. The error amplifier is left enabled
continuously since at low speeds its current contribution
is negligible. The current injected into the loop filter must
be greater than the leakage current from the phase
detector amplifier for the motor to start reliably.

CLAMP

= +24V

REG

12V

LDO

0.1

12V

BATTERY

50% DUTY

CYCLE

Figure 17. Non-Dissipative Clamping Technique

ML4411/ML4411A

Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design.
Micro Linear does not assume any liability arising out of the application or use of any product described herein,
neither does it convey any license under its patent right nor the rights of others. The circuits contained in this
data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to
whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility
or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel
before deciding on a particular application.

DS4411-01

2092 Concourse Drive

San Jose, CA 95131

Tel: 408/433-5200

Fax: 408/432-0295

ORDERING INFORMATION

PART NUMBER

TEMPERATURE RANGE

PACKAGE

ML4411CS (Obsolete)

0�C to 70�C

28-Pin Wide SOIC (S28W)

ML4411ACS (End Of Life)

0�C to 70�C

28-Pin Wide SOIC (S28W)

SEATING PLANE

0.291 - 0.301

(7.39 - 7.65)

PIN 1 ID

0.398 - 0.412

(10.11 - 10.47)

0.699 - 0.713

(17.75 - 18.11)

0.012 - 0.020

(0.30 - 0.51)

0.050 BSC
(1.27 BSC)

0.022 - 0.042

(0.56 - 1.07)

0.095 - 0.107

(2.41 - 2.72)

0.005 - 0.013

(0.13 - 0.33)

0.090 - 0.094

(2.28 - 2.39)

0.009 - 0.013

(0.22 - 0.33)

0� - 8�

0.024 - 0.034

(0.61 - 0.86)

(4 PLACES)

Package: S28

28-Pin SOIC

PHYSICAL DIMENSIONS

inches (millimeters)

� Micro Linear 1997

is a registered trademark of Micro Linear Corporation

Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940;
5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946; 2619299. Other patents are pending.

Электронный компонент: ML4411CS