March 1997
ML4663
Single Chip 10BASE-FL Transceiver
GENERAL DESCRIPTION
The ML4663 single-chip 10BASE-FL transceiver integrates
both a ML4662 10BASE-FL transceiver with a ML4622
fiber optic data quantizer to implement a highly integrated
solution for 10BASE-FL transceivers. The ML4663 offers a
standard IEEE 802.3 AU interface that allows it to be
directly connected to industry standard manchester
encoder/decoder chips or an AUI connector.
The ML4663 provides a highly integrated solution that
requires a minimal number of external components, and is
compliant to the IEEE 802.3 10BASE-FL standard. The
transmitter offers a current drive output that directly drives
a fiber optic LED transmitter. The receiver offers a highly
stable fiber optic data quantizer capable of accepting
input signals as low as 2mV
P-P
with a 55dB dynamic
range.
The transmitter automatically inserts 1MHz signal during
idle time and removes this signal on reception. Low Light
is continuously monitored for both activity as well as
power level. Five LED status indicators monitor error
conditions as well as transmissions, receptions and
collisions.
FEATURES
s
Single chip solution for 10BASE-FL internal or external
Medium Attachment Units (MAUs)
s
Incorporates an AU interface
s
Highly stable data quantizer with 55dB input
dynamic range
s
Input sensitivity as low as 2mV
P-P
s
Current driven fiber optic LED driver for accurate
launch power
s
Single +5 volt supply
s
No crystal or clock required
s
Five network status LED outputs
AUI
RECEIVER
Tx
SQUELCH
AUI
DRIVER
AUI
DRIVER
10MHz GATED
OSCILLATOR
LOOPBACK
MUX
JABBER
RECEIVE SQUELCH
LINK DETECT
V
REF
LED
DRIVERS
FIBER OPTIC
LED
DRIVER
1MHz IDLE
SIGNAL
SQE
GND
V
CC
(+5V)
+5V
LBDIS
AGND
C
TIMER
RRSET
Tx
Rx
BIAS
GND
V
CC
Tx
(+5V)
+5V
RTSET
SQEN/JABD
Tx+
Tx
COL+
COL
Rx+
Rx
AV
CC
TxOUT
XMT
RCV
CLSN
JAB
LMON
V
IN
+
V
DC
V
REF
V
THADJ
V
IN
CMP
AMP
5
17
12
20
27
18
15
16
1
28
14
26
25
21
22
23
4
24
8
13
9
19
7
6
3
2
11
10
BLOCK DIAGRAM
1
Please See ML4668 for New Designs
2
ML4663
PIN CONNECTION
V
IN
AGND
V
THADJ
V
REF
V
DC
GND
GND
SQEN/JABD
Rx+
Rx
LBDIS
V
CC
Tx+
Tx
25
24
23
22
21
20
19
5
6
7
8
9
10
11
12 13 14 15 16 17 18
4 3 2 1 28 27 26
RTSET
RRSET
LMON
XMT
RCV
V
CC
Tx
TxOUT
C
TIMER
COL
COL+
CLSN
JAB
AV
CC
V
IN
+
ML4663
28-Pin PLCC (Q28)
3
ML4663
PIN
NAME
FUNCTION
15
XMT
Indicates that transmission is taking
place. Active low LED driver, open
collector. Event is extended with
internal timer for visibility.
16
RCV
Indicates that the transceiver is
receiving a frame from the optical
input. Active low LED driver, open
collector. Event is extended with
internal timer for visibility.
17
V
CC
Tx
+5 volt supply for fiber optic LED
driver.
18
TxOUT
Fiber optic LED driver output.
19
GND
Ground Reference.
20
GND
Ground Reference.
21
V
DC
An external capacitor on this pin
integrates an error signal which
nulls the offset of the input
amplifier. If the DC feedback loop is
not being used, this pin should be
connected to V
REF
.
22
V
REF
A 2.5V reference with respect to
GND.
23
V
THADJ
This input pin sets the link monitor
threshold.
24
AGND
Analog Filtered Ground.
25
V
IN
This input pin should be
capacitively coupled to the input
source or to filtered AV
CC
. (The
input resistance is approximately
1.3k
.)
26
V
IN
+
This input pin should be
capacitively coupled to the input
source or to filtered AV
CC
. (The
input resistance is approximately
1.3k
.)
27
AV
CC
Analog Filtered +5 volts.
28
JAB
Jabber network status LED. When in
the Jabber state, this pin will be low
and the transmitter will be disabled.
In the Jabber "OK" state this pin will
be high. Active low LED, open
collector.
PIN DESCRIPTION
PIN
NAME
FUNCTION
1
CLSN
Indicates that a collision is taking
place. Active low LED driver, open
collector. Event is extended with
internal timer for visibility.
2
COL+
Gated 10MHz oscillation used to
3
COL
indicate a collision, SQE test, or
jabber. Balanced differential line
driver outputs that meet AUI
specifications.
4
C
TIMER
A capacitor from this pin to V
CC
determines the Link Monitor
response time.
5
SQEN/JABD SQE Test Enable, Jabber Disable.
When tied low, SQE test is disabled,
when tied high SQE test is enabled.
When tied to 2.0V both SQE test and
Jabber are disabled.
6
Rx+
Manchester encoded receive data
7
Rx
output to the local device. Balanced
differential line driver outputs that
meet AUI specifications.
8
LBDIS
Loopback Disable. When this pin is
tied to V
CC
, the AUI transmit pair
data is not looped back to the AUI
receive pair, and collision is disabled.
When this pin is tied to GND
(normal operation) or left floating, the
AUI transmit pair data is looped back
to the AUI receiver pair, except
during collision.
9
V
CC
+5 volt power input.
10
Tx+
Balanced differential line receiver
11
Tx
inputs that meet AUI specifications.
These inputs may be transformer or
capacitively coupled. The Tx input
pins are internally DC biased for AC
coupling.
12
RTSET
Sets the current driven output of the
transmitter.
13
RRSET
A 1% 61.9k
resistor tied from this
pin to V
CC
sets the biasing currents
for internal nodes.
14
LMON
Link Monitor "Low Light" LED status
output. This pin is pulled low when
the voltage on the V
IN
+, V
IN
inputs
exceed the minimum threshold set by
the V
THADJ
pin, and there are
transitions on V
IN
+, V
IN
indicating
an idle signal or active data. If either
the voltage on the V
IN
+, V
IN
inputs
fall below the minimum threshold or
transitions cease on V
IN
+, V
IN
,
LMON will go high. Active low LED
driver, open collector.
4
ML4663
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are limits beyond which the
life of the integrated circuit may be impaired. All voltages
unless otherwise specified are measured with respect to
ground.
Power Supply Voltage Range
V
CC ...................................................................
GND 0.3 to 6V
Input Voltage Range
Digital Inputs
SQEN, LBDIS ....................... GND 0.3 to V
CC
+0.3V
Tx+, Tx, V
IN
+, V
IN
............... GND 0.3 to V
CC
+0.3V
Input Current
RRSET, RTSET,
JAB, CLSN, XMT, RCV, LMON ...... 60mA
Output Current
TxOUT ................................................................ 70mA
Junction Temperature .............................................. 150
C
Storage Temperature Range ...................... 65
C to 150
C
Lead Temperature (Soldering) .................................. 260
C
Thermal Resistance (
JA
) ....................................... 68
C/W
OPERATING CONDITIONS
Supply Voltage (V
CC
) ........................................... 5V
5%
LED on Current ....................................................... 10mA
RRSET .......................................................... 61.9k
1%
RTSET ............................................................. 115
1%
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, T
A
= Operations Temperature Range, V
CC
= V
CC
Tx = 5V
5% (Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
CC
Power Supply Current I
CC
:
V
CC
= 5V, RTSET = 115
220
mA
While Transmitting
(Note 2)
V
OL
LED Drivers: V
OL
I
OL
= 10mA (Note 3)
0.8
V
I
OUT
Transmit Peak Output Current
RTSET = 115
(Note 4)
44
52
57
mA
V
SQ
Transmit Squelch Voltage Level
300
250
200
mV
(Tx+, Tx)
V
DO
Differential Output Voltage
550
1200
mV
(Rx
, COL
)
V
CM
Common Mode Output Voltage
4.0
V
(Rx
, COL
)
V
DOO
Differential Output Voltage
40
mV
Imbalance (Rx
, COL
)
V
SQE
SQE/JABD
SQE Test Disable
0.3
V
Both Disabled
1.5
V
CC
2
V
Both Enabled
V
CC
0.5
V
V
LBTH
LBDIS Threshold
Disabled
V
CC
0.1
V
Enabled
1
V
V
TXCM
Common Mode Voltage
3.5
V
(Tx+, Tx)
V
INCM
Common Mode Voltage
1.65
V
(V
IN
+, V
IN
)
V
REF
Reference Voltage
2.30
2.45
2.60
V
I
REF
V
REF
Output Source Current
5
mA
A
V
Amplifier Gain
100
V/V
V
ISR
Input Signal Range
2
1600
mV
PP
5
ML4663
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, T
A
= Operations Temperature Range, V
CC
= V
CC
Tx = 5V
5% (Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
THADJ
External Voltage at V
THADJ
0.5
2.7
V
to Set V
TH
V
OFF
Input Offset
V
DC
= V
REF
(DC loop inactive)
3
mV
V
N
Input Referred Noise
50MHz BW
25
V
R
IN
Input Resistance
V
IN
+, V
IN
0.8
1.3
2.0
k
I
TH
Input Bias Current of V
THADJ
200
10
+200
A
V
TH
Input Threshold Voltage
V
THADJ
= V
REF
(Note 5)
5
6
7
mV
PP
H
Hysteresis
20
%
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
MIN
TYP
MAX
UNITS
Transmit
F
TXIDF
Transmit Idle Frequency
0.85
1.25
MHz
P
TXDC
Transmit Idle Duty Cycle
45
55
%
t
TXNPW
Transmit Turn-On Pulse Width
20
ns
t
TXODY
Transmit Turn-On Delay
200
ns
t
TXLP
Transmit Loopback Start-up Delay
500
ns
t
TXFPW
Transmit Turn-Off Pulse Width
180
ns
t
TXSOI
Transmit Turn-Off Start of Idle
400
2100
ns
t
TXSDY
Transmit Steady State Propagation Delay
15
50
ns
t
TXJ
Transmit Jitter into 31
Load
1.5
ns
Receive
F
RXSFT
Receive Squelch Frequency Threshold
2.51
4.5
MHz
t
RXODY
Receive Turn-On Delay
285
ns
t
RXFX
Last Bit Received to Slow Decay Output
230
300
ns
t
RXSDY
Receive Steady State Propagation Delay
15
50
ns
t
RXJ
Receive Jitter
1.5
ns
t
AR
Differential Output Rise Time 20% to 80% (Rx
, COL
)
4
ns
t
AF
Differential Output Fall Time 20% to 80% (Rx
, COL
)
4
ns
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