March 1997
ML4665
Low Cost Single Chip 10BASE-FL Transceiver
GENERAL DESCRIPTION
The ML4665 is a low power, low cost, single chip
10BASE-FL transceiver. The ML4665 contains a fiber optic
data quantizer and an LED output driver for direct
connection to an optical module(s). The ML4665 offers a
standard IEEE 802.3 AU interface that allows it to be
directly connected to industry standard manchester
encoder/decoder chips or an AUI connector.
The ML4665 provides a highly integrated solution that
requires a minimal number of external components. The
transmitter offers a 100mA maximum current drive output
that directly drives a fiber optic LED transmitter. The
receiver offers a highly stable fiber optic data quantizer
capable of accepting input signals as low as 2mV
P-P
with
a 55dB dynamic range.
The ML4665 is a lower cost version of the industry
standard ML4663. To achieve lower cost, the ML4665
eliminates some functionality (as described below) and is
packaged in a 20-lead PLCC package.
FEATURES
s
Lower cost single chip solution for 10BASE-FL internal
or external Medium Attachment Units (MAUs)
s
Incorporates an AU interface
s
Highly stable data quantizer with 55dB input
dynamic range
s
Input sensitivity as low as 2mV
P-P
s
100mA maximum current driven fiber optic LED driver
for accurate launch power
s
Single +5 volt supply
s
No crystal or clock required
s
Link monitor LED indicator
1
BLOCK DIAGRAM
AUI
RECEIVER
Tx
SQUELCH
AUI
DRIVER
AUI
DRIVER
10MHz GATED
OSCILLATOR
LOOPBACK
MUX
JABBER
RECEIVE SQUELCH
LINK DETECT
V
REF
FIBER OPTIC
LED
DRIVER
1MHz IDLE
SIGNAL
COL
GND
V
CC
(+5V)
+5V
AGND
LBDIS
C
TIMER
RRSET
Tx
Rx
BIAS
V
CC
Tx
(+5V)
+5V
RTSET
Tx+
Tx
COL+
COL
Rx+
Rx
AV
CC
TxOUT
LMON
V
IN
+
V
DC
V
IN
-
CMP
AMP
2
3
4
5
8
7
14
6
10
1
17
15
16
18
19
11
13
20
9
12
2
ML4665
PIN CONNECTION
ML4665
20-Pin PLCC (Q20)
V
IN
AGND
V
DC
C
TIMER
GND
Rx+
Rx
V
CC
Tx+
Tx
18
17
16
15
14
4
5
6
7
8
3
2
1
20
19
9
10
11
12
13
RTSET
RRSET
LMON
V
CC
Tx
TxOUT
COL
COL+
LBDIS
AV
CC
V
IN
+
3
ML4665
PIN
NAME
FUNCTION
11
LMON
Link Monitor "Low Light" LED status
output. This pin is pulled low when
the voltage on the V
IN
+, V
IN
inputs
exceed the minimum threshold and
there are transitions on V
IN
+, V
IN
indicating an idle signal or active
data. If either the voltage on the
V
IN
+, V
IN
inputs fall below the
minimum threshold or transitions
cease on V
IN
+, V
IN
,
LMON will go
high. Active low LED driver, open
collector.
12
V
CC
Tx
+5 volt supply for fiber optic LED
driver.
13
TxOUT
Fiber optic LED driver output.
14
GND
Ground Reference.
15
C
TIMER
A capacitor from this pin to V
CC
determines the Link Monitor
response time.
16
V
DC
An external capacitor on this pin
integrates an error signal which
nulls the offset of the input
amplifier. If the DC feedback loop
is not being used, this pin should
be connected to V
REF
.
17
AGND
Analog Filtered Ground.
18
V
IN
This input pin should be
capacitively coupled to the input
source or to filtered AV
CC
. (The
input resistance is approximately
1.3k
.)
19
V
IN
+
This input pin should be
capacitively coupled to the input
source or to filtered AV
CC
. (The
input resistance is approximately
1.3k
.)
20
AV
CC
Analog Filtered +5 volts.
PIN DESCRIPTION
PIN
NAME
FUNCTION
1
LBDIS
Loopback disable. When this pin is
tied to V
CC
, the AUI transmit pair
data is not looped back to the AUI
receive pair. The ML4665 will now
operate in the full duplex mode.
When tied to GND or left floating,
the AUI transmit pair data is looped
back to the AUI receive pair, except
during collision. The ML4665 will
now operate in the half duplex
mode.
2
COL+
Gated 10MHz oscillation used to
3
COL
indicate a collision or jabber.
Balanced differential line driver
outputs that meet AUI specifications.
4
Rx+
Manchester encoded receive data
5
Rx
output to the local device. Balanced
differential line driver outputs that
meet AUI specifications.
6
V
CC
+5 volt power input.
7
Tx+
Balanced differential line receiver
8
Tx
inputs that meet AUI specifications.
These inputs may be transformer or
capacitively coupled. The Tx input
pins are internally DC biased for AC
coupling.
9
RTSET
Sets the current driven output of the
transmitter.
10
RRSET
A 1% 61.9k
resistor tied from this
pin to V
CC
sets the biasing currents
for internal nodes.
4
ML4665
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are limits beyond which the
life of the integrated circuit may be impaired. All voltages
unless otherwise specified are measured with respect to
ground.
Power Supply Voltage Range
V
CC ...................................................................
GND 0.3 to 6V
Input Voltage Range
Digital Inputs
(SQEN, LBDIS) .................... GND 0.3 to V
CC
+0.3V
Tx+, Tx, V
IN
+, V
IN
............... GND 0.3 to V
CC
+0.3V
Input Current
RRSET, RTSET,
LMON .......................................... 60mA
Output Current
TxOUT .............................................................. 120mA
Junction Temperature .............................................. 150
C
Storage Temperature Range ...................... 65
C to 150
C
Lead Temperature (Soldering) .................................. 260
C
Thermal Resistance (
JA
) ....................................... 78
C/W
OPERATING CONDITIONS
Supply Voltage (V
CC
) ........................................... 5V
5%
LED on Current ....................................................... 10mA
RRSET .......................................................... 61.9k
1%
RTSET ............................................................. 115
1%
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, T
A
= Operating Temperature Range, V
CC
= V
CC
Tx = 5V
5% (Note 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
CC
Power Supply Current I
CC
:
V
CC
= 5V, RTSET = 115
(Note 2)
140
mA
While Transmitting
V
OL
LED Driver: V
OL
I
OL
= 10mA (Note 3)
0.8
V
I
OUT
Transmit Peak Output Current
RTSET = 115
(Note 4)
44
52
57
mA
V
SQ
Transmit Squelch Voltage Level
300
250
200
mV
(Tx+, Tx)
V
DO
Differential Output Voltage
550
1200
mV
(Rx
, COL
)
V
CM
Common Mode
4.0
V
Output Voltage (Rx
, COL
)
V
DOO
Differential Output
Voltage Imbalance (Rx
, COL
)
40
mV
V
LBTH
LBDIS Threshold
Loopback disabled
V
CC
0.1
V
Loopback enabled
1.0
V
V
TXCM
Common Mode Voltage (Tx+, Tx)
3.5
V
V
INCM
Common Mode Voltage
1.65
V
(V
IN
+, V
IN
)
A
V
Amplifier Gain
100
V/V
V
ISR
Input Signal Range
2
1600
mV
PP
V
N
Input Referred Noise
50MHz BW
25
V
R
IN
Input Resistance
V
IN
+ = V
IN
0.8
1.3
2.0
k
V
TH
Input Threshold Voltage
5
6
7
mV
H
Hysteresis
20
%
5
ML4665
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
MIN
TYP
MAX
UNITS
Transmit
F
TXIDF
Transmit Idle Frequency
0.85
1.25
MHz
t
TXDC
Transmit Idle duty Cycle
45
55
%
t
TXNPW
Transmit Turn-On Pulse Width
20
ns
t
TXODY
Transmit Turn-On Delay
200
ns
t
TXLP
Transmit loopback Start-up Delay
500
ns
t
TXFPW
Transmit Turn-Off Pulse Width
180
ns
t
TXSOI
Transmit Start of Idle
400
2100
ns
t
TXSDY
Transmit Steady State Propagation Delay
15
50
ns
t
TXJ
Transmit Jitter into 31
Load
1.5
ns
Receive
F
RXSFT
Receive Squelch Frequency Threshold
2.51
4.5
MHz
t
RXODY
Receive Turn-On Delay
285
ns
t
RXFX
Last Bit Received to Slow Decay Output
230
300
ns
t
RXSDY
Receive Steady State Propagation Delay
15
50
ns
t
RXJ
Receive Jitter
1.5
ns
t
AR
Differential Output Rise Time 20% to 80% (Rx
, COL
)
4
ns
t
AF
Differential Output Fall Time 20% to 80% (Rx
, COL
)
4
ns
Collision
t
CPSQE
Collision Present to SQE Assert
0
350
ns
t
SQEXR
Time for SQE to Deactivate After Collision
0
700
ns
F
CLF
Collision Frequency
8.5
11.5
MHz
P
CLPDC
Collision Pulse Duty Cycle
40
50
60
%
Jabber and
LMON Timing
t
JAD
Jabber Activation Delay
20
70
150
ms
t
JRT
Jabber Reset Unjab Time
250
450
750
ms
t
JSQE
Delay from Outputs Disabled to Collision Oscillator On
100
ns
t
LLPH
Low Light Present to
LMON High
3
5
10
s
t
LLCL
Low Light Present to
LMON Low
250
750
ms
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: This dose not include the current from the AUI pull-down resistors, or LED status outputs.
Note 3: LED drivercan sink up to 20mA, but V
OL
will be higher.
Note 4: Does not include pre-bias current for fiber optic LED which would typically be 3mA.
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