Micro Linear
Micro Linear
May 1997
ML4821
*
Power Factor Controller
1
GENERAL DESCRIPTION
The ML4821 provides complete control for a "boost" type
power factor correction system using the average current
sensing method. Special care has been taken in the design
of the ML4821 to increase system noise immunity. The
circuit includes a precision reference, gain modulator,
average current error amplifier, output error amplifier,
over-voltage protection comparator, shutdown logic, as
well as a high current output. In addition, start-up is
simplified by an under-voltage lockout circuit.
In a typical application, the ML4821 controls the AC input
current by adjusting the pulse width of the output
MOSFET. This modulates the line current so that its shape
conforms to the shape of the input voltage. The reference
for the current regulator is a product of the sinusoidal line
voltage times the output of the error amplifier which is
regulating the output DC voltage. Average line voltage
compensation is provided in the gain modulator to ensure
constant loop gain over a wide input voltage range. This
compensation includes a special "brown-out" control
* Some Packages Are Obsolete
which reduces output power below 90V RMS input.
FEATURES
s
Average current sensing for lowest possible
harmonic distortion
s
Average line compensation with brown-out control
s
Precision buffered 5V reference
s
1A peak current totem-pole output drive
s
Overvoltage comparator eliminates output "runaway"
due to load removal
s
Wide common mode range in current sense
comparators for better noise immunity
s
Large oscillator amplitude for better noise immunity
s
Output driver internally limited to 17V
s
"Sleep mode" shutdown input
BLOCK DIAGRAM
11
1
2
3
4
5
8
6
7
9
16
18
15
14
13
12
10
17
+
+
+
+
+
+
V
REF
SOFT START
V
REF
EA
EA OUT
V
RMS
I
SINE
OUT
GAIN
MODULATOR
IA
IA+
IA OUT
I
LIM
OVP
V
REF
0.7V
R
S
Q
UNDER
VOLTAGE
LOCKOUT
OSC
V
REF
V
LIMIT
17V
GND
V
CC
OUT
PGND
R
T
SYNC
C
T
SLEEP
2
ML4821
Micro Linear
PIN CONNECTION
ML4821
20-Pin SOIC (S20)
ML4821
18-Pin DIP (P18)
PIN
NAME
FUNCTION
1 (1)
I
LIM
Peak cycle-by-cycle current limit input
2 (2)
IA OUT Output and compensation node of the
average current error amplifier
3 (3)
IA
Inverting input of the average current
error amplifier
4 (4)
IA+
Non-Inverting input of the average
current error amplifier and output of
the gain modulator
5 (5)
I
SINE
Gain modulator input
6 (6)
EA OUT Output of output voltage error
amplifier
7 (7)
INV
Inverting input to error amplifier
8 (8)
V
RMS
Input for average line voltage
compensation
9 (9)
SOFT
Normally connected to soft start
START
capacitor
PIN
NAME
FUNCTION
10 (12) SYNC
Oscillator synchronization input
11 (13) OVP
Inhibits output pulses when the
voltage at this pin exceeds 5V. Also,
when the voltage at this pin is less
than 0.7V, the IC goes into low current
shut-down mode.
12 (14) R
T
Timing resistor for the oscillator
13 (15) PWR
Return for the high current totem
GND
pole output
14 (16) OUT
High current totem pole output
15 (17) V
CC
Positive supply for the IC
16 (18) V
REF
Buffered output for the 5V voltage
reference
17 (19) C
T
Timing capacitor for the oscillator.
18 (20) GND
Analog signal ground
I
LIM
IA OUT
IA
IA+
I
SINE
EA OUT
EA
V
RMS
SOFT START
GND
C
T
V
REF
V
CC
OUT
PGND
R
T
OVP
SYNC
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
TOP VIEW
I
LIM
IA OUT
IA
IA+
I
SINE
EA OUT
EA
V
RMS
SOFT START
N/C
GND
C
T
V
REF
V
CC
OUT
PGND
R
T
OVP
SYNC
N/C
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
TOP VIEW
PIN DESCRIPTION
(Pin numbers in parentheses are for 20-pin packages)
3
ML4821
Micro Linear
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Supply Current (I
CC
) ................................................ 35mA
OUT Current, Source or Sink .................................... 1.0A
Output Energy (capacitive load per cycle) .................... 5
J
I
SINE
Input Current .................................................. 1.2mA
EA OUT Source Current .......................................... 50mA
Oscillator Charge Current ......................................... 2mA
Input Voltage ...................................... GND 0.3V to 5.5V
Junction Temperature .............................................. 150
C
Storage Temperature Range ...................... 65
C to 150
C
Lead Temperature (Soldering 10 sec.) ...................... 260
C
Thermal Resistance (
JA
)
Plastic DIP ........................................................ 75
C/W
Plastic SOIC ..................................................... 95
C/W
OPERATING CONDITIONS
Temperature Range
ML4821CX ................................................. 0
C to 70
C
ML4821IX .............................................. 40
C to 85
C
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, R
T
= 6.2k
, C
T
= 720pF, T
A
= Operating Temperature Range, V
CC
= 15V (Notes 1 & 2).
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNITS
OSCILLATOR
Initial accuracy
T
A
= 25
C
90
100
110
kHz
Voltage stability
12V < V
CC
< 18V
1
%
Temperature stability
2
%
Total Variation
Line, Temperature
85
115
kHz
Ramp Valley to Peak
4.7
5.2
5.6
V
R
T
Voltage
4.8
5.0
5.2
V
Discharge Current
C
T
= 2V, R
T
= Open
7.8
8.4
9.3
mA
SYNC Input Threshold
1.5
2.0
3.0
V
REFERENCE
Output Voltage
T
A
= 25
C, I
O
= 1mA
4.95
5.00
5.05
V
Line regulation
12V < V
CC
< 24V
2
10
mV
Load regulation
1mA < I
O
< 20mA
2
15
mV
Temperature stability
.4
%
Total Variation
line, load, temp
4.9
5.1
V
Output Noise Voltage
10Hz to 10kHz
50
V
Long Term Stability
T
A
= 125
C, 1000 hrs
5
25
mV
Short Circuit Current
V
REF
= 0V
30
85
180
mA
VOLTAGE ERROR AMPLIFIER
Input Offset Voltage
0
15
mV
Input Bias Current
50
800
nA
Open Loop Gain
2 < EA OUT < 6V
60
75
dB
PSRR
12V < V
CC
< 24V
70
100
dB
Output Sink Current
EA OUT = 4V, INV = 5.5V
300
500
A
Output Source Current
EA OUT
= 4.0V, INV
= 4.8V
10
30
mA
4
ML4821
Micro Linear
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOLTAGE ERROR AMPLIFIER (Continued)
Output High Voltage
I
PIN6
= 5mA, V
PIN7
= 4.8V
7.0
7.5
V
Output Low Voltage
I
PIN6
= 0, EA = 5.5V
0
0.5
V
Unity Gain Bandwidth
1.0
MHz
Soft Start Charge Current
V
PIN9
= 4V
22
38
50
A
CURRENT ERROR AMPLIFIER
Input Offset Voltage
5
0
5
mV
Input Bias Current
0.15
1
A
Input Offset Current
400
nA
Open Loop Gain
2 < EA OUT < 7V
80
100
dB
PSRR
12V < V
CC
< 24V
65
85
dB
Output Voltage Low
I
OL
= 300
A
0
0.5
V
Output Voltage High
I
OH
= 10mA
7.0
7.5
V
Input Common Mode Range
0.3
2.5
V
GAIN MODULATOR
Gain
V
INV
= 4.8V, V
RMS
= 0V
0.75
1.2
1.3
V
INV
= 4.8V, V
RMS
= 1.75V
3.1
3.88
4.5
V
INV
= 4.8V, V
RMS
= 2.6V
1.25
1.75
2.15
V
INV
= 4.8V, V
RMS
= 5.2V
0.22
0.38
0.50
Output Current
V
INV
= 5.2V, V
RMS
= 5.2V
2
4
A
Output Current Limit
V
INV
= 4.8V, I
SINE
= 500
A,
V
RMS
= 1.75V
360
395
420
A
I
LIM
COMPARATOR
Input Offset Voltage
+15
mV
Input Bias Current
100
200
A
OVP COMPARATOR
Input Offset Voltage
Output Off
25
5
mV
Hysteresis
Output On
85
105
130
mV
Input Bias Current
0.3
3
A
Propagation Delay
150
ns
Shutdown Threshold
0.4
0.7
1.0
V
PWM COMPARATOR
Input Common Mode Range
0
8
V
Propagation Delay
150
ns
5
ML4821
Micro Linear
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNITS
OUTPUT
Output Voltage Low
I
OUT
= 20mA
0.1
0.4
V
I
OUT
= 200mA
1.6
2.4
V
Output Voltage High
I
OUT
= 20mA
13
13.5
V
I
OUT
= 200mA
12
13.4
V
Output Voltage Low in UVLO
I
OUT
= 5mA, V
CC
= 8V
0.1
0.8
V
Output Rise/Fall Time
C
L
= 1000pF
50
ns
UNDERVOLTAGE LOCKOUT
Start-up Threshold
14.5
16.5
V
Shut-Down Threshold
8.5
11.0
V
V
REF
Good Threshold
4.4
V
SUPPLY
Supply Current
Start-up, V
CC
= 14V, T
A
= 25
C
0.6
1.2
mA
Operating, T
A
= 25
C
26
32
mA
Internal Shunt Zener Voltage
I
CC
= 35mA
25
27
35
V
Note 1:
Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions.
Note 2:
V
CC
is raised above the start-up threshold first to activate the IC, then returned to 15V
Note 3:
Gain Modulator gain is defined as:
I
I
OUTIA
INEA OUT
+
6
ML4821
Micro Linear
FUNCTIONAL DESCRIPTION
OSCILLATOR
The ML4821 oscillator charges the external capacitor
connected to C
T
with a current equal to 2.5/R
T
. When the
capacitor voltage reaches the upper threshold, the
comparator changes state and the capacitor discharges to
the lower threshold through Q1.
The oscillator period can be described by the following
relationship:
T
OSC
= T
RAMP
+ T
DISCHARGE
where:
T
RAMP
= C(Ramp Valley to Peak)
(I
RT
/2)
and:
T
DISCHARGE
= C(Ramp Valley to Pk)
(8.4mA I
RT
/2)
The ML4821 oscillator includes a SYNC input for
synchronizing to an external frequency source. A positive
pulse on this pin of 2V (typ) resets the oscillators
comparator and initiates a discharge cycle for C
T
. The R
T
and C
T
component values which set the ML4821
oscillator frequency should be selected to produce a
lower frequency than the external frequency source.
Figure 1. Oscillator Block Diagram.
R
T
+
R
T
C
T
C
T
V
REF
8.4mA
Q1
Q2
1k
2k
SYNC
I
RT
2
I
RT
1000
100
10
0
10
20
1nF
30
40
50
R
T
(k
)
FREQUENCY
(kHz)
680pF
470pF
330pF
150pF
Figure 2. Oscillator Timing Resistance vs. Frequency.
CLOCK
t
D
C
T
RAMP PEAK
RAMP VALLEY
VOLTAGE AND CURRENT ERROR AMPLIFIERS
The ML4821 voltage error amplifier is a high open loop
gain, wide bandwidth amplifier with a class A output. The
soft start circuit controls the input to this amplifier for
closed loop soft start operation.
The current error amplifier (IA) is similar to the voltage
error amplifier but is designed for very low offsets to allow
the selection of a low value resistor for R
SENSE
.
OUTPUT DRIVER STAGE
The ML4821 Output Driver is a 1A peak output high
speed totem pole circuit designed to quickly drive
capacitive loads, such as power MOSFET gates. The driver
circuit's output voltage is internally limited to 17V.
GAIN MODULATOR
The ML4821 gain modulator responds linearly to current
injected into the I
SINE
pin, and in an inverse-square
fashion to voltage on the V
RMS
pin. At very low voltages
on the V
RMS
pin, the gain modulator enforces a power
limit, or "brown-out protection", upon the overall PFC
circuit (Figures 6 and 7). The rectified line input sine wave
is converted to a current for the I
SINE
input via a dropping
resistor. In this way, most ground noise produces an
insignificant effect on the reference to the PWM
comparator. This gives the ML4821 a high degree of
immunity to the disturbances common in high-power
switching circuits.
7
ML4821
Micro Linear
6
7
9
+
S.S
INV
+8V
V
REF
+8V
6.2k
EA OUT
The output of the gain modulator is a current which
appears on IA+ to form the reference for the current error
amplifier and is given as:
I
K I
V
GM
SINE
EA
=
-
(
. )
0 8
where:
I
SINE
is the current in the dropping resistor, V
EA
is the output of the error amplifier and K is a
constant determined by the V
RMS
input.
The output current of the gain modulator is limited to:
I
R
GM MAX
T
(
)
.
=
2 5
This sets the system current limit.The multiplier output
current is converted into the reference voltage for the
current (IA) amplifier through a resistor to ground on IA+.
Figure 6 shows the gain adjustor (K) with respect to the
voltage at V
RMS
. The curve has been separated in two
parts. The right hand part is for operation under normal
conditions in the voltage range from minimum line
voltage to maximum line voltage (90VAC to 260VAC).
85VAC on the curve has been chosen to account for
tolerances. Under normal operating conditions as input
voltage decreases the gain increases compensating for the
drop in the loop gain.
Under brownout conditions (below 85VAC) the gain
decreases to limit the amount of current that is drawn
from the line thus preventing an overload condition. This
is a very useful feature since in many cases the load for a
PFC is a constant power load. The input current has to go
high to compensate for a drop in the input voltage.
Figure 5. Output Saturation Voltage vs. Output Current.
Figure 6. K-factor. Gain Modulator gain with
respect to the voltage at V
RMS
.
0.5
0.4
0.3
0.2
0.1
0
1
3
5
7
4
6
0
85VAC
0.23
DESIGN
FOR
NORMAL
OPERATIONS
THIS IS THE MINIMUM
OPERATING
VOLTAGE POINT
THIS GAIN CURVE TAKES
OUT THE 1/(V
IN
)
2
DEPENDENCY OF THE
VOLTAGE CONTROL LOOP
120VAC
OPERATING BOUNDRY
220VAC
K
2
V
RMS
DESIGN
FOR
BROWNOUT
Figure 3. Error and Current Amplifier Configuration
Figure 4. Error Amplifier Open-loop Gain and Phase vs.
Frequency.
V
CC
= 15V
V
O
= 1.0V TO 5.0V
R
L
= 100k
T
A
= 25C
GAIN
PHASE
100
80
60
40
20
0
20
10
100
1.0k
10k
100k
1.0M
10M
0
30
60
90
120
150
180
f, FREQUENCY (Hz)
A
VOL
, OPEN-LOOP VOLTAGE GAIN (dB)
PHASE (DEGREES)
SOURCE SATURATION
(LOAD TO GROUND)
V
CC
T
A
= 25C
T
A
= 55C
T
A
= 55C
T
A
= 25C
V
CC
= 15V
80
s PULSED LOAD
120 Hz RATE
SINK SATURATION
(LOAD TO V
CC
)
GND
0
1.0
2.0
3.0
2.0
1.0
0
0
200
400
600
800
I
O
, OUTPUT LOAD CURRENT (mA)
V
SAT
, OUTPUT SATURATION VOLTAGE (V)
8
ML4821
Micro Linear
ENABLE
V
REF
+
+
15
16
INTERNAL
BIAS
4.4V
LOGIC
POWER
V
REF
9V
V
CC
500
0
0
100
300
400
500
SINE INPUT CURRENT (A)
MUL
TIPLIER OUTPUT CURRENT (A)
200
100
200
300
400
1.0
1.5
2.5
3.5
4.5
5.5
E/A
OUTPUT
VOL
T
AGE
R
T
= 5k
V
RMS
= 3V
Figure 8. Under-Voltage Lockout Block Diagram.
Figure 7. Gain Modulator Linearity.
V
CC
= 15V
T
A
= 55C
T
A
= 25C
T
A
= 125C
0
4.0
8.0
12
16
20
24
0
20
40
60
80
100
120
I
REF
, REFERENCE SOURCE CURRENT (mA)
V
REF
, REFERENCE VOLTAGE CHANGE (mV)
40
10
0
0
10
20
30
V
CC
SUPPLY VOLTAGE (V)
I
CC
SUPPL
Y
CURRENT (mA)
T
A
= 25C
20
30
Figure 9. Total Supply Current vs. Supply Voltage.
Figure 10. Reference Load Regulation.
UNDER VOLTAGE LOCKOUT,
OVP AND CURRENT LIMIT
On power-up the ML4821 remains in the UVLO
condition; output low and quiescent current low. The IC
becomes operational when V
CC
reaches 16V. When V
CC
drops below 9V, the UVLO condition is imposed. During
the UVLO condition, the V
REF
pin is "off", making it
usable as a "flag" for starting up a down-stream PWM
converter.
OVP, SHUTDOWN, AND IC BIAS
When the input to the OVP comparator exceeds V
REF
, the
output of the ML4821 is inhibited. The OVP input also
functions as a "sleep" input, putting the IC into the low
quiescent UVLO state when the OVP pin is pulled below
0.7V.
9
ML4821
Micro Linear
Figure 11. Bias and Start-up Circuit.
1000
F
R10
39k
2W
N
P
L1
TO IC
PIN 15
TO B+
N
S
N
P
N
S
V
OUT
14V
1
F
1
F
OFF-LINE START-UP AND BIAS SUPPLY GENERATION
The circuit in Figure 11 supplies V
CC
power to the
ML4821. Start-up current is delivered via R10. The IC
starts when V
CC
reaches 15.5V. After that time running
power is delivered through the tap on L1. The
configuration shown delivers a voltage proportional to the
PFC output bus voltage.
10
ML4821
Micro Linear
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
ML4821
ILIM
IA OUT
IA
IA+
ISINE
EA OUT
EA
VRMS
SOFT START
GND
CT
VREF
VCC
OUT
PGND
RT
OVP
SYNC
C7
0.47
F
R14
91k
C6
43nF
R15
27k
R9
91k
C3
0.1
F
C5
1.5nF
R13
20k
C2
120pF
R12
2.7k
R5
2k
R6
2.7k
R1
0.25
D5
1N5406
D6
1N5406
R8
910k
R11
8.2k
D2
D1
D4
D3
AC IN
90-264
VAC
F1
5A, 250V
C1
1
F
R7
560k
L1
R10
39k
C4
1.5nF
D1
1N5406
D7
1N4934
D8
1N4934
C14
470
F
C12
1
F
C13
1
F
R19
10.2k
R21
6.2k
C10
0.1
F
C11
750pF
C8
R18
825k
R17
10.5k
R22
7.3
D10
MUR850
R20
825k
C14
470
F
C19
270
F
450V
DC OUT
382V
+
Figure 12. 200W Output PFC Circuit
11
ML4821
Micro Linear
PHYSICAL DIMENSIONS
inches (millimeters)
SEATING PLANE
0.240 - 0.260
(6.09 - 6.61)
PIN 1 ID
0.295 - 0.325
(7.49 - 8.26)
0.890 - 0.910
(22.60 - 23.12)
0.016 - 0.022
(0.40 - 0.56)
0.100 BSC
(2.54 BSC)
0.008 - 0.012
(0.20 - 0.31)
0.015 MIN
(0.38 MIN)
18
0 - 15
1
0.050 - 0.065
(1.27 - 1.65)
0.170 MAX
(4.32 MAX)
0.125 MIN
(3.18 MIN)
0.045 MIN
(1.14 MIN)
(4 PLACES)
Package: P18
18-Pin PDIP
SEATING PLANE
0.291 - 0.301
(7.39 - 7.65)
PIN 1 ID
0.398 - 0.412
(10.11 - 10.47)
0.498 - 0.512
(12.65 - 13.00)
0.012 - 0.020
(0.30 - 0.51)
0.050 BSC
(1.27 BSC)
0.022 - 0.042
(0.56 - 1.07)
0.095 - 0.107
(2.41 - 2.72)
0.005 - 0.013
(0.13 - 0.33)
0.090 - 0.094
(2.28 - 2.39)
20
0.007 - 0.015
(0.18 - 0.38)
0 - 8
1
0.024 - 0.034
(0.61 - 0.86)
(4 PLACES)
Package: S20
20-Pin SOIC
12
ML4821
Micro Linear
ORDERING INFORMATION
PART NUMBER
TEMPERATURE RANGE
PACKAGE
ML4821CP
0
C to 70
C
18-Pin PDIP (P18)
ML4821CS
0
C to 70
C
20-Pin SOIC (S20)
ML4821IP
40
C to 85
C
18-Pin PDIP (P18)
(Obsolete)
ML4821IS
40
C to 85
C
20-Pin SOIC (S20)
(Obsolete)
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design.
Micro Linear does not assume any liability arising out of the application or use of any product described herein,
neither does it convey any license under its patent right nor the rights of others. The circuits contained in this
data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to
whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility
or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel
before deciding on a particular application.
DS4821-01
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
Micro Linear 1997
Micro Linear
is a registered trademark of Micro Linear Corporation
Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940;
5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946; 2619299. Other patents are pending.
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