July 2000
PRELIMINARY
ML4832
*
Electronic Dimming Ballast Controller
GENERAL DESCRIPTION
The ML4832 is a complete solution for a dimmable/non-
dimmable, high power factor, high efficiency electronic
ballast. The BiCMOS ML4832 contains controllers for
"boost" type power factor correction as well as for a
dimming ballast.
The power factor circuit uses the average current sensing
method with a gain modulator and overvoltage protection.
This system produces a power factor of better than 0.99
with low input current THD at > 95% efficiency. Special
care has been taken in the design of the ML4832 to
increase system noise immunity by using a high amplitude
oscillator, and a current-fed multiplier. An overvoltage
protection comparator inhibits the PFC section in the
event of a lamp out or lamp failure condition.
The ballast section provides for programmable starting
scenarios with programmable preheat and lamp out-of-
socket interrupt times. The IC controls lamp output through
frequency modulation using lamp current feedback.
FEATURES
s
Complete power factor correction and dimming
ballast control in one IC
s
Low distortion, high efficiency continuous boost,
average current sensing PFC section
s
Programmable start scenario for rapid or instant
start lamps
s
Lamp current feedback for dimming control
s
Variable frequency dimming and starting
s
Programmable restart for lamp out condition to
reduce ballast heating
s
Over-temperature shutdown replaces external
heat sensor for safety
s
PFC overvoltage comparator eliminates output
"runaway" due to load removal
s
Large oscillator amplitude and gain modulator
improves noise immunity
s
Low start-up current <0.5mA
1
BLOCK DIAGRAM
7
R
SET
VARIABLE FREQUENCY
OSCILLATOR
8
R
T
/C
T
10
R
X
/C
X
PRE-HEAT
AND INTERRUPT
TIMERS
CONTROL
&
GATING LOGIC
2
IA OUT
4
IA+
POWER
FACTOR
CONTROLLER
UNDER-VOLTAGE
AND THERMAL
SHUTDOWN
OUTPUT
DRIVERS
3
I
SINE
1
EA OUT
18
EA/OVP
V
REF
17
PFC OUT
15
GND
11
V
CC
16
PGND
12
OUT B
13
OUT A
14
LFB OUT
6
LAMP FB
5
INTERRUPT
9
(* Indicates part is End Of Life as of July 1, 2000)
ML4832
2
PIN CONFIGURATION
PIN# NAME
FUNCTION
PIN#
NAME
FUNCTION
1
EA OUT
PFC error amplifier output and
compensation node
2
IA OUT
Output and compensation node of the
PFC average current transconductance
amplifier
3
I
SINE
PFC gain modulator input
4
IA+
Non-inverting input of the PFC average
current transconductance amplifier
and peak current sense point of the
PFC cycle by cycle current limit
comparator
5
LAMP FB
Inverting input of an error amplifier
used to sense (and regulate) lamp arc
current. Also the input node for
dimming control.
6
LFB OUT
Output from the lamp current error
transconductance amplifier used for
lamp current loop compensation
7
R
SET
External resistor which sets oscillator
F
MAX
, and R
X
/C
X
charging current
8
R
T
/C
T
Oscillator timing components
PIN DESCRIPTION
9
INTERRUPT
Input used for lamp-out detection
and restart. A voltage greater than
7.5 volts resets the chip and
causes a restart after a
programmable interval.
10
R
X
/C
X
Sets the timing for the preheat,
dimming lockout, and interrupt
11
GND
Ground
12
P GND
Power ground for the IC
13
OUT B
Ballast MOSFET drive output
14
OUT A
Ballast MOSFET drive output
15
PFC OUT
Power Factor MOSFET drive
output
16
V
CC
Positive supply for the IC
17
V
REF
Buffered output for the 7.5V
voltage reference
18
EA/OVP
Inverting input to PFC error
amplifier and OVP comparator
input
EA OUT
IA OUT
I
SINE
IA+
LAMP FB
LFB OUT
R
SET
R
T
/C
T
INTERRUPT
EA/OVP
V
REF
V
CC
PFC OUT
OUT A
OUT B
P GND
GND
R
X
/C
X
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
TOP VIEW
ML4832
18-Pin DIP (P18)
EA/OVP
V
REF
V
CC
PFC OUT
OUT A
OUT B
P GND
GND
R
X
/C
X
EA OUT
IA OUT
I
SINE
IA+
LAMP FB
LFB OUT
R
SET
R
T
/C
T
INTERRUPT
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
TOP VIEW
ML4832
18-Pin SOIC (S18)
ML4832
3
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, R
SET
= 22.1k
W, R
T
= 15.8kW, C
T
= 1.5nF, C(V
CC
) = 1F, I
SINE
= 200A, V
CC
= 12.5V,
T
A
= Operating Temperature Range (Note 1)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PFC CURRENT SENSE AMPLIFIER
Small Signal Transconductance
40
90
120
W
Output Low
I
SINE
= 0mA, V
EA OUT
= 0V,
V
IA+
= 0.3V, R
L
=
0.2
0.4
V
Output High
I
SINE
= 1.5mA,
6.3
6.8
V
V
EA/OVP
= V
IA+
= 0V, R
L
=
Source Current
I
SINE
= 1.5mA,
0.05
0.15
0.25
mA
V
EA/OVP
= V
IA+
= 0V,
V
IA OUT
= 6V, T
J
= 25C
Sink Current
I
SINE
= 0mA, V
IA OUT
= 0.3V,
V
IA+
= 0.6V
V
EA OUT
= 0V, V
EA/OVP
= 5V,
T
J
= 25C
0.03
0.07
0.16
mA
PFC VOLTAGE FEEDBACK AMPLIFIER/LAMP CURRENT AMPLIFIER
Input Bias Current
0.3
1.0
A
Small Signal Transconductance
30
55
90
W
Input Voltage Range
0.3
5.0
V
Output Low
V
LAMP FB
= V
EA/OVP
= 3V, R
L
=
0.2
0.4
V
Output High
V
LAMP FB
= V
EA/OVP
= 2V, R
L
=
7.1
7.5
7.8
V
Source Current
V
LAMP FB
= V
EA/OVP
= 0V,
0.06
0.15
0.30
mA
V
EA OUT
= V
LFB OUT
= 7V,
T
J
= 25C
Sink Current
V
LAMP FB
= V
EA/OVP
= 5V,
0.06
0.12
0.28
mA
V
EA OUT
= V
LFB OUT
= 0.3V,
T
J
= 25C
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Supply Current (I
CC
) ............................................... 60mA
Output Current, Source or Sink (OUT A, OUT B, PFC
OUT)
DC ................................................................... 250mA
Output Energy (capacitive load per cycle) ............... 1.5mJ
Gain Modulator I
SINE
Input ..................................... 10mA
Analog Inputs ....................................... 0.3V to V
CC
2V
IA+ Input Voltage .............................................. 3V to 2V
Maximum Forced Voltage
(EA OUT, LFB OUT) ................................ 0.3V to 7.7V
Maximum Forced Current
(EA OUT, IA OUT, LFB OUT) ............................ 20mA
Maximum Forced Voltage
(IA OUT) ................................................. 0.3V to 7.5V
Junction Temperature ............................................. 150C
Storage Temperature Range...................... 65C to 150C
Lead Temperature (Soldering 10 sec.) ..................... 260C
Thermal Resistance (
q
JA
)
Plastic PDIP ..................................................... 70C/W
Plastic SOIC ................................................... 100C/W
OPERATING CONDITIONS
Temperature Range
ML4832C .................................................. 0C to 85C
ML4832
4
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
GAIN MODULATOR
Output Voltage (V
MUL
)
I
SINE
= 100A, V
EA OUT
= 3V
85
mV
I
SINE
= 300A, V
EA OUT
= 3V
260
mV
I
SINE
=100A, V
EA OUT
= 6V
200
mV
I
SINE
= 300A, V
EA OUT
= 6V
600
mV
Output Voltage Limit
I
SINE
= 1.5mA, V
EA/OVP
= 0V
0.9
1
1.1
V
Offset Voltage
I
SINE
= 0A, V
EA/OVP
= 0V
15
mV
I
SINE
= 150A, V
EA/OVP
= 3V
15
mV
I
SINE
Input Voltage
I
SINE
= 200A
0.8
1.4
1.8
V
PFC CURRENT -- LIMIT COMPARATOR
Current-Limit Threshold
0.85
1.0
1.15
V
Propagation Delay
100mV step and 100mV overdrive
100
ns
OSCILLATOR
Initial Accuracy
T
A
= 25C
72
76
80
kHz
Voltage Stability
V
CCZ
4.0V < V
CC
< V
CCZ
0.5V
1
%
Temperature Stability
2
%
Total Variation
Line, temperature
69
83
kHz
Ramp Valley to Peak
2.5
V
C
T
Charging Current
V
LAMP FB
= 3V, V
RT/CT
= 2.5V,
V
RX/CX
= 0.9V (Preheat)
90
113
130
A
V
LAMP FB
= 3V, V
RT/CT
= 2.5V,
RX/CX = Open
180
230
260
A
C
T
Discharge Current
V
RT/CT
= 2.5V
4.0
5.5
7.0
mA
Output Drive Deadtime
0.64
0.91
1.30
s
REFERENCE SECTION
Output Voltage
T
A
= 25C, I
O
= 1mA
7.4
7.5
7.6
V
Line regulation
V
CCZ
4.0V < V
CC
< V
CCZ
0.5V
8
25
mV
Load regulation
1mA < I
O
< 5mA
2
15
mV
Temperature stability
0.4
%
Total Variation
Line, load, temp
7.35
7.65
V
Output Noise Voltage
10Hz to 10kHz
50
V
Long Term Stability
T
J
= 125C, 1000 hrs
5
mV
PREHEAT AND INTERRUPT TIMER (R
X
= 680K
W, C
X
= 4.7F)
Initial Preheat Period
0.8
s
Subsequent Preheat Period
0.7
s
Start Period
1.2
s
Interrupt Period
5.7
s
Pin 10 Charging Current
24
28
33
A
ML4832
5
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
PREHEAT AND INTERRUPT TIMER (R
X
= 680K
W, C
X
= 4.7F)
CONTINUIED
Pin 10 Open Circuit Voltage
V
CC
< Start-up threshold
0.4
0.7
1.0
V
Pin 10 Maximum Voltage
7.0
7.3
7.7
V
Input Bias Current
V
RX/CX
= 1.2V
0.1
A
Preheat Lower Threshold
1.05
1.22
1.36
V
Preheat Upper Threshold
4.4
4.77
5.15
V
Interrupt Recovery Threshold
1.05
1.22
1.36
V
Start Period End Threshold
6.05
6.6
7.35
V
INTERRUPT INPUT
Interrupt Threshold
7.15
7.4
7.65
V
Input Bias Current
0.1
A
R
SET
Voltage
2.4
2.5
2.6
V
OVP COMPARATOR
OVP Threshold
2.65
2.75
2.85
V
Hysteresis
0.20
0.25
0.27
V
Propagation Delay
1.4
s
OUTPUTS
Output Voltage Low
I
OUT
= 20mA
0.1
0.2
V
I
OUT
= 200mA
1.0
2.0
V
Output Voltage High
I
OUT
= 20mA
V
CC
0.2
V
CC
0.1
V
I
OUT
= 200mA
V
CC
2.0
V
CC
1.0
V
Output Voltage Low in UVLO
I
OUT
= 10mA, V
CC
8V
0.2
V
Output Rise/Fall Time
C
L
= 1000pF
20
ns
UNDER-VOLTAGE LOCKOUT AND BIAS CIRCUITS
IC Shunt Voltage (V
CCZ
)
I
CC
= 15mA
14.2
15.0
15.8
V
Start-up Current
V
CC
= Start-up threshold 0.2V
0.34
0.48
mA
Operating Current
V
CC
= 12.5V, V
IA+
= 0V,
5.5
8.0
mA
V
EA/OVP
= V
LAMP FB
= 2.3V,
IA OUT = open
R
T
= 16.2k
W, R
SET
= 22.1k
W
V
CC
= 12.5V, C
L
= 0
Start-up Threshold
V
CC
1.2 V
CCZ
1.0 V
CC
0.8
V
Shutdown Threshold
V
CC
5.5 V
CCZ
5.0 V
CC
4.5
V
Shutdown Temperature (T
J
)
120
C
Hysteresis (T
J
)
30
C
Note 1:
Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions.
ML4832
6
FUNCTIONAL DESCRIPTION
OVERVIEW
The ML4832 consists of an average current controlled
continuous boost power factor front end section with a
flexible ballast control section. Start-up and lamp-out retry
timing are controlled by the selection of external timing
components, allowing for control of a wide variety of
different lamp types. The ballast section controls the lamp
power using frequency modulation (FM) with additional
programmability provided to adjust the VCO frequency
range. This allows for the IC to be used with a variety of
different output networks.
POWER FACTOR SECTION
The ML4832 power factor section is an average current
sensing boost mode PFC control circuit which is
architecturally similar to that found in the ML4821. For
detailed information on this control architecture, please
refer to Application Note 16 and the ML4821 data sheet.
Figure 1. ML4832 Block Diagram
GAIN MODULATOR
The ML4832 gain modulator provides high immunity to
the disturbances caused by high power switching. The
rectified line input sine wave is converted to a current via
a series resistor. In this way, small amounts of ground noise
produce an insignificant effect on the reference to the
PWM comparator.
The output of the gain modulator appears on the positive
terminal of the IA amplifier to form the reference for the
current error amplifier. Please refer to Figure 1.
V
I
mA
MUL
SINE
VEA
V
=
-
0 7
34
.
.
1
6
(1)
where: I
SINE
is the current in the dropping resistor,
VEA is the output of the error amplifier (Pin 1).
The output of the gain modulator is limited to 1.0V.
7
R
SET
R
X
/C
X
V
CC
V
REF
GND
IA OUT
IA +
V
MUL
+
I
SINE
EA OUT
EA /OVP
10
16
17
11
2
4
3
1
18
OUT B
13
+
+
+
+
+
2.5V
2.5V
V
REF
1V
PREHEAT
TIMER
VARIABLE
FREQUENCY
OSC
UNDER-VOLTAGE
AND THERMAL
SHUTDOWN
+
S
R
Q
T
Q
Q
P GND
12
OUT A
14
PFC OUT
15
R
T
/C
T
8
INTERRUPT
9
LFB OUT
6
LAMP FB
5
+
2.75V
7k
PWM (PFC)
OVP
7k
GAIN
MODULATORS
ML4832
7
AVERAGE CURRENT AND OUTPUT VOLTAGE
REGULATION
The PWM regulator in the PFC control section will act to
offset the positive voltage caused by the multiplier output
by producing an offsetting negative voltage on the current
sense resistor at IA+. A cycle-by-cycle current limit is
included to protect the MOSFET from high speed current
transients. When the voltage at IA+ goes negative by more
than 1V, the PWM cycle is terminated.
For more information on compensating the average
current and boost voltage error amplifier loops, see
ML4821 data sheet.
OVERVOLTAGE PROTECTION AND INHIBIT
The OVP pin serves to protect the power circuit from
being subjected to excessive voltages if the load should
change suddenly (lamp removal). A divider from the high
voltage DC bus sets the OVP trip level. When the voltage
on EA/OVP exceeds 2.75V, the PFC transistors are
inhibited. The ballast section will continue to operate.
TRANSCONDUCTANCE AMPLIFIERS
The PFC voltage feedback, PFC current sense, and the
loop current amplifiers are all implemented as operational
transconductance amplifiers. They are designed to have
low small signal forward transconductance such that a
large value of load resistor (R1) and a low value ceramic
capacitor (<1F) can be used for AC coupling (C1) in the
frequency compensation network. The compensation
network shown in Figure 2 will introduce a zero and a
pole at:
f
R C
f
R C
Z
P
=
=
1
2
1
2
1 1
1 2
(2)
Figure 3 shows the output configuration for the operational
transconductance amplifiers.
A DC path to ground or V
CC
at the output of the
transconductance amplifiers will introduce an offset error.
+
18
2.5V
R1
C1
C2
Figure 2. Compensation Network
CURRENT
MIRROR
IN
OUT
CURRENT
MIRROR
IN
OUT
gmV
IN
io = gmV
IN
IQ +
2
gmV
IN
IQ
2
V
IN
Differential
Linear Slope Region
0
i
O
Figure 3. Output Configuration
Figure 4. Transconductance Amplifier Characteristics
FUNCTIONAL DESCRIPTION
(Continued)
ML4832
8
The magnitude of the offset voltage that will appear at
the input is given by V
OS
= io/gm. For an io of 1mA and a
gm of 0.05 mhos the input referred offset will be 20mV.
Capacitor C1 as shown in Figure 2 is used to block the
DC current to minimize the adverse effect of offsets.
Slew rate enhancement is incorporated into all of the
operational transconductance amplifiers in the ML4832.
This improves the recovery of the circuit in response to
power up and transient conditions. The response to large
signals will be somewhat non-linear as the
transconductance amplifiers change from their low to
high transconductance mode. This is illustrated in
Figure 4.
BALLAST OUTPUT SECTION
The IC controls output power to the lamps via frequency
modulation with non-overlapping conduction. This
means that both ballast output drivers will be low during
the discharging time t
DIS
of the oscillator capacitor C
T
.
OSCILLATOR
The VCO frequency ranges are controlled by the output
of the LFB amplifier. As lamp current decreases, LFB
OUT rises in voltage, causing the C
T
charging current to
decrease, thereby causing the oscillator frequency to
decrease. Since the ballast output network attenuates
high frequencies, the power to the lamp will be
increased.
The oscillator frequency is determined by the following
equations:
F
t
t
OSC
CHG
DIS
=
+
1
(3)
and
t
R C In
V
I
R
V
V
I
R
V
CHG
T
T
REF
CH
T
TL
REF
CH
T
TH
=
+
-
+
-
(4)
The oscillator's minimum frequency is set when I
CH
= 0
where:
F
R C
OSC
T
T
1
0 51
.
(5)
This assumes that t
CHG
>> t
DIS
.
When LFB OUT is high, I
CH
= 0 and the minimum
frequency occurs. The charging current varies according to
two control inputs to the oscillator:
1. The output of the preheat timer
2. The voltage at LFB OUT
In preheat condition, charging current is fixed at
I
R
CHG PREHEAT
SET
(
)
.
=
25
(6)
17
+
1.25/3.75
8
C
T
V
REF
I
CHG
V
REF
CONTROL
R
T
/C
T
R
T
5.5mA
CLOCK
C
T
V
TH
= 3.75V
V
TL
= 1.25V
t
DIS
t
CHG
Figure 5. Oscillator Block Diagram and Timing
FUNCTIONAL DESCRIPTION
(Continued)
ML4832
9
In running mode, charging current decreases as the V
PIN6
rises from 0V to V
OH
of the LAMP FB amplifier. The
highest frequency will be attained when I
CHG
is highest,
which is attained when LFB OUT is at 0V:
I
R
CHG
SET
( )
0
5
=
(7)
Highest lamp power, and lowest output frequency are
attained when LFB OUT is at its maximum output voltage
(V
OH
).
In this condition, the minimum operating frequency of the
ballast is set per (5) above.
For the IC to be used effectively in dimming ballasts with
higher Q output networks a larger C
T
value and lower R
T
value can be used, to yield a smaller frequency excursion
over the control range (V
LFB OUT
). The discharge current is
set to 5.5mA. Assuming that I
DIS
>> I
RT
:
t
C
DIS VCO
T
(
)
600
(8)
IC BIAS, UNDER-VOLTAGE LOCKOUT AND THERMAL
SHUTDOWN
The IC includes a shunt regulator which will limit the
voltage at V
CC
to 15V (V
CCZ
). The IC should be fed with
a current limited source, typically derived from the ballast
transformer auxiliary winding. When V
CC
is below
V
CCZ
1.1V, the IC draws less than 0.48mA of quiescent
current and the outputs are off. This allows the IC to start
using a "bleed resistor" from the rectified AC line.
To help reduce ballast cost, the ML4832 includes a
temperature sensor which will inhibit ballast operation if
the IC's junction temperature exceeds 120C. In order to
use this sensor in lieu of an external sensor, care should be
taken when placing the IC to ensure that it is sensing
temperature at the physically appropriate point in the
ballast. The ML4832's die temperature can be estimated
with the following equation:
T
T
P
C W
J
A
D
65
/
(9)
STARTING, RE-START, PREHEAT AND INTERRUPT
The lamp starting scenario implemented in the ML4832
is designed to maximize lamp life and minimize ballast
heating during lamp out conditions.
The circuit in Figure 7 controls the lamp starting scenarios:
Filament preheat and lamp out interrupt. C
X
is charged
with a current of I
RSET
/4 and discharged through R
X
. The
voltage at C
X
is initialized to 0.7V (V
BE
) at power up. The
time for C
X
to rise to 4.8V is the filament preheat time.
During that time, the oscillator charging current (I
CHG
) is
2.5/R
SET
. This will produce a high frequency for filament
preheat, but will not produce sufficient voltage to ignite
the lamp.
After cathode heating, the inverter frequency drops to
F
MIN
causing a high voltage to appear to ignite the lamp.
If the voltage does not drop when the lamp is supposed to
have ignited, the lamp voltage feedback coming into pin 9
rises to above V
REF
, the C
X
charging current is shut off and
the inverter is inhibited until C
X
is discharged by R
X
to the
1.2V threshold. Shutting off the inverter in this manner
prevents the inverter from generating excessive heat when
Figure 6. Typical VCC and ICC Waveforms when
the ML4832 is Started with a Bleed Resistor from
the Rectified AC Line and Bootstrapped from an
Auxiliary Winding.
Figure 7. Lamp Preheat and Interrupt Timers
FUNCTIONAL DESCRIPTION
(Continued)
VCCZ
V
ON
V
OFF
5.5mA
0.34mA
V
CC
I
CC
t
t
10
9
R
X
C
X
6.8
+
1.2/4.8
HEAT
INHIBIT
0.625
R
SET
+
1.2/6.8
+
V
REF
DIMMING
LOCKOUT
R
X
/C
X
INT
Q
R
S
ML4832
10
Figure 8. Lamp Starting and Restart Timing
6.8
4.8
1.2
.65
0
7.5
R
X
/C
X
HEAT
DIMMING
LOCKOUT
INT
INHIBIT
FUNCTIONAL DESCRIPTION
(Continued)
the lamp fails to strike or is out of socket. Typically this
time is set to be fairly long by choosing a large value
of R
X
.
LFB OUT is ignored by the oscillator until C
X
reaches 6.8V
threshold. The lamps are therefore driven to full power and
then dimmed. The C
X
pin is clamped to about 7.5V.
A summary of the operating frequencies in the various
operating modes is shown below.
OPERATING MODE
OPERATING FREQUENCY
[F(MAX) to F(MIN)]
Preheat
2
Dimming
Lock-out
F(MIN)
DIMMING
CONTROL
F(MIN) TO F(MAX)
ML4832
11
TYPICAL APPLICATIONS
Figures 9 and 10 show ballast schematics, both non-
dimming and dimming. These are power-factor corrected
60W ballasts designed to operate two series connected
F32T8 fluorescent lamps. Both Schematics, Figures 9 and
10, are of previously published ML4831 circuits that have
been modified for ML4832 compatibility. The value
changes and component additions made for ML4832
compatibility were for different amplifier compensation,
bootstrap/bias and protection and do not effect the validity
of the circuit description, operational information or
equations.
TO CONVERT FROM AN EXISTING NON-DIMMING
ML4831 TO THE ML4832:
Resistors
Change:
R4
to
51k
W,
1
/
4
W, 5% carbon film
R6, R7 to
866k
W,
1
/
4
W, 1%, metal film
R7
to
75k
W,
1
/
4
W, 5%, carbon film
R18
to
470
W,
1
/
4
W, 5%, carbon film
R13
to
5.76k
W,
1
/
4
W, 1%, metal film
R14
to
499k
W,
1
/
4
W, 5%, carbon film
Add:
R24
75k
W,
1
/
4
W, 5%, carbon film
R22
51
W,
1
/
4
W, 5%, carbon film
R23
100
W,
1
/
4
W, 5%, carbon film
Delete:
R9
Capacitors
Change:
C5
to
10nF, 63V, 10% ceramic
C7
to
180pF, 100V, 5% ceramic
C11
to
1nF, 100V, 10% ceramic
C12
to
100nF, 100V, 10% ceramic
C18
to
100F, 16V, 20% electrolytic
C20
to
100F, 25V, 20% electrolytic
Add:
C23
33nF, 50V, 20% ceramic
Magnetics
Change:
T1
to
TSD-882
TO CONVERT FROM AN EXISTING DIMMING ML4831
TO THE ML4832:
Resistors
Change:
R4
to
51k
W,
1
/
4
W, 5% carbon film
R6, R11 to
866k
W,
1
/
4
W, 1%, metal film
R7
to
75k
W,
1
/
4
W, 5%, carbon film
R18
to
470
W,
1
/
4
W, 5%, carbon film
R13
to
5.76k
W,
1
/
4
W, 1%, metal film
R14
to
499k
W,
1
/
4
W, 5%, carbon film
R26
to
200k
W,
1
/
4
W, 5%, carbon film
Add:
R32
75k
W,
1
/
4
W, 5%, carbon film
R30
51
W,
1
/
4
W, 5%, carbon film
R31
100
W,
1
/
4
W, 5%, carbon film
Delete:
R9
Capacitors
Change:
C5
to
10nF, 63V, 10% ceramic
C7
to
180pF, 100V, 5% ceramic
C25
to
1nF, 100V, 10% ceramic
C12
to
100nF, 100V, 10% ceramic
C24
to
100F, 16V, 20% electrolytic
C20
to
100F, 25V, 20% electrolytic
Add:
C27
33nF, 50V, 20% ceramic
C26
100nF, 100V, 10% ceramic
Diodes
Delete:
D10, D13
Magnetics
Change:
T1
to
TSD-882
ML4832
12
Figure 9. 220V Non-Dimming Ballast
C9
33nF
C8
4700pF
C19
R16
1k
C22
33nF
R7
75k
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
ML4832
D3
1A
D1
1A
D4
1A
D5
1A
D6
1A
D2
1A
HOT
NEUTRAL
F1
L1
C2
2.2nF
C1*
2.2nF
C3
0.15
F
C20
100
F
D9
1A
D13
0.1A
T1
10
7
89
R6
866k
R11
866k
R18 470
R23
100
R17
51
R19
51
R1
1.0
R14
499k
C12
100nF
C5
10nF
R4
51k
R5
15.4k
R15
324k
C11
1nF
C7
180pF
C6
2.2nF
C4
0.1
F
R10
11.5k
R21
5k
C10
47
F
R8
22
R13
5.76k
R12
442k
R20
442k
Q1
2.5A
D7
1A
D8
IN4148
D11
IN4148
D12
1A
C13
10
F
C14
0.22
F
C15
0.22
F
C16
100pF
Q2
IRF820
Q3
IRF820
T2
6
72
3
8
1
C17
1
F
C18
100
F
R22
51
T3
TP4
6
7
4
3
2
1
9
8
R
R
Y
Y
B
B
C21
0.001
F
R3
9.1k
R2
1k
220 VAC
TP2
TP3
TP1
TP5
R24
75k
C23
33nF
*Note: Only One Chassis Ground
ML4832
13
Figure 10. 220V Dimming Ballast
R27
200k
R28
20k
R24
64.9k
R22
11k
R26
200k
R3
220k
C9
15nF
C8
4700pF
C21
1
F
C22
0.33
F
R7
75k
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
ML4832
D3
1A
D1
1A
D4
1A
D5
1A
D6
1A
D2
1A
HOT
NEUTRAL
F1
L1
L2
C2
2.2nF
C1*
2.2nF
C3
0.15nF
C20
100
F
D9
1A
T1
10
7
89
R6
866k
R11
866k
R18
470
R17
51
R19
51
R1
1.0
R31
100
R14
499k
C12
100nF
C5
10nF
R4
51k
R2
4.3k
R5
15.4k
R15
324k
C25
1nF
C7
180pF
C4
3.3
F
C6
2.2nF
R10
11.5k
R16
10k
R25
5k
C10
47
F
R8
22
R13
5.76k
R12
442k
R23
442k
Q1
2.5A
D7
1A
D8
0.1A
D11
0.1A
D15
1A
C13
10
F
C14
0.22
F
C16
100pF
C15
0.22
F
Q2
2.5A
Q3
2.5A
T2
6
72
3
5
11
0
6
8
1
C17
1
F
C24
100
F
R30
51
T4
TP4
6
7
2
1
4
3
9
8
R
R
Y
Y
B
B
R20
10k
R29
1.3k
220 VAC
D16
5.1V
TP2
TP3
TP1
TP5
T5
+
+
IC1
3
8
7
1
2
5
6
R32
75k
C26
100nF
4
C27
33nF
*Note: Only One Chassis Ground
ML4832
14
PHYSICAL DIMENSIONS inches (millimeters)
SEATING PLANE
0.240 - 0.260
(6.09 - 6.61)
PIN 1 ID
0.295 - 0.325
(7.49 - 8.26)
0.890 - 0.910
(22.60 - 23.12)
0.016 - 0.022
(0.40 - 0.56)
0.100 BSC
(2.54 BSC)
0.008 - 0.012
(0.20 - 0.31)
0.015 MIN
(0.38 MIN)
18
0 - 15
1
0.050 - 0.065
(1.27 - 1.65)
0.170 MAX
(4.32 MAX)
0.125 MIN
(3.18 MIN)
0.045 MIN
(1.14 MIN)
(4 PLACES)
Package: P18
18-Pin PDIP
SEATING PLANE
0.291 - 0.301
(7.39 - 7.65)
PIN 1 ID
0.398 - 0.412
(10.11 - 10.47)
0.449 - 0.463
(11.40 - 11.76)
0.012 - 0.020
(0.30 - 0.51)
0.050 BSC
(1.27 BSC)
0.022 - 0.042
(0.56 - 1.07)
0.095 - 0.107
(2.41 - 2.72)
0.005 - 0.013
(0.13 - 0.33)
0.090 - 0.094
(2.28 - 2.39)
18
0.009 - 0.013
(0.22 - 0.33)
0 - 8
1
0.024 - 0.034
(0.61 - 0.86)
(4 PLACES)
Package: S18
18-Pin SOIC
ML4832
15
ORDERING INFORMATION
PART NUMBER
TEMPERATURE RANGE
PACKAGE
ML4832CP (End of Life)
0C to 85C
Molded PDIP (P18)
ML4832CS (Obsolete)
0C to 85C
SOIC (S18)
02/19/99 Printed in U.S.A.
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
Micro Linear 1999.
is a registered trademark of Micro Linear Corporation. All other trademarks are the property of their respective owners.
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483;
5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959;
5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455;
5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714.
Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any
liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of
others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to
whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application
herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application.
DS4832-01
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