October 1996
ML4861
*
Low Voltage Boost Regulator
FEATURING
Extended Commercial Temperature Range
20 C to 70 C
for Portable Handheld Equipment
BLOCK DIAGRAM
GENERAL DESCRIPTION
The ML4861 is a boost regulator designed for DC to DC
conversion in 1 to 3 cell battery powered systems. The
combination of BiCMOS process technology, internal
synchronous rectification, variable frequency operation,
and low supply current make the ML4861 ideal for 1 cell
applications. The ML4861 is capable of start-up with input
voltages as low as 1V and is available in 6V, 5V, and 3.3V
output versions with output voltage accuracy of 3%.
An integrated synchronous rectifier eliminates the need
for an external Schottky diode and provides a lower
forward voltage drop, resulting in higher conversion
efficiency. In addition, low quiescent battery current and
variable frequency operation result in high efficiency
even at light loads. The ML4861 requires only one
inductor and two capacitors to build a very small
regulator circuit capable of achieving conversion
efficiencies in excess of 90%.
The circuit also contains a RESET output which goes low
when the IC can no longer function due to low input
voltage, or when the DETECT input drops below 200mV.
FEATURES
s
Guaranteed full load start-up and operation at 1V input
s
Pulse Frequency Modulation and Internal Synchronous
Rectification for high efficiency
s
Minimum external components
s
Low ON resistance internal switching FETs
s
Micropower operation
s
6V, 5V, and 3.3V output versions
* Some Packages Are Obsolete
1
+
+
5
8
3
1
4
6
L1
DETECT
V
IN
GND
UVLO
RESET
V
L
C
OUT
+
V
OUT
PWR
GND
*R
B
*R
A
*OPTIONAL
TO MICROPROCESSOR
7
C
IN
*
FEEDBACK
2
V
REF
BOOST
CONTROL
2
ML4861
PIN CONNECTION
PIN DESCRIPTION
PIN
NO.
NAME
FUNCTION
1
V
IN
Battery input voltage
2
V
REF
200mV reference output
3
GND
Analog signal ground
4
DETECT
When this pin below V
REF
, causes
the RESET pin to go low
ML4861-6/-5/-3
8-Pin SOIC (S08)
PIN
NO.
NAME
FUNCTION
5
V
OUT
Boost regulator output
6
V
L
Boost inductor connection
7
RESET
Output goes low when regulation
cannot be achieved or when DETECT
goes below 200mV
8
PWR GND Return for the NMOS output transistor
V
IN
V
REF
GND
DETECT
PWR GND
RESET
V
L
V
OUT
1
2
3
4
TOP VIEW
8
7
6
5
3
ML4861
OPERATING CONDITIONS
Temperature Range
ML4861CS-X .............................................. 0C to 70C
ML4861ES-X ........................................... 20C to 70C
ML4861IS-X ............................................ 40C to 85C
V
IN
Operating Range
ML4861CS-X ................................ 1.0V to V
OUT
0.2V
ML4861ES-X, ML4861IS-X ............ 1.1V to V
OUT
0.2V
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Voltage on any pin ....................................................... 7V
Peak Switch Current, I
(PEAK) .....................................................
2A
Average Switch Current, I
(AVG) .......................................
500mA
Junction Temperature ............................................. 150C
Storage Temperature Range ...................... 65C to 150C
Lead Temperature (Soldering 10 sec.) ..................... 260C
Thermal Resistance (
q
JA
) ..................................... 160C/W
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, V
IN
= Operating Voltage Range, T
A
= Operating Temperature Range (Note 1).
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNITS
Supply
V
IN
Current
V
IN
= V
OUT
0.2V
45
55
A
V
OUT
Quiescent Current
8
10
A
V
L
Quiescent Current
1
A
Reference
Output Voltage (V
REF
)
0 < I
PIN2
< 5A,
190
200
210
mV
PFM Regulator
Pulse Width (T
ON
)
V
IN
= 2.4V
C/E Suffix
9
10
11
s
I Suffix
8.5
10
11.5
s
Output Voltage (V
OUT
)
(Note 2)
ML4861-6
5.82
6.0
6.18
V
ML4861-5
4.85
5.0
5.15
V
ML4861-3
3.2
3.3
3.4
V
Load Regulation
See Figure 1
ML4861-6
V
IN
= 1.2V, I
OUT
- 20mA
5.82
6.0
6.18
V
V
IN
= 2.4V, I
OUT
- 95mA
5.82
6.0
6.18
V
ML4861-5
V
IN
= 1.2V, I
OUT
- 25mA
4.85
5.0
5.15
V
V
IN
= 2.4V, I
OUT
- 135mA
4.85
5.0
5.15
V
ML4861-3
V
IN
= 1.2V, I
OUT
- 40mA
3.2
3.3
3.4
V
V
IN
= 2.4V, I
OUT
- 180mA
3.2
3.3
3.4
V
Under-Voltage Lockout Threshold
C/E Suffix
0.85
0.95
V
I Suffix
0.95
1.05
V
RESET Comparator
DETECT Threshold
190
200
210
mV
DETECT Bias Current
100
100
nA
RESET Output High Voltage (V
OH
)
I
OH
= 100A
V
OUT
0.2
V
RESET Output Low Voltage (V
OL
)
I
OL
= 100A
0.2
V
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
Note 2: For CS/ES suffix, T
ON
= 0 at V
OUT
(MAX), 9s - T
ON
- 11s at V
OUT
(MIN). For IS suffix, T
ON
= 0 at V
OUT
(MAX), 8.5s - T
ON
- 11.5s at V
OUT
(MIN).
4
ML4861
Figure 1. Application Test Circuit
Figure 2. PFM Regulator Block Diagram
ML4861
I
OUT
100
F
0.1
F
100
F
V
IN
27
H
(Sumida CD75)
V
OUT
V
IN
V
REF
GND
DETECT
PWR GND
RESET
V
L
V
OUT
+
VIN
10
s
ONE SHOT
START-UP
R
S
Q
VL
L1
Q2
A2
A1
VREF
Q1
5
+
VOUT
+
VOUT
6
C1
R1
R2
5
ML4861
FUNCTIONAL DESCRIPTION
The ML4861 combines Pulse Frequency Modulation
(PFM) and synchronous rectification to create a boost
converter that is both highly efficient and simple to use. A
PFM regulator charges a single inductor for a fixed period
of time and then completely discharges before another
cycle begins, simplifying the design by eliminating the
need for conventional current limiting circuitry.
Synchronous rectification is accomplished by replacing an
external Schottky diode with an on-chip PMOS device,
reducing switching losses and external component count.
REGULATOR OPERATION
A block diagram of the boost converter is shown in Figure
2. The circuit remains idle when V
OUT
is at or above the
desired output voltage, drawing 45A from V
IN
, and 8A
from V
OUT
through the feedback resistors R1 and R2.
When V
OUT
drops below the desired output level, the
output of amplifier A1 goes high, signaling the regulator to
deliver charge to the output. Since the output of amplifier
A2 is normally high, the flip-flop captures the A1 set signal
and creates a pulse at the gate of the NMOS transistor Q1.
The NMOS transistor will charge the inductor L1 for 10s,
resulting in a peak current given by:
I
T
V
L
s V
L
L PEAK
ON
IN
IN
(
)
=
1
1
10
(1)
For reliable operation, L1 should be chosen so that I
L(PEAK)
does not exceed 2A.
When the one-shot times out, the NMOS transistor
releases the V
L
pin, allowing the inductor to fly-back and
momentarily charge the output through the body diode of
PMOS transistor Q2. But, as the voltage across the PMOS
transistor changes polarity, its gate will be driven low by
the current sense amplifier A2, causing Q2 to short out its
body diode. The inductor then discharges into the load
through Q2. The output of A2 also serves to reset the flip-
flop and one-shot in preparation for the next charging
cycle. A2 releases the gate of Q2 when its current falls to
zero. If V
OUT
is still low, the flip-flop will immediately
initiate another pulse. The output capacitor (C1) filters the
inductor current, limiting output voltage ripple. Inductor
current and one-shot waveforms are shown in Figure 3.
Q(ONE SHOT)
Q1 ON
Q1 ON
Q2
ON
Q2
ON
INDUCTOR
CURRENT
Q1 & Q2 OFF
Figure 3. PFM Inductor Current Waveforms and Timing.
RESET COMPARATOR
An additional comparator is provided to detect low V
IN
,
or any other error condition that is important to the user.
The inverting input of the comparator is internally
connected to V
REF
, while the non-inverting input is
provided externally at the DETECT pin. The output of the
comparator is the RESET pin, which swings from V
OUT
to
GND when an error is detected.
DESIGN CONSIDERATIONS
INDUCTOR
Selecting the proper inductor for a specific application
usually involves a trade-off between efficiency and
maximum output current. Choosing too high a value will
keep the regulator from delivering the required output
current under worst case conditions. Choosing too low a
value causes efficiency to suffer. It is necessary to know
the maximum required output current and the input
voltage range to select the proper inductor value. The
maximum inductor value can be estimated using the
following formula:
L
V
T
V
I
MAX
IN MIN
ON MIN
OUT
OUT MAX
=
(
)
(
)
(
)
2
2
(2)
where
h is the efficiency, typically between 0.8 and 0.9.
Note that this is the value of inductance that just barely
delivers the required output current under worst case
conditions. A lower value may be required to cover
inductor tolerance, the effect of lower peak inductor
currents caused by resistive losses, and minimum dead
time between pulses.
Another method of determining the appropriate inductor
value is to make an estimate based on the typical
performance curves given in Figures 4 and 5. Figure 4
shows maximum output current as a function of input
voltage for several inductor values. These are typical
performance curves and leave no margin for inductance
and ON-time variations. To accommodate worst case
conditions, it is necessary to derate these curves by at
least 10% in addition to inductor tolerance.
For example, a two cell to 5V application requires 80mA
of output current while using an inductor with 15%
tolerance. The output current should be derated by 25%
to 100mA to cover the combined inductor and ON-time
tolerances. Assuming that 2V is the end of life voltage of a
two cell input, Figure 4 shows that with a 2V input, the
ML4861-5 delivers 108mA with a 27H inductor.
6
ML4861
100
1.0
3.0
I
OUT
MAX (mA)
2.0
200
300
400
500
0
L = 10H
L = 15H
L = 27H
L = 56H
V
IN
(V)
ML4861-3.3
100
1.0
3.0
4.0
I
OUT
MAX (mA)
2.0
200
300
400
500
0
L = 10H
L = 15H
L = 27H
L = 56H
ML4861-5.0
V
IN
(V)
100
1.0
3.0
4.0
I
OUT
MAX (mA)
2.0
200
300
400
500
0
L = 10H
L = 15H
L = 27H
L = 56H
ML4861-6.0
V
IN
(V)
5.0
6.0
Figure 5 shows efficiency under the conditions used to
create Figure 4. It can be seen that efficiency is mostly
independent of input voltage and is closely related to
inductor value. This illustrates the need to keep the
inductor value as high as possible to attain peak system
efficiency. As the inductor value goes down to 10H, the
efficiency drops to between 70% and 75%. With 56H,
the efficiency exceeds 90% and there is little room for
improvement. At values greater than 100H, the operation
of the synchronous rectifier becomes unreliable because
the inductor current is so small that it is difficult for the
control circuitry to detect. The data used to generate
Figures 4 and 5 is provided in Table 1.
After the appropriate inductor value is chosen, it is
necessary to find the minimum inductor current rating
required. Peak inductor current is determined from the
following formula:
I
T
V
L
L PEAK
ON MAX
IN MAX
MIN
(
)
(
)
(
)
=
(3)
In the two cell application previously described, a
maximum input voltage of 3V would give a peak current
of 1.2A. When comparing various inductors, it is
important to keep in mind that suppliers use different
criteria to determine their ratings. Many use a
conservative current level, where inductance has dropped
to 90% of its normal level. In any case, it is a good idea to
try inductors of various current ratings with the ML4861 to
determine which inductor is the best choice. Check
efficiency and maximum output current, and if a current
probe is available, look at the inductor current to see if it
looks like the waveform shown in Figure 3. For additional
information, see Applications Note 29, "Choosing an
Inductor for Your ML4861 Application."
Suitable inductors can be purchased from the following
suppliers:
Coilcraft
(708) 639-6400
Coiltronics
(407) 241-7876
Dale
(605) 665-9301
Sumida
(708) 956-0666
Figure 4. Output Current vs Input Voltage.
7
ML4861
70%
1
3
EFFICIENCY A
T
I
OUT
MAX
2
75%
80%
85%
90%
65%
0
L = 10H
L = 15H
L = 27H
L = 56H
V
IN
ML4861-3.3
95%
75%
1.0
3.0
4.0
EFFICIENCY A
T
I
OUT
MAX
2.0
80%
85%
90%
95%
70%
0
L = 10H
L = 15H
L = 27H
L = 57H
V
IN
(V)
ML4861-5.0
75%
1.0
3.0
4.0
EFFICIENCY A
T
I
OUT
MAX
2.0
80%
85%
70%
0
L = 10H
L = 15H
L = 27H
L = 57H
V
IN
(V)
ML4861-6.0
5.0
6.0
90%
95%
OUTPUT CAPACITOR
The choice of output capacitor is also important, as it
controls the output ripple and optimizes the efficiency of
the circuit. Output ripple is influenced by three capacitor
parameters: capacitance, ESR, and ESL. The contribution
due to capacitance can be determined by looking at the
change in capacitor voltage required to store the energy
delivered by the inductor in a single charge-discharge
cycle, as determined by the following formula:
V
T
V
L C
V
V
OUT
ON
IN
OUT
IN
=
-
2
2
2
(
)
(4)
For a 2.4V input, and 5V output, a 27H inductor, and a
47F capacitor, the expected output ripple due to
capacitor value is 87mV.
Capacitor Equivalent Series Resistance (ESR) and
Equivalent Series Inductance (ESL), also contribute to the
output ripple due to the inductor discharge current
waveform. Just after the NMOS transistor turns off, the
output current ramps quickly to match the peak inductor
current. This fast change in current through the output
capacitor's ESL causes a high frequency (5ns) spike that
can be over 1V in magnitude. After the ESL spike settles,
the output voltage still has a ripple component equal to
the inductor discharge current times the ESR. This
component will have a sawtooth shape and a peak value
equal to the peak inductor current times the ESR. ESR
also has a negative effect on efficiency by contributing
I-squared R losses during the discharge cycle.
An output capacitor with a capacitance of 100F, an ESR
of less than 0.1, and an ESL of less than 5nH is a good
general purpose choice. Tantalum capacitors which meet
these requirements can be obtained from the following
suppliers:
AVX
(207) 282-5111
Sprague
(207) 324-4140
If ESL spikes are causing output noise problems, an EMI
filter can be added in series with the output.
Figure 5. Typical Efficiency as a Function of V
IN
.
8
ML4861
INPUT CAPACITOR
Unless the input source is a very low impedance battery, it
will be necessary to decouple the input with a capacitor
with a value of between 47F and 100F. This provides
the benefits of preventing input ripple from affecting the
ML4861 control circuitry, and it also improves efficiency
by reducing I-squared R losses during the charge and
discharge cycles of the inductor. Again, a low ESR
capacitor (such as tantalum) is recommended.
REFERENCE CAPACITOR
Under some circumstances input ripple cannot be
reduced effectively. This occurs primarily in applications
where inductor currents are high, causing excess output
ripple due to "pulse grouping", where the charge-
discharge pulses are not evenly spaced in time. In such
cases it may be necessary to decouple the reference pin
(V
REF
) with a small 10nF to 100nF ceramic capacitor. This
is particularly true if the ripple voltage at V
IN
is greater
than 100mV.
SETTING THE RESET THRESHOLD
To use the RESET comparator as an input voltage monitor,
it is necessary to use an external resistor divider tied to the
DETECT pin as shown in the block diagram. The resistor
values R
A
and R
B
can be calculated using the following
equation:
V
R
R
R
IN MIN
A
B
B
(
)
.
(
)
=
+
0 2
(5)
The value of R
B
should be 100k or less to minimize bias
current errors. R
A
is then found by rearranging the
equation:
R
R
V
A
B
IN MIN
=
-
(
)
.
0 2
1
(6)
LAYOUT
Good PC board layout practices will ensure the proper
operation of the ML4861. Important layout considerations
include:
Use adequate ground and power traces or planes
Keep components as close as possible to the ML4861
Use short trace lengths from the inductor to the V
L
pin
and from the output capacitor to the V
OUT
pin
Use a single point ground for the ML4861 ground pins,
and the input and output capacitors
A sample PC board layout is shown in Figure 6.
TOP LAYER
BOTTOM LAYER
Figure 6. Sample PC Board Layout.
9
ML4861
TABLE 1. MAXIMUM OUTPUT CURRENT AND EFFICIENCY.
V
IN
I
OUT
(mA)
EFFICIENCY PERCENTAGE
L = 10H
1.0
45.8
70.6
1.5
112.6
74.2
2.0
210.7
74.0
2.5
331.6
73.0
L = 15H
1.0
32.4
75.7
1.5
85.6
79.5
2.0
156.3
80.6
2.5
240.2
80.9
3.0
332.5
81.2
3.5
432.3
81.6
L = 27H
1.0
20.8
78.7
1.5
59.3
83.6
2.0
108.6
84.9
2.5
167.6
85.6
3.0
236.6
86.2
3.5
311.2
86.6
4.0
385.4
87.2
4.5
442.3
88.0
L = 56H
1.0
11.3
87.3
1.5
27.4
89.4
2.0
49.8
90.5
2.5
78.1
91.2
3.0
112.0
91.7
3.5
151.2
92.2
4.0
194.2
92.6
4.5
237.0
93.1
V
IN
I
OUT
(mA)
EFFICIENCY PERCENTAGE
L = 10H
1.0
77.5
69.7
1.5
191.7
67.2
2.0
310.2
67.8
2.5
409.7
71.1
L = 15H
1.0
58.5
74.5
1.5
137.1
75.7
2.0
232.1
76.4
2.5
335.3
76.9
3.0
405.0
78.2
L = 27H
1.0
40.0
81.1
1.5
95.4
82.9
2.0
163.8
83.6
2.5
242.5
84.2
3.0
306.0
85.2
L = 56H
1.0
19.5
89.4
1.5
45.5
90.9
2.0
79.3
90.6
2.5
122.6
91.1
3.0
168.3
91.7
ML4861-3.3
ML4861-5.0
10
ML4861
TABLE 1. MAXIMUM OUTPUT CURRENT AND EFFICIENCY
(Continued)
V
IN
(V)
I
IN
(mA)
V
OUT
(V)
I
OUT
(mA)
EFFICIENCY %
L = 10H
1.0
325.8
5.975
40.1
73.5
1.5
524.6
5.990
100.0
76.1
2.0
730.0
5.995
184.5
75.7
2.5
910.8
5.992
284.0
74.7
L = 15H
1.0
220.5
5.993
28.5
77.5
1.5
365.7
5.981
73.8
80.5
2.0
516.7
5.998
139.9
81.2
2.5
639.3
5.995
216.3
81.1
3.0
755.1
5.999
305.1
80.8
3.5
855.1
5.996
402.0
80.5
4.0
916.1
5.992
493.0
80.6
L = 27H
1.0
154.1
5.992
21.6
84.0
1.5
235.7
5.982
50.7
85.8
2.0
329.5
5.990
95.9
87.2
2.5
404.6
6.000
147.5
87.5
3.0
478.2
5.995
209.6
87.6
3.5
551.0
5.999
281.6
87.6
4.0
610.5
5.997
356.7
87.6
4.5
659.9
5.993
434.0
87.6
5.0
689.1
5.991
504.3
87.7
5.5
665.0
5.999
534.7
87.7
L = 60H
1.0
67.6
5.977
10.0
88.4
1.5
108.8
5.961
24.7
90.2
2.0
148.0
5.976
45.1
91.1
2.5
186.0
5.978
71.2
91.5
3.0
222.4
5.973
102.6
91.9
3.5
257.2
5.975
138.6
92.0
4.0
290.2
5.989
178.7
92.2
4.5
321.2
5.995
222.7
92.4
5.0
346.4
5.997
267.1
92.5
5.5
356.1
6.000
302.4
92.6
ML4861-6.0
11
ML4861
SEATING PLANE
0.148 - 0.158
(3.76 - 4.01)
PIN 1 ID
0.228 - 0.244
(5.79 - 6.20)
0.189 - 0.199
(4.80 - 5.06)
0.012 - 0.020
(0.30 - 0.51)
0.050 BSC
(1.27 BSC)
0.015 - 0.035
(0.38 - 0.89)
0.059 - 0.069
(1.49 - 1.75)
0.004 - 0.010
(0.10 - 0.26)
0.055 - 0.061
(1.40 - 1.55)
8
0.006 - 0.010
(0.15 - 0.26)
0 - 8
1
0.017 - 0.027
(0.43 - 0.69)
(4 PLACES)
Package: S08
8-Pin SOIC
PART NUMBER
OUTPUT VOLTAGE TEMPERATURE RANGE
PACKAGE
ML4861CS-3
3.3V
0C to 70C
8-Pin SOIC (S08)
ML4861CS-5
5.0V
0C to 70C
8-Pin SOIC (S08)
ML4861CS-6
6.0V
0C to 70C
8-Pin SOIC (S08)
ML4861ES-3
3.3V
20C to 70C
8-Pin SOIC (S08)
ML4861ES-5
5.0V
20C to 70C
8-Pin SOIC (S08)
ML4861ES-6 (Obsolete)
6.0V
20C to 70C
8-Pin SOIC (S08)
ML4861IS-3 (Obsolete)
3.3V
40C to 85C
8-Pin SOIC (S08)
ML4861IS-5 (Obsolete)
5.0V
40C to 85C
8-Pin SOIC (S08)
ML4861IS-6 (Obsolete)
6.0V
40C to 85C
8-Pin SOIC (S08)
ORDERING INFORMATION
PHYSICAL DIMENSIONS
inches (millimeters)
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume
any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the
rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or
representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability
for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application.
Micro Linear 1996
is a registered trademark of Micro Linear Corporation
Products described in this document may be covered by one or more of the following patents: 4,897,611; 4,964,026; 5,027,116;
5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017, 5,559,470. Other patents are pending.
DS4861-01
PDF 
ZIP