Low Power 12-Bit A/D Converter with I2C Interface
2003 Microchip Technology Inc.
DS21732B-page 1
M
MCP3221
Features
12-bit resolution
1 LSB DNL, 2 LSB INL max.
250 A max conversion current
5 nA typical standby current, 1 A max.
I
2
CTM
compatible serial interface
- 100 kHz I
2
C Standard Mode
- 400 kHz I
2
C Fast Mode
Up to 8 devices on a single 2-Wire bus
22.3 ksps in I
2
C Fast Mode
Single-ended analog input channel
On-chip sample and hold
On-chip conversion clock
Single-supply specified operation: 2.7V to 5.5V
Temperature range:
- Industrial: -40C to +85C
- Extended: -40C to +125C
Small SOT-23 package
Applications
Data Logging
Multi-zone Monitoring
Hand-Held Portable Applications
Battery-Powered Test Equipment
Remote or Isolated Data Acquisition
Package Type
Description
The Microchip Technology Inc. MCP3221 is a succes-
sive approximation A/D converter with 12-bit resolu-
tion. Available in the SOT-23 package, this device
provides one single-ended input with very low power
consumption. Based on an advanced CMOS technol-
ogy, the MCP3221 provides a low maximum conver-
sion current and standby current of 250 A and 1 A,
respectively. Low current consumption, combined with
the small SOT-23 package, make this device ideal for
battery-powered and remote data acquisition
applications.
Communication to the MCP3221 is performed using a
2-wire, I
2
C compatible interface. Standard (100 kHz)
and Fast (400 kHz) I
2
C modes are available with the
device. An on-chip conversion clock enables indepen-
dent timing for the I
2
C and conversion clocks. The
device is also addressable, allowing up to eight devices
on a single 2-wire bus.
The MCP3221 runs on a single supply voltage that
operates over a broad range of 2.7V to 5.5V. This
device also provides excellent linearity of 1 LSB differ-
ential non-linearity and 2 LSB integral non-linearity,
maximum.
Functional Block Diagram
5-Pin SOT-23A
SCL
AIN
MCP32
2
1
1
2
3
5
SDA
V
SS
V
DD
4
Comparator
Sample
and
Hold
12-bit SAR
DAC
I
2
CTM Interface
AIN
V
SS
V
DD
SCL
SDA
Clock
Control Logic
+
Low Power 12-Bit A/D Converter With I
2
CTM Interface
MCP3221
DS21732B-page 2
2003 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
V
DD
...................................................................................7.0V
Analog input pin w.r.t. V
SS
.......... ............. -0.6V to V
DD
+0.6V
SDA and SCL pins w.r.t. V
SS
........... .........-0.6V to V
DD
+1.0V
Storage temperature .....................................-65C to +150C
Ambient temp. with power applied ................-65C to +125C
Maximum Junction Temperature .......... .........................150C
ESD protection on all pins (HBM) .................................
4 kV
Stresses above those listed under "Maximum ratings" may
cause permanent damage to the device. This is a stress rating
only and functional operation of the device at those or any
other conditions above those indicated in the operational list-
ings of this specification is not implied. Exposure to maximum
rating conditions for extended periods may affect device reli-
ability.
PIN FUNCTION TABLE
Name
Function
V
DD
+2.7V to 5.5V Power Supply
V
SS
Ground
AIN
Analog Input
SDA
Serial Data In/Out
SCL
Serial Clock In
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
DD
= 5.0V, V
SS
= GND, R
PU
= 2 k
T
AMB
= -40C to +85C, I
2
C Fast Mode Timing: f
SCL
= 400 kHz (Note 3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
DC Accuracy
Resolution
12
bits
Integral Nonlinearity
INL
--
0.75
2
LSB
Differential Nonlinearity
DNL
--
0.5
1
LSB
No missing codes
Offset Error
--
0.75
2
LSB
Gain Error
--
-1
3
LSB
Dynamic Performance
Total Harmonic Distortion
THD
--
-82
--
dB
V
IN
= 0.1V to 4.9V @ 1 kHz
Signal-to-Noise and Distortion
SINAD
--
72
--
dB
V
IN
= 0.1V to 4.9V @ 1 kHz
Spurious-Free Dynamic Range
SFDR
--
86
--
dB
V
IN
= 0.1V to 4.9V @ 1 kHz
Analog Input
Input Voltage Range
V
SS
-0.3
--
V
DD
+0.3
V
2.7V
V
DD
5.5V
Leakage Current
-1
--
+1
A
SDA/SCL (open-drain output):
Data Coding Format
Straight Binary
High-level input voltage
V
IH
0.7 V
DD
--
--
V
Low-level input voltage
V
IL
--
--
0.3 V
DD
V
Low-level output voltage
V
OL
--
--
0.4
V
I
OL
= 3 mA, R
PU
= 1.53 k
Hysteresis of Schmitt trigger inputs
V
HYST
--
0.05 V
DD
--
V
f
SCL
= 400 kHz only
Note 1: "Sample time" is the time between conversions once the address byte has been sent to the converter.
Refer to Figure 5-6.
2: This parameter is periodically sampled and not 100% tested.
3: R
PU
= Pull-up resistor on SDA and SCL.
4: SDA and SCL = V
SS
to V
DD
at 400 kHz.
5: t
ACQ
and t
CONV
are dependent on internal oscillator timing. See Figure 5-5 and Figure 5-6 for relation to
SCL.
2003 Microchip Technology Inc.
DS21732B-page 3
MCP3221
TEMPERATURE SPECIFICATIONS
Input leakage current
I
LI
-1
--
+1
A
V
IN
= 0.1 V
DD
and 0.9 V
DD
Output leakage current
I
LO
-1
--
+1
A
V
OUT
= 0.1 V
SS
and 0.9 V
DD
Pin capacitance
(all inputs/outputs)
C
IN
,
C
OUT
--
--
10
pF
T
AMB
= 25C, f = 1 MHz;
(Note 2)
Bus Capacitance
C
B
--
--
400
pF
SDA drive low, 0.4V
Power Requirements
Operating Voltage
V
DD
2.7
--
5.5
V
Conversion Current
I
DD
--
175
250
A
Standby Current
I
DDS
--
0.005
1
A
SDA, SCL = V
DD
Active bus current
I
DDA
--
--
120
A
Note 4
Conversion Rate
Conversion Time
t
CONV
--
8.96
--
s
Note 5
Analog Input Acquisition Time
t
ACQ
--
1.12
--
s
Note 5
Sample Rate
f
SAMP
--
--
22.3
ksps
f
SCL
= 400 kHz (Note 1)
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
DD
= 5.0V, V
SS
= GND.
Parameters
Symbol
Min
Typ
Max
Units
Conditions
Temperature Ranges
Industrial Temperature Range
T
A
-40
--
+85
C
Extended Temperature Range
T
A
-40
--
+125
C
Operating Temperature Range
T
A
-40
--
+125
C
Storage Temperature Range
T
A
-65
--
+150
C
Thermal Package Resistances
Thermal Resistance, 5L-SOT23A
JA
--
256
--
C/W
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
DD
= 5.0V, V
SS
= GND, R
PU
= 2 k
T
AMB
= -40C to +85C, I
2
C Fast Mode Timing: f
SCL
= 400 kHz (Note 3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Note 1: "Sample time" is the time between conversions once the address byte has been sent to the converter.
Refer to Figure 5-6.
2: This parameter is periodically sampled and not 100% tested.
3: R
PU
= Pull-up resistor on SDA and SCL.
4: SDA and SCL = V
SS
to V
DD
at 400 kHz.
5: t
ACQ
and t
CONV
are dependent on internal oscillator timing. See Figure 5-5 and Figure 5-6 for relation to
SCL.
MCP3221
DS21732B-page 4
2003 Microchip Technology Inc.
TIMING SPECIFICATIONS
FIGURE 1-1:
Standard and Fast Mode Bus Timing Data.
Electrical Characteristics: All parameters apply at V
DD
= 2.7V - 5.5V, V
SS
= GND, T
AMB
= -40C to +85C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
I
2
C Standard Mode
Clock frequency
f
SCL
0
--
100
kHz
Clock high time
T
HIGH
4000
--
--
ns
Clock low time
T
LOW
4700
--
--
ns
SDA and SCL rise time
T
R
--
--
1000
ns
From V
IL
to V
IH
(Note 1)
SDA and SCL fall time
T
F
--
--
300
ns
From V
IL
to V
IH
(Note 1)
START condition hold time
T
HD:STA
4000
--
--
ns
START condition setup time
T
SU:STA
4700
--
--
ns
Data input setup time
T
SU:DAT
250
--
--
ns
STOP condition setup time
T
SU:STO
4000
--
--
ns
STOP condition hold time
T
HD:STD
4000
--
--
ns
Output valid from clock
T
AA
--
--
3500
ns
Bus free time
T
BUF
4700
--
--
ns
Note 2
Input filter spike suppression
T
SP
--
--
50
ns
SDA and SCL pins (Note 1)
I
2
C Fast Mode
Clock frequency
F
SCL
0
--
400
kHz
Clock high time
T
HIGH
600
--
--
ns
Clock low time
T
LOW
1300
--
--
ns
SDA and SCL rise time
T
R
20 + 0.1C
B
--
300
ns
From V
IL
to V
IH
(Note 1)
SDA and SCL fall time
T
F
20 + 0.1C
B
--
300
ns
From V
IL
to V
IH
(Note 1)
START condition hold time
T
HD:STA
600
--
--
ns
START condition setup time
T
SU:STA
600
--
--
ns
Data input hold time
T
HD:DAT
0
--
0.9
ms
Data input setup time
T
SU:DAT
100
--
--
ns
STOP condition setup time
T
SU:STO
600
--
--
ns
STOP condition hold time
T
HD:STD
600
--
--
ns
Output valid from clock
T
AA
--
--
900
ns
Bus free time
T
BUF
1300
--
--
ns
Note 2
Input filter spike suppression
T
SP
--
--
50
ns
SDA and SCL pins (Note 1)
Note 1:
This parameter is periodically sampled and not 100% tested.
2:
Time the bus must be free before a new transmission can start.
T
F
T
HIGH
V
HYS
T
R
T
SU:STA
T
SP
T
HD:STA
T
LOW
T
HD:DAT
T
SU:DAT
T
SU:STO
T
BUF
T
AA
SCL
SDA
IN
SDA
OUT
2003 Microchip Technology Inc.
DS21732B-page 5
MCP3221
2.0
TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, V
DD
= 5V, V
SS
= 0V, I
2
C Fast Mode Timing (SCL = 400 kHz), Continuous Conversion
Mode (f
SAMP
= 22.3 ksps), T
A
= +25C.
FIGURE 2-1:
INL vs. Clock Rate.
FIGURE 2-2:
INL vs. V
DD
- I
2
CTM
Standard Mode (f
SCL
= 100 kHz).
FIGURE 2-3:
INL vs. Code
(Representative Part).
FIGURE 2-4:
INL vs. Clock Rate
(V
DD
= 2.7V).
FIGURE 2-5:
INL vs. V
DD
- I
2
CTM Fast
Mode (f
SCL
= 400 kHz).
FIGURE 2-6:
INL vs. Code
(Representative Part, V
DD
= 2.7V).
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
0
100
200
300
400
I
2
C Bus Rate (kHz)
INL (LSB)
Positive INL
Negative INL
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
2.5
3
3.5
4
4.5
5
5.5
V
DD
(V)
INL (LSB)
Positive INL
Negative INL
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0
1024
2048
3072
4096
Digital Code
INL (LSB)
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
0
100
200
300
400
I
2
C Bus Rate (kHz)
INL (LSB)
Positive INL
Negative INL
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
2.5
3
3.5
4
4.5
5
5.5
V
DD
(V)
INL (LSB)
Positive INL
Negative INL
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0
1024
2048
3072
4096
Digital Code
INL (LSB)
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