ChipFind - документация

Электронный компонент: TC7106ACPL

Скачать:  PDF   ZIP
2002 Microchip Technology Inc.
DS21455B-page 1
TC7106/A/TC7107/A
Features
Internal Reference with Low Temperature Drift
- TC7106/7: 80ppm/C Typical
- TC7106A/7A: 20ppm/C Typical
Drives LCD (TC7106) or LED (TC7107)
Display Directly
Zero Reading with Zero Input
Low Noise for Stable Display
Auto-Zero Cycle Eliminates Need for Zero
Adjustment
True Polarity Indication for Precision Null
Applications
Convenient 9V Battery Operation (TC7106A)
High Impedance CMOS Differential Inputs: 10
12
Differential Reference Inputs Simplify Ratiometric
Measurements
Low Power Operation: 10mW
Applications
Thermometry
Bridge Readouts: Strain Gauges, Load Cells, Null
Detectors
Digital Meters: Voltage/Current/Ohms/Power, pH
Digital Scales, Process Monitors
Portable Instrumentation
Device Selection Table
General Description
The TC7106A and TC7107A 3-1/2 digit direct display
drive analog-to-digital converters allow existing 7106/
7107 based systems to be upgraded. Each device has
a precision reference with a 20ppm/C max tempera-
ture coefficient. This represents a 4 to 7 times improve-
ment over similar 3-1/2 digit converters. Existing 7106
and 7107 based systems may be upgraded without
changing external passive component values. The
TC7107A drives common anode light emitting diode
(LED) displays directly with 8mA per segment. A low
cost, high resolution indicating meter requires only a
display,
four
resistors,
and
four
capacitors.The
TC7106A low power drain and 9V battery operation
make it suitable for portable applications.
The TC7106A/TC7107A reduces linearity error to less
than 1 count. Rollover error the difference in readings
for equal magnitude, but opposite polarity input signals,
is below 1 count. High impedance differential inputs
offer 1pA leakage current and a 10
12
input imped-
ance. The differential reference input allows ratiometric
measurements for ohms or bridge transducer mea-
surements. The 15
V
PP
noise performance ensures a
"rock solid" reading. The auto-zero cycle ensures a
zero display reading with a zero volts input.
Package
Code
Package
Pin Layout
Temperature
Range
CPI
40-Pin PDIP
Normal
0
C to +70
C
IPL
40-Pin PDIP
Normal
-25
C to +85
C
IJL
40-Pin CERDIP
Normal
-25
C to +85
C
CKW
44-Pin PQFP
Formed Leads
0
C to +70
C
CLW
44-Pin PLCC
--
0
C to +70
C
3-1/2 Digit Analog-to-Digital Converters
TC7106/A/TC7107/A
DS21455B-page 2
2002 Microchip Technology Inc.
Package Type
TC7106ACPL
TC7107AIPL
44-Pin PLCC
44-Pin PQFP
40-Pin CERDIP
40-Pin PDIP
1
2
3
4
OSC1
5
6
7
8
9
10
11
12
TEST
V
REF
+
ANALOG
COMMON
C
AZ
V+
D
2
Normal Pin
Configuration
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
C
2
B
2
A
2
F
2
E
2
D
3
B
3
F
3
E
3
AB
4
(Minus Sign)
(Minus Sign)
10's
100's
1000's
(7106A/7107A)
100's
OSC2
OSC3
V
REF
-
C
REF
+
C
REF
-
V
IN
+
V
IN
-
V
BUFF
V
INT
V-
G
2
C
3
A
3
G
3
BP/GND
POL
TC7106AIJL
TC7107AIJL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
100's
1000's
100's
Reverse
Configuration
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
D
1
C
1
B
1
A
1
F
1
G
1
E
1
1's
V+
D
2
C
2
B
2
A
2
F
2
E
2
D
3
B
3
F
3
E
3
AB
4
POL
D
1
C
1
B
1
A
1
F
1
G
1
E
1
1's
10's
OSC1
TEST
V
REF
+
ANALOG
COMMON
C
AZ
OSC2
OSC3
V
REF
-
C
REF
+
C
REF
-
V
IN
+
V
IN
-
V
BUFF
V
INT
V-
G
2
C
3
A
3
G
3
BP/GND
(7106A/7107A)
27
26
25
24
23
7
8
9
10
11
NC
G
2
NC
NC
TEST
OSC3
NC
OSC2
OSC1
V+
D
1
C
1
B
1
12
13
14
15
16
17
18
19
20
21
22
38
37
36
35
34
REF HI
A
1
F
1
TC7106ACKW
TC7107ACKW
39
40
41
42
43
44
28
29
30
31
32
33
6
5
4
3
2
1
REF LO
C
REF
C
REF
COM
IN HI
IN LO
A/Z
BUFF
INT
V-
G
1
E
1
D
2
C
2
B
2
A
2
F
2
E
2
D
3
C
3
A
3
G
3
BP/GND
POL
AB
4
E
3
F
3
B
3
33
32
31
30
29
13
14
15
16
17
REF LO
C
REF
F
1
G
1
E
1
D
2
C
2
NC
B
2
A
2
F
2
E
2
D
3
18
19
20
21
22
23
24
25
26
27
28
44
43
42
41
40
A
1
B
3
F
3
TC7106ACLW
TC7107ACLW
1
2
3
4
5
6
34
35
36
37
38
39
12
11
10
9
8
7
B
1
C
1
D
1
V+
NC
OSC1
OSC2
OSC3
TEST
REF HI
E
3
AB
4
POL
NC
BP/GND
G
3
A
3
C
3
G
2
C
REF
COMMON
IN HI
NC
IN LO
A/Z
BUFF
INT
V-
2002 Microchip Technology Inc.
DS21455B-page 3
TC7106/A/TC7107/A
Typical Application
V
REF
+
TC7106/A
TC7107/A
9V
V
REF
33
34
24k
1k
29
36
39
38
40
0.47
F
0.1
F
V-
OSC1
OSC3
OSC2
To Analog
Common (Pin 32)
3 Conversions/Sec
200mV Full Scale
C
OSC
100k
47k
0.22
F
C
REF
-
C
REF
+
V
IN
+
V
IN
-
ANALOG
COMMON
V
INT
V
BUFF
C
AZ
20
21
Segment
Drive
2 - 19
22 - 25
POL
BP
V+
Minus Sign
Backplane
Drive
28
R
OSC
100pF
LCD Display (TC7106/A) or
Common Node w/ LED
Display (TC7107/A)
27
100mV
1
26
35
V
REF
-
+
31
0.01
F
Analog
Input
+
1M
30
32
TC7106/A/TC7107/A
DS21455B-page 4
2002 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
TC7106A
Supply Voltage (V+ to V-) ....................................... 15V
Analog Input Voltage (either Input) (Note 1) ... V+ to V-
Reference Input Voltage (either Input) ............ V+ to V-
Clock Input ................................................... Test to V+
Package Power Dissipation (T
A
70C) (Note 2):
40-Pin CERDIP .......................................2.29W
40-Pin PDIP ............................................1.23W
44-Pin PLCC ...........................................1.23W
44-Pin PQFP ...........................................1.00W
Operating Temperature Range:
C (Commercial) Devices .............. 0C to +70C
I (Industrial) Devices ................ -25C to +85C
Storage Temperature Range .............. -65C to +150C
TC7107A
Supply Voltage (V+) ...............................................+6V
Supply Voltage (V-)..................................................-9V
Analog Input Voltage (either Input) (Note 1) ... V+ to V-
Reference Input Voltage (either Input) ............ V+ to V-
Clock Input ..................................................GND to V+
Package Power Dissipation (T
A
70C) (Note 2):
40-Pin CERDip ........................................2.29W
40-Pin PDIP ............................................1.23W
44-Pin PLCC ...........................................1.23W
44-Pin PQFP ...........................................1.00W
Operating Temperature Range:
C (Commercial) Devices .............. 0C to +70C
I (Industrial) Devices ................ -25C to +85C
Storage Temperature Range .............. -65C to +150C
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
TC7106/A AND TC7107/A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7106/A and TC7107/A at T
A
= 25C,
f
CLOCK
= 48kHz. Parts are tested in the circuit of the Typical Operating Circuit.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
Z
IR
Zero Input Reading
-000.0
000.0
+000.0
Digital
Reading
V
IN
= 0.0V
Full Scale = 200.0mV
Ratiometric Reading
999
999/1000
1000
Digital
Reading
V
IN
= V
REF
V
REF
= 100mV
R/O
Rollover Error (Difference in Reading for
Equal Positive and Negative
Reading Near Full Scale)
-1
0.2
+1
Counts
V
IN
- = + V
IN
+
200mV
Linearity (Max. Deviation from Best
Straight Line Fit)
-1
0.2
+1
Counts
Full Scale = 200mV or
Full Scale = 2.000V
Note
1:
Input voltages may exceed the supply voltages, provided the input current is limited to 100
A.
2:
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3:
Refer to "Differential Input" discussion.
4:
Backplane drive is in phase with segment drive for "OFF" segment, 180 out of phase for "ON" segment.
Frequency is 20 times conversion rate. Average DC component is less than 50mV.
2002 Microchip Technology Inc.
DS21455B-page 5
TC7106/A/TC7107/A
CMRR
Common Mode Rejection Ratio (Note 3)
--
50
--
V/V
V
CM
= 1V, V
IN
= 0V,
Full Scale = 200.0mV
e
N
Noise (Peak to Peak Value not Exceeded
95% of Time)
--
15
--
V
V
IN
= 0V
Full Scale - 200.0mV
I
L
Leakage Current at Input
--
1
10
pA
V
IN
= 0V
Zero Reading Drift
--
0.2
1
V/C
V
IN
= 0V
"C" Device = 0C to +70C
--
1.0
2
V/C
V
IN
= 0V
"I" Device = -25C to +85C
TC
SF
Scale Factor Temperature Coefficient
--
1
5
ppm/C
V
IN
= 199.0mV,
"C" Device = 0C to +70C
(Ext. Ref = 0ppmC)
--
--
20
ppm/C
V
IN
= 199.0mV
"I" Device = -25C to +85C
I
DD
Supply Current (Does not include LED
Current For TC7107/A)
--
0.8
1.8
mA
V
IN
= 0.8
V
C
Analog Common Voltage
(with Respect to Positive Supply)
2.7
3.05
3.35
V
25k
Between Common and
Positive Supply
V
CTC
Temperature Coefficient of Analog
Common (with Respect to Positive Supply)
--
--
--
--
25k
Between Common and
Positive Supply
7106/7/A
7106/7
20
80
50
--
ppm/C
ppm/C
0C
T
A
+70C
("C" Commercial Temperature
Range Devices)
V
CTC
Temperature Coefficient of Analog
Common (with Respect to Positive Supply)
--
--
75
ppm/C
0C
T
A
+70C
("I" Industrial Temperature
Range Devices)
V
SD
TC7106A ONLY Peak to Peak
Segment Drive Voltage
4
5
6
V
V+ to V- = 9V
(Note 4)
V
BD
TC7106A ONLY Peak to Peak
Backplane Drive Voltage
4
5
6
V
V+ to V- = 9V
(Note 4)
TC7107A ONLY
Segment Sinking Current (Except Pin 19)
5
8.0
--
mA
V+ = 5.0V
Segment Voltage = 3V
TC7107A ONLY
Segment Sinking Current (Pin 19)
10
16
--
mA
V+ = 5.0V
Segment Voltage = 3V
TC7106/A AND TC7107/A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7106/A and TC7107/A at T
A
= 25C,
f
CLOCK
= 48kHz. Parts are tested in the circuit of the Typical Operating Circuit.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
Note
1:
Input voltages may exceed the supply voltages, provided the input current is limited to 100
A.
2:
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3:
Refer to "Differential Input" discussion.
4:
Backplane drive is in phase with segment drive for "OFF" segment, 180 out of phase for "ON" segment.
Frequency is 20 times conversion rate. Average DC component is less than 50mV.
TC7106/A/TC7107/A
DS21455B-page 6
2002 Microchip Technology Inc.
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
(40-Pin PDIP)
Normal
Pin No.
(40-Pin PDIP)
(Reversed
Symbol
Description
1
(40)
V+
Positive supply voltage.
2
(39)
D
1
Activates the D section of the units display.
3
(38)
C
1
Activates the C section of the units display.
4
(37)
B
1
Activates the B section of the units display.
5
(36)
A
1
Activates the A section of the units display.
6
(35)
F
1
Activates the F section of the units display.
7
(34)
G
1
Activates the G section of the units display.
8
(33)
E
1
Activates the E section of the units display.
9
(32)
D
2
Activates the D section of the tens display.
10
(31)
C
2
Activates the C section of the tens display.
11
(30)
B
2
Activates the B section of the tens display.
12
(29)
A
2
Activates the A section of the tens display.
13
(28)
F
2
Activates the F section of the tens display.
14
(27)
E
2
Activates the E section of the tens display.
15
(26)
D
3
Activates the D section of the hundreds display.
16
(25)
B
3
Activates the B section of the hundreds display.
17
(24)
F
3
Activates the F section of the hundreds display.
18
(23)
E
3
Activates the E section of the hundreds display.
19
(22)
AB
4
Activates both halves of the 1 in the thousands display.
20
(21)
POL
Activates the negative polarity display.
21
(20)
BP/GND
LCD Backplane drive output (TC7106A). Digital Ground (TC7107A).
22
(19)
G
3
Activates the G section of the hundreds display.
23
(18)
A
3
Activates the A section of the hundreds display.
24
(17)
C
3
Activates the C section of the hundreds display.
25
(16)
G
2
Activates the G section of the tens display.
26
(15)
V-
Negative power supply voltage.
27
(14)
V
INT
Integrator output. Connection point for integration capacitor. See INTEGRATING
CAPACITOR section for more details.
28
(13)
V
BUFF
Integration resistor connection. Use a 47k
resistor for a 200mV full scale range and
a 47k
resistor for 2V full scale range.
29
(12)
C
AZ
The size of the auto-zero capacitor influences system noise. Use a 0.47
F capacitor
for 200mV full scale, and a 0.047
F capacitor for 2V full scale. See Section 7.1 on
Auto-Zero Capacitor for more details.
30
(11)
V
IN
-
The analog LOW input is connected to this pin.
31
(10)
V
IN
+
The analog HIGH input signal is connected to this pin.
32
(9)
ANALOG
COMMON
This pin is primarily used to set the Analog Common mode voltage for battery opera-
tion or in systems where the input signal is referenced to the power supply. It also
acts as a reference voltage source. See Section 8.3 on ANALOG COMMON for more
details.
33
(8)
C
REF
-
See Pin 34.
34
(7)
C
REF
+
A 0.1
F capacitor is used in most applications. If a large Common mode voltage
exists (for example, the V
IN
- pin is not at analog common), and a 200mV scale is
used, a 1
F capacitor is recommended and will hold the rollover error to 0.5 count.
35
(6)
V
REF
-
See Pin 36.
2002 Microchip Technology Inc.
DS21455B-page 7
TC7106/A/TC7107/A
36
(5)
V
REF
+
The analog input required to generate a full scale output (1999 counts). Place 100mV
between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for
2V full scale. See paragraph on Reference Voltage.
37
(4)
TEST
Lamp test. When pulled HIGH (to V+) all segments will be turned on and the display
should read -1888. It may also be used as a negative supply for externally generated
decimal points. See paragraph under TEST for additional information.
38
(3)
OSC3
See Pin 40.
39
(2)
OSC2
See Pin 40.
40
(1)
OSC1
Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per
section), connect Pin 40 to the junction of a 100k
resistor and a 100pF capacitor.
The 100k
resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38.
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-Pin PDIP)
Normal
Pin No.
(40-Pin PDIP)
(Reversed
Symbol
Description
TC7106/A/TC7107/A
DS21455B-page 8
2002 Microchip Technology Inc.
3.0
DETAILED DESCRIPTION
(All Pin designations refer to 40-Pin PDIP.)
3.1
Dual Slope Conversion Principles
The TC7106A and TC7107A are dual slope, integrating
analog-to-digital converters. An understanding of the
dual slope conversion technique will aid in following the
detailed operation theory.
The conventional dual slope converter measurement
cycle has two distinct phases:
Input Signal Integration
Reference Voltage Integration (De-integration)
The input signal being converted is integrated for a
fixed time period (T
SI
). Time is measured by counting
clock pulses. An opposite polarity constant reference
voltage is then integrated until the integrator output
voltage returns to zero. The reference integration time
is directly proportional to the input signal (T
RI
). See
Figure 3-1.
FIGURE 3-1:
BASIC DUAL SLOPE
CONVERTER
In a simple dual slope converter, a complete conver-
sion requires the integrator output to "ramp-up" and
"ramp-down." A simple mathematical equation relates
the input signal, reference voltage and integration time
.
EQUATION 3-1:
For a constant V
IN
:
EQUATION 3-2:
The dual slope converter accuracy is unrelated to the
integrating resistor and capacitor values as long as
they are stable during a measurement cycle. An inher-
ent benefit is noise immunity. Noise spikes are inte-
grated or averaged to zero during the integration
periods. Integrating ADCs are immune to the large con-
version errors that plague successive approximation
converters in high noise environments. Interfering sig-
nals with frequency components at multiples of the
averaging period will be attenuated. Integrating ADCs
commonly operate with the signal integration period set
to a multiple of the 50/60Hz power line period (see
Figure 3-2).
FIGURE 3-2:
NORMAL MODE
REJECTION OF DUAL
SLOPE CONVERTER
+
REF
Voltage
Analog
Input
Signal
+
DISPLAY
Switch
Driver
Control
Logic
Integrator
Output
Clock
Counter
Polarity Control
Phase
Control
V
IN
V
REF
V
IN
1/2 V
REF
Variable
Reference
Integrate
Time
Fixed
Signal
Integrate
Time
Integrator
C
Comparator
+/
1
RC
V
R
T
RI
RC
T
SI
0
V
IN
(t)dt =
Where:
V
R
= Reference voltage
T
SI
= Signal integration time (fixed)
T
RI
= Reference voltage integration time (variable).
V
IN
= V
R
T
RI
T
SI
30
20
10
0
Normal Mode Rejection (dB)
0.1/T
1/T
10/T
Input Frequency
T = Measured Period
2002 Microchip Technology Inc.
DS21455B-page 9
TC7106/A/TC7107/A
4.0
ANALOG SECTION
In addition to the basic signal integrate and de-
integrate cycles discussed, the circuit incorporates an
auto-zero cycle. This cycle removes buffer amplifier,
integrator, and comparator offset voltage error terms
from the conversion. A true digital zero reading results
without adjusting external potentiometers. A complete
conversion consists of three cycles: an auto-zero,
signal integrate and reference integrate cycle.
4.1
Auto-Zero Cycle
During the auto-zero cycle, the differential input signal
is disconnected from the circuit by opening internal
analog gates. The internal nodes are shorted to analog
common (ground) to establish a zero input condition.
Additional analog gates close a feedback loop around
the integrator and comparator. This loop permits com-
parator offset voltage error compensation. The voltage
level established on C
AZ
compensates for device offset
voltages. The offset error referred to the input is less
than 10
V.
The auto-zero cycle length is 1000 to 3000 counts.
4.2
Signal Integrate Cycle
The auto-zero loop is entered and the internal differen-
tial inputs connect to V
IN
+ and V
IN
-. The differential
input signal is integrated for a fixed time period. The
TC7136/A signal integration period is 1000 clock peri-
ods or counts. The externally set clock frequency is
divided by four before clocking the internal counters.
The integration time period is:
EQUATION 4-1:
The differential input voltage must be within the device
Common mode range when the converter and mea-
sured system share the same power supply common
(ground). If the converter and measured system do not
share the same power supply common, V
IN
- should be
tied to analog common.
Polarity is determined at the end of signal integrate
phase. The sign bit is a true polarity indication, in that
signals less than 1LSB are correctly determined. This
allows precision null detection limited only by device
noise and auto-zero residual offsets.
4.3
Reference Integrate Phase
The third phase is reference integrate or de-integrate.
V
IN
- is internally connected to analog common and
V
IN
+ is connected across the previously charged refer-
ence capacitor. Circuitry within the chip ensures that
the capacitor will be connected with the correct polarity
to cause the integrator output to return to zero.
The time required for the output to return to zero is pro-
portional to the input signal and is between 0 and 2000
counts.
The digital reading displayed is:
EQUATION 4-2:
5.0
DIGITAL SECTION (TC7106A)
The TC7106A (Figure 5-2) contains all the segment
drivers necessary to directly drive a 3-1/2 digit liquid
crystal display (LCD). An LCD backplane driver is
included. The backplane frequency is the external
clock frequency divided by 800. For three conversions/
second, the backplane frequency is 60Hz with a 5V
nominal amplitude. When a segment driver is in phase
with the backplane signal, the segment is "OFF." An
out of phase segment drive signal causes the segment
to be "ON" or visible. This AC drive configuration
results in negligible DC voltage across each LCD seg-
ment. This insures long LCD display life. The polarity
segment driver is "ON" for negative analog inputs. If
V
IN
+ and V
IN
- are reversed, this indicator will reverse.
When the TEST pin on the TC7106A is pulled to V+, all
segments are turned "ON." The display reads -1888.
During this mode, the LCD segments have a constant
DC voltage impressed. DO NOT LEAVE THE DIS-
PLAY IN THIS MODE FOR MORE THAN SEVERAL
MINUTES! LCD displays may be destroyed if operated
with DC levels for extended periods.
The display font and the segment drive assignment are
shown in Figure 5-1.
FIGURE 5-1:
DISPLAY FONT AND
SEGMENT ASSIGNMENT
In the TC7106A, an internal digital ground is generated
from a 6-volt zener diode and a large P channel source
follower. This supply is made stiff to absorb the large
capacitive currents when the backplane voltage is
switched.
T
SI
=
4
F
OSC
x 1000
Where: F
OSC
= external clock frequency.
1000 =
V
IN
V
REF
Display Font
1000's
100's
10's
1's
TC7106/A/TC7107/A
DS21455B-page 10
2002 Microchip Technology Inc.
FIGURE 5-2:
TC7106A BLOCK DIAGRAM
TC7106A
Thousands
Hundreds
Tens
Units
4
39
OSC2
V+
TES
T
1
To Switch Drivers
From Comparator Output
Clock
40
38
OSC3
OSC1
Control Logic
26
500
Data Latch
C
REF
-
R
INT
V+
C
AZ
V
INT
28
29
27
33
36
34
10
A
31
A/Z
INT
AZ & DE ()
32
INT
26
Integrator
To
Digital
Section
DE (+)
DE (
)
DE (+)
DE (
)
ANALOG
COMMON
C
REF
+
V
IN
+
V
IN
-
V
BUFF
C
INT
V
REF
+V
REF
-
A/Z
C
REF
+
35
+
LCD Segment Drivers
200
Backplane
F
OSC
V-
V
TH
= 1V
V-
+
Internal Digital Ground
Low
Tempco
V
REF
Comparator
A/Z
V+
3.0V
1
R
OSC
C
OSC
7 Segment
Decode
7 Segment
Decode
7 Segment
Decode
21
Typical Segment Output
Segment
Output
V+
0.5mA
2mA
6.2V
LCD Display
+
37
A/Z
30
Internal Digital Ground
2002 Microchip Technology Inc.
DS21455B-page 11
TC7106/A/TC7107/A
6.0
DIGITAL SECTION (TC7107A)
Figure 6-2 shows a TC7107A block diagram.
It is
designed to drive common anode LEDs. It is identical
to the TC7106A, except that the regulated supply and
backplane drive have been eliminated and the segment
drive is typically 8mA. The 1000's output (Pin 19) sinks
current from two LED segments, and has a 16mA drive
capability.
In both devices, the polarity indication is "ON" for neg-
ative analog inputs. If V
IN
- and V
IN
+ are reversed, this
indication can be reversed also, if desired.
The display font is the same as the TC7106A.
6.1
System Timing
The oscillator frequency is divided by 4 prior to clocking
the internal decade counters. The four-phase mea-
surement cycle takes a total of 4000 counts, or 16,000
clock pulses. The 4000-count cycle is independent of
input signal magnitude.
Each phase of the measurement cycle has the follow-
ing length:
1.
Auto-zero phase: 1000 to 3000 counts (4000 to
12000 clock pulses).
For signals less than full scale, the auto-zero phase is
assigned the unused reference integrate time period:
2.
Signal integrate: 1000 counts (4000 clock
pulses).
This time period is fixed. The integration period is:
EQUATION 6-1:
3.
Reference Integrate: 0 to 2000 counts (0 to 8000
clock pulses).
The TC7106A/7107A are drop-in replacements for the
7106/7107 parts. External component value changes
are not required to benefit from the low drift internal
reference.
6.2
Clock Circuit
Three clocking methods may be used (see Figure 6-1):
1.
An external oscillator connected to Pin 40.
2.
A crystal between Pins 39 and 40.
3.
An RC oscillator using all three pins.
FIGURE 6-1:
CLOCK CIRCUITS
T
SI
= 4000
1
F
OSC
Where: F
OSC
is the externally set clock frequency.
TC7106A
TC7107A
4
Crystal
RC Network
40
38
EXT
OSC
39
To TEST Pin on TSC7106A
To GND Pin on TSC7107A
To
Counter
TC7106/A/TC7107/A
DS21455B-page 12
2002 Microchip Technology Inc.
FIGURE 6-2:
TC7107A BLOCK DIAGRAM
TC7107A
Thousands
Hundreds
Tens
Units
4
39
OSC2
V+
1
To Switch Drivers
from Comparator Output
Clock
7 Segment
Decode
40
38
OSC3
OSC1
Logic Control
Data Latch
C
REF
-
R
INT
V+
C
AZ
V
INT
28
29
27
33
36
34
10
A
31
A/Z
INT
AZ & DE ()
32
INT
26
Integrator
To
Digital
Section
DE (+)
DE
(
)
DE
(+)
DE (
)
ANALOG
COMMON
C
REF
+
V
IN
+
V
IN
-
V
BUFF
C
INT
V
REF
+V
REF
-
A/Z
C
REF
+
35
+
LCD Segment Drivers
F
OSC
V-
+
Digital Ground
Low
Tempco
V
REF
Comparator
A/Z
V+
3.0V
1
R
OSC
C
OSC
7 Segment
Decode
7 Segment
Decode
Typical Segment Output
Internal Digital Ground
Segment
Output
V+
0.5mA
8mA
Led Display
+
A/Z
30
Digital
Ground
TEST
21
37
500
2002 Microchip Technology Inc.
DS21455B-page 13
TC7106/A/TC7107/A
7.0
COMPONENT VALUE
SELECTION
7.1
Auto-Zero Capacitor (C
AZ
)
The C
AZ
capacitor size has some influence on system
noise. A 0.47
F capacitor is recommended for 200mV
full scale applications where 1LSB is 100
V. A 0.047
F
capacitor is adequate for 2.0V full scale applications. A
mylar type dielectric capacitor is adequate.
7.2
Reference Voltage Capacitor
(C
REF
)
The reference voltage used to ramp the integrator out-
put voltage back to zero during the reference integrate
cycle is stored on C
REF
. A 0.1
F capacitor is acceptable
when V
IN
- is tied to analog common. If a large Common
mode voltage exists (V
REF
- analog common) and the
application requires 200mV full scale, increase C
REF
to
1.0
F. Rollover error will be held to less than 1/2 count.
A mylar dielectric capacitor is adequate.
7.3
Integrating Capacitor (C
INT
)
C
INT
should be selected to maximize the integrator out-
put voltage swing without causing output saturation.
Due to the TC7106A/7107A superior temperature coef-
ficient specification, analog common will normally sup-
ply the differential voltage reference. For this case, a
2V full scale integrator output swing is satisfactory.
For 3 readings/second (F
OSC
= 48kHz), a 0.22
F value
is suggested. If a different oscillator frequency is used,
C
INT
must be changed in inverse proportion to maintain
the nominal 2V integrator swing.
An exact expression for C
INT
is:
EQUATION 7-1:
C
INT
must have low dielectric absorption to minimize
rollover error. A polypropylene capacitor is recom-
mended.
7.4
Integrating Resistor (R
INT
)
The input buffer amplifier and integrator are designed
with class A output stages. The output stage idling cur-
rent is 100
A. The integrator and buffer can supply
20
A drive currents with negligible linearity errors.
R
INT
is chosen to remain in the output stage linear drive
region, but not so large that printed circuit board leak-
age currents induce errors. For a 200mV full scale,
R
INT
is 47k
. 2.0V full scale requires 470k
.
Note:
F
OSC
= 48kHz (3 readings per sec).
7.5
Oscillator Components
R
OSC
(Pin 40 to Pin 39) should be 100k
. C
OSC
is
selected using the equation:
EQUATION 7-2:
For F
OSC
of 48kHz, C
OSC
is 100pF nominally.
Note that F
OSC
is divided by four to generate the
TC7106A internal control clock. The backplane drive
signal is derived by dividing F
OSC
by 800.
To achieve maximum rejection of 60Hz noise pickup,
the signal integrate period should be a multiple of
60Hz. Oscillator frequencies of 240kHz, 120kHz,
80kHz, 60kHz, 48kHz, 40kHz, etc. should be selected.
For 50Hz rejection, oscillator frequencies of 200kHz,
100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suit-
able. Note that 40kHz (2.5 readings/second) will reject
both 50Hz and 60Hz.
7.6
Reference Voltage Selection
A full scale reading (2000 counts) requires the input
signal be twice the reference voltage.
* V
FS
= 2V
REF.
In some applications, a scale factor other than unity
may exist between a transducer output voltage and the
required digital reading. Assume, for example, a pres-
sure transducer output is 400mV for 2000 lb/in
2
.
Rather than dividing the input voltage by two, the refer-
ence voltage should be set to 200mV. This permits the
transducer input to be used directly.
C
INT
=
(4000)
V
INT
1
F
OSC
V
FS
R
INT
Where:
F
OSC
= Clock Frequency at Pin 38
V
FS
= Full Scale Input Voltage
R
INT
= Integrating Resistor
V
INT
= Desired Full Scale Integrator Output Swing
Component
Value
Nominal Full Scale Voltage
200.0mV
2.000V
C
AZ
0.47
F
0.047
F
R
INT
47k
470k
C
INT
0.22
F
0.22
F
Required Full Scale Voltage*
V
REF
200.0mV
100.0mV
2.000V
1.000V
F
OSC
=
0.45
RC
TC7106/A/TC7107/A
DS21455B-page 14
2002 Microchip Technology Inc.
The differential reference can also be used when a dig-
ital zero reading is required when V
IN
is not equal to
zero. This is common in temperature measuring instru-
mentation. A compensating offset voltage can be
applied between analog common and V
IN
-. The trans-
ducer output is connected between V
IN
+ and analog
common.
The internal voltage reference potential available at
analog common will normally be used to supply the
converter's reference. This potential is stable when-
ever the supply potential is greater than approximately
7V. In applications where an externally generated ref-
erence voltage is desired, refer to Figure 7-1.
FIGURE 7-1:
EXTERNAL REFERENCE
8.0
DEVICE PIN FUNCTIONAL
DESCRIPTION
8.1
Differential Signal Inputs
V
IN
+ (Pin 31), V
IN
- (Pin 30)
The TC7106A/7017A is designed with true differential
inputs and accepts input signals within the input stage
common mode voltage range (V
CM
). The typical range
is V+ 1.0 to V+ + 1V. Common mode voltages are
removed from the system when the TC7106A/
TC7107A operates from a battery or floating power
source (isolated from measured system) and V
IN
- is
connected to analog common (V
COM
) (see Figure 8-2).
In systems where Common mode voltages exist, the
86dB Common mode rejection ratio minimizes error.
Common mode voltages do, however, affect the inte-
grator output level. Integrator output saturation must be
prevented. A worst case condition exists if a large pos-
itive V
CM
exists in conjunction with a full scale negative
differential signal. The negative signal drives the inte-
grator output positive along with V
CM
(see Figure 8-1).
For such applications the integrator output swing can
be reduced below the recommended 2.0V full scale
swing. The integrator output will swing within 0.3V of
V+ or V- without increasing linearity errors.
FIGURE 8-1:
COMMON MODE
VOLTAGE REDUCES
AVAILABLE INTEGRATOR
SWING (V
COM
V
IN
)
8.2
Differential Reference
V
REF
+ (Pin 36), V
REF
- (Pin 35)
The reference voltage can be generated anywhere
within the V+ to V- power supply range.
To prevent rollover type errors being induced by large
Common mode voltages, C
REF
should be large com-
pared to stray node capacitance.
The TC7106A/TC7107A circuits have a significantly
lower analog common temperature coefficient. This
gives a very stable voltage suitable for use as a refer-
ence. The temperature coefficient of analog common is
20ppm/C typically.
8.3
Analog Common (Pin 32)
The analog common pin is set at a voltage potential
approximately 3.0V below V+. The potential is between
2.7V and 3.35V below V+. Analog common is tied inter-
nally to the N channel FET capable of sinking 20mA.
This FET will hold the common line at 3.0V should an
external load attempt to pull the common line toward
V+. Analog common source current is limited to 10
A.
Analog common is, therefore, easily pulled to a more
negative voltage (i.e., below V+ 3.0V).
The TC7106A connects the internal V
IN
+ and V
IN
-
inputs to analog common during the auto-zero cycle.
During the reference integrate phase, V
IN
- is con-
nected to analog common. If V
IN
- is not externally con-
nected to analog common, a Common mode voltage
exists. This is rejected by the converter's 86dB Com-
mon mode rejection ratio. In battery operation, analog
common and V
IN
- are usually connected, removing
Common mode voltage concerns. In systems where V-
is connected to the power supply ground, or to a given
voltage, analog common should be connected to V
IN
-.
TC7106A
TC7107A
6.8V
Zener
I
Z
V+
V+
V+
1.2V
Ref
Common
TC7106A
TC7107A
6.8k
20k
V
REF
+
V
REF
-
V
REF
+
V
REF
-
(a)
(b)
V+
R
I
+
V
IN
V
CM
C
I
Integrator
V
I
=
[
[
V
CM
V
IN
Input Buffer
C
I
= Integration Capacitor
R
I
= Integration Resistor
4000
F
OSC
T
I
= Integration Time =
Where:
V
I
+
+
T
I
R
I
C
I
2002 Microchip Technology Inc.
DS21455B-page 15
TC7106/A/TC7107/A
FIGURE 8-2:
COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH
V
IN
-
= ANALOG COMMON
The analog common pin serves to set the analog section
reference or common point. The TC7106A is specifically
designed to operate from a battery, or in any measure-
ment system where input signals are not referenced
(float), with respect to the TC7106A power source. The
analog common potential of V+ 3.0V gives a 6V end of
battery life voltage. The common potential has a 0.001%
voltage coefficient and a 15
output impedance.
With sufficiently high total supply voltage (V+ V- >
7.0V), analog common is a very stable potential with
excellent temperature stability, typically 20ppm/C.
This potential can be used to generate the reference
voltage. An external voltage reference will be unneces-
sary in most cases because of the 50ppm/C maximum
temperature coefficient. See Internal Voltage Refer-
ence discussion.
8.4
TEST (Pin 37)
The TEST pin potential is 5V less than V+. TEST may
be used as the negative power supply connection for
external CMOS logic. The TEST pin is tied to the inter-
nally generated negative logic supply (Internal Logic
Ground) through a 500
resistor in the TC7106A. The
TEST pin load should be no more than 1mA.
If TEST is pulled to V+ all segments plus the minus sign
will be activated. Do not operate in this mode for more
than
several
minutes
with
the
TC7106A.
With
TEST = V+, the LCD segments are impressed with a
DC voltage which will destroy the LCD.
The TEST pin will sink about 10mA when pulled to V+.
8.5
Internal Voltage Reference
The analog common voltage temperature stability has
been significantly improved (Figure 8-3). The "A" ver-
sion of the industry standard circuits allow users to
upgrade old systems and design new systems without
external voltage references. External R and C values
do not need to be changed. Figure 8-4 shows analog
common supplying the necessary voltage reference for
the TC7106A/TC7107A.
FIGURE 8-3:
ANALOG COMMON
TEMPERATURE
COEFFICIENT
FIGURE 8-4:
INTERNAL VOLTAGE
REFERENCE
CONNECTION
V
BUF
C
AZ
V
INT
BP
POL
Segment
Drive
OSC1
OSC3
OSC2
V-
V+
V
REF
+
V
REF
-
Analog
Common
V-
V+
V-
V+
GND
GND
Measured
System
Power
Source
9V
LCD Display
TC7106A
+
V
IN
-
V
IN
+
Typical
No Maximum Specified
No
Maximum
Specified
No
Maximum
Specified
Typical
Typical
200
180
160
140
120
100
80
60
40
20
0
Temperature Coefficient (ppm/

C)
ICL7136
TC
7106A
ICL7106
Maximum
Limit
V-
Analog
Common
TC7106A
TC7107A
V
REF
+
32
35
36
24k
1k
V
REF
-
V
REF
1
Set V
REF
= 1/2 V
FULL SCALE
V+
TC7106/A/TC7107/A
DS21455B-page 16
2002 Microchip Technology Inc.
9.0
POWER SUPPLIES
The TC7107A is designed to work from 5V supplies.
However, if a negative supply is not available, it can be
generated from the clock output with two diodes, two
capacitors, and an inexpensive IC (Figure 9-1).
FIGURE 9-1:
GENERATING NEGATIVE
SUPPLY FROM +5V
In selected applications a negative supply is not
required. The conditions to use a single +5V supply
are:
The input signal can be referenced to the center
of the Common mode range of the converter.
The signal is less than 1.5V.
An external reference is used.
The TSC7660 DC to DC converter may be used to gen-
erate -5V from +5V (Figure 9-2).
FIGURE 9-2:
NEGATIVE POWER
SUPPLY GENERATION
WITH TC7660
9.1
TC7107 Power Dissipation
Reduction
The TC7107A sinks the LED display current and this
causes heat to build up in the IC package. If the inter-
nal voltage reference is used, the changing chip tem-
perature can cause the display to change reading. By
reducing the LED common
anode voltage, the
TC7107A package power dissipation is reduced.
Figure 9-3 is a curve tracer display showing the rela-
tionship between output current and output voltage for
a typical TC7107CPL. Since a typical LED has 1.8 volts
across it at 7mA, and its common anode is connected
to +5V, the TC7107A output is at 3.2V (point A on
Figure 9-3). Maximum power dissipation is 8.1mA x
3.2V x 24 segments = 622mW.
FIGURE 9-3:
TC7107 OUTPUT
CURRENT VS. OUTPUT
VOLTAGE
Notice, however, that once the TC7107A output voltage
is above two volts, the LED current is essentially con-
stant as output voltage increases. Reducing the output
voltage by 0.7V (point B in Figure 9-3) results in 7.7mA
of LED current, only a 5 percent reduction. Maximum
power dissipation is only 7.7mA x 2.5V x 24 = 462mW,
a reduction of 26%. An output voltage reduction of 1
volt (point C) reduces LED current by 10% (7.3mA) but
power dissipation by 38% (7.3mA x 2.2V x 24 =
385mW).
Reduced power dissipation is very easy to obtain.
Figure 9-4 shows two ways: either a 5.1 ohm, 1/4 watt
resistor or a 1 Amp diode placed in series with the dis-
play (but not in series with the TC7107A). The resistor
will reduce the TC7107A output voltage, when all 24
segments are "ON," to point "C" of Figure 9-4. When
segments turn off, the output voltage will increase. The
diode, on the other hand, will result in a relatively
steady output voltage, around point "B."
In addition to limiting maximum power dissipation, the
resistor reduces the change in power dissipation as the
display changes. This effect is caused by the fact that,
as fewer segments are "ON," each "ON" output drops
more voltage and current. For the best case of six seg-
TC7107A
V+
OSC1
OSC2
OSC3
GND
V-
V+
CD4009
0.047
F
1N914
1N914
10
F
+
V- = -3.3V
GND
V
IN
-
V
IN
V
REF
+
V
REF
-
COM
+5V
LED
DRIVE
36
1
35
32
31
30
26
V+
V-
21
TC7660
3
10
F
+
10
F
+
2
8
5
(-5V)
TC7107A
4
V
IN
+
C
B
A
6.000
7.000
8.000
9.000
10.000
2.00
2.50
3.00
3.50
4.00
Output Voltage (V)
O
u
tput
C
u
r
r
ent
(
m
A
)
2002 Microchip Technology Inc.
DS21455B-page 17
TC7106/A/TC7107/A
ments (a "111" display) to worst case (a "1888" display),
the resistor will change about 230mW, while a circuit
without the resistor will change about 470mW. There-
fore, the resistor will reduce the effect of display dissi-
pation on reference voltage drift by about 50%.
The change in LED brightness caused by the resistor is
almost unnoticeable as more segments turn off. If dis-
play brightness remaining steady is very important to
the designer, a diode may be used instead of the
resistor.
FIGURE 9-4:
DIODE OR RESISTOR
LIMITS PACKAGE POWER
DISSIPATION
10.0
TYPICAL APPLICATIONS
10.1
Liquid Crystal Display Sources
Several manufacturers supply standard LCDs to inter-
face with the TC7106A 3-1/2 digit analog-to-digital
converter.
Note:
Contact LCD manufacturer for full product listing and
specifications.
10.2
Light Emitting Diode Display
Sources
Several LED manufacturers supply seven segment
digits with and without decimal point annunciators for
the TC7107A.
10.3
Decimal Point and Annunciator
Drive
The TEST pin is connected to the internally generated
digital logic supply ground through a 500
resistor. The
TEST pin may be used as the negative supply for exter-
nal CMOS gate segment drivers. LCD display annunci-
ators for decimal points, low battery indication, or
function indication may be added without adding an
additional supply. No more than 1mA should be sup-
plied by the TEST pin; its potential is approximately 5V
below V+ (see Figure 10-1
).
FIGURE 10-1:
DECIMAL POINT DRIVE
USING TEST AS LOGIC
GROUND
Manufacturer
Address/Phone
Representative
Part Numbers*
Crystaloid
Electronics
5282 Hudson Dr.
Hudson, OH 44236
216-655-2429
C5335, H5535,
T5135, SX440
AND
720 Palomar Ave.
Sunnyvale, CA 94086
408-523-8200
FE 0201, 0701
FE 0203, 0701
FE 0501
Epson
3415 Kashikawa st.
Torrance, CA 90505
213-534-0360
LD-B709BZ
LD-H7992AZ
Hamlin, Inc.
612 E. Lake St.
Lake Mills, WI 53551
414-648-2361
00
3902, 3933, 3903
TP2
TP5
100
k
TP1
24k
1k
0.1
F
TP3
0.01
F
+
IN
0.22
F
Display
Display
100
pF
+5V
1M
-5V
150
0.47
F
TC7107A
40
TP
4
30
21
20
10
1
47
k
1N4001
5.1
1/4W
Manufacturer
Address/Phone
Display
Hewlett-Packard
Components
640 Page Mill Rd.
Palo Alto, CA 94304
LED
AND
720 Palomar Ave.
Sunnyvale, CA 94086
408-523-8200
LED
TC7106A
BP
TEST
37
21
V+
V+
GND
To LCD
Decimal
Point
To LCD
Decimal
Point
To LCD
Backplane
4049
TC7106A
Decimal
Point
Select
V+
V+
TEST
GND
4030
BP
TC7106/A/TC7107/A
DS21455B-page 18
2002 Microchip Technology Inc.
10.4
Ratiometric Resistance
Measurements
The true differential input and differential reference
make ratiometric reading possible. Typically in a ratio-
metric operation, an unknown resistance is measured,
with respect to a known standard resistance. No accu-
rately defined reference voltage is needed.
The unknown resistance is put in series with a known
standard and a current passed through the pair. The
voltage developed across the unknown is applied to the
input and the voltage across the known resistor is
applied to the reference input. If the unknown equals
the standard, the display will read 1000.
The displayed reading can be determined from the
following expression:
The display will over range for:
R
UNKNOWN
2 x R
STANDARD
FIGURE 10-2:
LOW PARTS COUNT
RATIOMETRIC
RESISTANCE
MEASUREMENT
FIGURE 10-3:
TEMPERATURE SENSOR
FIGURE 10-4:
POSITIVE TEMPERATURE
COEFFICIENT RESISTOR
TEMPERATURE SENSOR
FIGURE 10-5:
TC7106A, USING THE
INTERNAL REFERENCE:
200mV FULL SCALE, 3
READINGS-PER-SECOND
(RPS)
Displayed Reading
(
)
RUnknown
RS
dard
tan
-------------------------------x1000
=
V
REF
+
V
REF
-
V
IN
+
V
IN
-
Analog
Common
TC7106A
LCD Display
R
STANDARD
R
UNKNOWN
V+
V+
V-
V
IN
-
V
IN
+
V
REF
+
V
REF
-
Common
50k
R
2
160k
300k
300k
R
1
50k
1N4148
Sensor
9V
+
TC7106A
V
FS
= 2V
TC7106A
V+
V-
V
IN
-
V
IN
+
V
REF
+
V
REF
-
Common
5.6k
160k
R
2
20k
1N914
9V
R
1
20k
+
R
3
0.7%/
C
PTC
100k
100pF
0.47
F
47k
0.22
F
To Display
To Backplane
0.1
F
21
1k
22k
9V
Set V
REF
= 100mV
TC7106A
0.01
F
+
IN
1M
To Pin 1
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
+
2002 Microchip Technology Inc.
DS21455B-page 19
TC7106/A/TC7107/A
FIGURE 10-6:
TC7107 INTERNAL
REFERENCE: 200mV
FULL SCALE, 3RPS,
V
IN
- TIED TO GND FOR
SINGLE ENDED INPUTS
FIGURE 10-7:
CIRCUIT FOR
DEVELOPING UNDER
RANGE AND OVER
RANGE SIGNALS FROM
TC7106A OUTPUTS
FIGURE 10-8:
TC7106/TC7107:
RECOMMENDED
COMPONENT VALUES
FOR 2.00V FULL SCALE
FIGURE 10-9:
TC7107 OPERATED FROM
SINGLE +5V SUPPLY
100k
100pF
0.47
F
47k
0.22
F
To Display
0.1
F
21
1k
22k
Set V
REF
= 100mV
0.01
F
+
IN
1M
To Pin 1
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
-5V
+5V
TC7107A
21
20
40
To Logic
V
CC
V-
To Logic
V
CC
V+
CD4077
U/R
O/R
CD4023
OR 74C10
TC7106A
1
O/R = Over Range
U/R = Under Range
100k
100pF
0.047
F
470k
0.22
F
To Display
0.1
F
25k
24k
V+
Set V
REF
= 1V
0.01
F
+
IN
1M
V-
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
To Pin 1
TC7106A
TC7107A
100pF
0.47
F
47k
To Display
0.1
F
1k
V+
Set V
REF
= 100mV
10k
10k
1.2V
0.01
F
IN
1M
100k
0.22
F
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
TC7107A
To PIn 1
Note: An external reference must be used in this application.
TC7106/A/TC7107/A
DS21455B-page 20
2002 Microchip Technology Inc.
FIGURE 10-10:
3-1/2 DIGIT TRUE RMS AC DMM
FIGURE 10-11:
INTEGRATED CIRCUIT TEMPERATURE SENSOR
SEG
DRIVE
47k
1W
10%
+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD636
6.8
F
0.02
F
20k
10%
10k
1M
1M
IN4148
1
F
+
9M
900k
90k
10k
200mV
2V
20V
200V
COM
V
IN
TC7106A
LCD Display
24k
1k
2.2
F
0.01
F
1M
10%
9V
+
1
36
35
32
31
30
26
V+
Analog Common
V
IN
+
V
IN
-
26
27
29
28
40
38
39
BP
V-
C1 = 3 - 10pF Variable
C2 = 132pF Variable
V
REF
+
V
REF
-
V-
TC7106A
V
REF
-
Common
V
IN
+
V+
+
9V
V+
2
1
4
26
6
5
3
2
3
1
4
8
Temperature
Dependent
Output
NC
1.3k
50k
Constant 5V
50k
51k
5.1k
R
4
R
5
R
1
R
2
V
OUT
=
1.86V @
25
C
V
IN
-
V
FS
= 2.00V
GND
V-
V
OUT
ADJ
TEMP
REF02
TC911
V
REF
+
2002 Microchip Technology Inc.
DS21455B-page 21
TC7106/A/TC7107/A
11.0
PACKAGING INFORMATION
11.1
Package Marking Information
Package marking data not available at this time.
11.2
Taping Form
PIN 1
Component Taping Orientation for 44-Pin PLCC Devices
User Direction of Feed
Standard Reel Component Orientation
for TR Suffix Device
Note: Drawing does not represent total number of pins.
W
P
Package
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
44-Pin PLCC
32 mm
24 mm
500
13 in
Carrier Tape, Number of Components Per Reel and Reel Size
Component Taping Orientation for 44-Pin PQFP Devices
User Direction of Feed
PIN 1
Standard Reel Component Orientation
for TR Suffix Device
W
P
Package
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
44-Pin PQFP
24 mm
16 mm
500
13 in
Carrier Tape, Number of Components Per Reel and Reel Size
Note: Drawing does not represent total number of pins.
TC7106/A/TC7107/A
DS21455B-page 22
2002 Microchip Technology Inc.
11.3
Package Dimensions
Dimensions: inches (mm)
2.065 (52.45)
2.027 (51.49)
.200 (5.08)
.140 (3.56)
.150 (3.81)
.115 (2.92)
.070 (1.78)
.045 (1.14)
.022 (0.56)
.015 (0.38)
.110 (2.79)
.090 (2.29)
.555 (14.10)
.530 (13.46)
.610 (15.49)
.590 (14.99)
.015 (0.38)
.008 (0.20)
.700 (17.78)
.610 (15.50)
.040 (1.02)
.020 (0.51)
40-Pin PDIP (Wide)
PIN 1
3
MIN.
Dimensions: inches (mm)
.015 (0.38)
.008 (0.20)
.620 (15.75)
.590 (15.00)
.700 (17.78)
.620 (15.75)
.540 (13.72)
.510 (12.95)
2.070 (52.58)
2.030 (51.56)
.210 (5.33)
.170 (4.32)
.020 (0.51)
.016 (0.41)
.110 (2.79)
.090 (2.29)
.065 (1.65)
.045 (1.14)
.200 (5.08)
.125 (3.18)
.098 (2.49) MAX.
.030 (0.76) MIN.
.060 (1.52)
.020 (0.51)
.150 (3.81)
MIN.
40-Pin CERDIP (Wide)
PIN 1
3
MIN.
2002 Microchip Technology Inc.
DS21455B-page 23
TC7106/A/TC7107/A
11.3
Package Dimensions (Continued)
Dimensions: inches (mm)
.695 (17.65)
.685 (17.40)
.656 (16.66)
.650 (16.51)
.656 (16.66)
.650 (16.51)
.021 (0.53)
.013 (0.33)
.032 (0.81)
.026 (0.66)
.630 (16.00)
.591 (15.00)
.120 (3.05)
.090 (2.29)
.180 (4.57)
.165 (4.19)
.695 (17.65)
.685 (17.40)
.050 (1.27) TYP.
.020 (0.51) MIN.
PIN 1
44-Pin PLCC
Dimensions: inches (mm)
.557 (14.15)
.537 (13.65)
.398 (10.10)
.390 (9.90)
.031 (0.80) TYP.
.018 (0.45)
.012 (0.30)
.398 (10.10)
.390 (9.90)
.010 (0.25) TYP.
.096 (2.45) MAX.
.557 (14.15)
.537 (13.65)
.083 (2.10)
.075 (1.90)
.041 (1.03)
.026 (0.65)
7
MAX.
.009 (0.23)
.005 (0.13)
44-Pin PQFP
PIN 1
TC7106/A/TC7107/A
DS21455B-page 24
2002 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
SALES AND SUPPORT
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
Your local Microchip sales office
2.
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3.
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
PART CODE
TC711X X X XXX
6 = LCD
7 = LED
A or blank*
R (reversed pins) or blank (CPL pkg only)
* "A" parts have an improved reference TC
Package Code (see below):
}
2002 Microchip Technology Inc.
DS21455B-page 25
TC7106/A/TC7107/A
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip's products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
K
EE
L
OQ
, microID,
MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Tech-
nology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company's quality system processes and
procedures are QS-9000 compliant for its
PICmicro
8-bit MCUs, K
EE
L
OQ
code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip's quality system for the
design and manufacture of development
systems is ISO 9001 certified.
DS21455B-page 26
2002 Microchip Technology Inc.
AMERICAS
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Rocky Mountain
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-7456
Atlanta
500 Sugar Mill Road, Suite 200B
Atlanta, GA 30350
Tel: 770-640-0034 Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423 Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260
Kokomo
2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387
Los Angeles
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338
New York
150 Motor Parkway, Suite 202
Hauppauge, NY 11788
Tel: 631-273-5305 Fax: 631-273-5335
San Jose
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950 Fax: 408-436-7955
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Australia
Microchip Technology Australia Pty Ltd
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
China - Beijing
Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104
China - Chengdu
Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-6766200 Fax: 86-28-6766599
China - Fuzhou
Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
China - Shenzhen
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1315, 13/F, Shenzhen Kerry Centre,
Renminnan Lu
Shenzhen 518001, China
Tel: 86-755-2350361 Fax: 86-755-2366086
Hong Kong
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
India
Microchip Technology Inc.
India Liaison Office
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O'Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Korea
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5934
Singapore
Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Microchip Technology Taiwan
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Denmark
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
France
Microchip Technology SARL
Parc d'Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Germany
Microchip Technology GmbH
Gustav-Heinemann Ring 125
D-81739 Munich, Germany
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Italy
Microchip Technology SRL
Centro Direzionale Colleoni
Palazzo Taurus 1 V. Le Colleoni 1
20041 Agrate Brianza
Milan, Italy
Tel: 39-039-65791-1 Fax: 39-039-6899883
United Kingdom
Arizona Microchip Technology Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
03/01/02
*DS21455B*
W
ORLDWIDE
S
ALES
AND
S
ERVICE