MSP 44x8G
Multistandard
Sound Processor
Edition Feb. 25, 2000
6251-516-1PD
PRELIMINARY DATA SHEET
MICRONAS
MICRONAS
MSP 44x8G
PRELIMINARY DATA SHEET
2
Micronas
Contents
Page
Section
Title
5
1.
Introduction
6
1.1.
Features of the MSP 44x8G Family
6
1.2.
MSP 44x8G Version List
7
1.3.
MSP 44x8G Versions and their Application Fields
8
2.
Functional Description
8
2.1.
Architecture of the MSP 44x8G Family
9
2.2.
MSP 44x8G Sound IF Processing
9
2.2.1.
Analog Sound IF Input
9
2.2.2.
Demodulator: Standards and Features
9
2.2.3.
Preprocessing of Demodulator Signals
10
2.2.4.
Automatic Sound Select
10
2.2.5.
Manual Mode
12
2.3.
Preprocessing for SCART and I
2
S Input Signals
12
2.4.
Source Selection and Output Channel Matrix
12
2.4.1.
Mixing Unit
12
2.5.
Audio Baseband Processing
12
2.5.1.
Automatic Volume Correction (AVC)
13
2.5.2.
Main and Aux Outputs
13
2.5.3.
Quasi-Peak Detector
13
2.6.
SCART Signal Routing
13
2.6.1.
SCART DSP In and SCART Out Select
13
2.6.2.
Stand-by Mode
13
2.7.
I
2
S Bus Interfaces
13
2.7.1.
Synchronous I
2
S-Interface(s)
13
2.7.2.
Asynchronous I
2
S-Interface
14
2.8.
ADR Bus Interface
14
2.9.
Digital Control I/O Pins and Status Change Indication
14
2.10.
Preemphasis
14
2.11.
Clock PLL Oscillator and Crystal Specifications
15
3.
Control Interface
15
3.1.
I
2
C Bus Interface
15
3.1.1.
Device and Subaddresses
16
3.1.2.
Description of CONTROL Register
16
3.1.3.
Protocol Description
17
3.1.4.
Proposals for General MSP 44x8G I
2
C Telegrams
17
3.1.4.1.
Symbols
17
3.1.4.2.
Write Telegrams
17
3.1.4.3.
Read Telegrams
17
3.1.4.4.
Examples
17
3.2.
Start-Up Sequence: Power-Up and I
2
C Controlling
17
3.3.
MSP 44x8G Programming Interface
17
3.3.1.
User Registers Overview
20
3.3.2.
Description of User Registers
21
3.3.2.1.
STANDARD SELECT Register
21
3.3.2.2.
STANDARD RESULT Register
Contents, continued
Page
Section
Title
PRELIMINARY DATA SHEET
MSP 44x8G
Micronas
3
22
3.3.2.3.
Write Registers on I
2
C Subaddress 10
hex
25
3.3.2.4.
Read Registers on I
2
C Subaddress 11
hex
26
3.3.2.5.
Write Registers on I
2
C Subaddress 12
hex
33
3.3.2.6.
Read Registers on I
2
C Subaddress 13
hex
34
3.4.
Programming Tips
34
3.5.
Examples of Minimum Initialization Codes
34
3.5.1.
B/G-FM (A2 or NICAM)
34
3.5.2.
BTSC-Stereo
34
3.5.3.
BTSC-SAP with SAP at Main Channel
35
3.5.4.
FM-Stereo Radio
35
3.5.5.
Automatic Standard Detection
35
3.5.6.
Software Flow for Interrupt driven STATUS Check
37
4.
Specifications
37
4.1.
Outline Dimensions
39
4.2.
Pin Connections and Short Descriptions
42
4.3.
Pin Descriptions
45
4.4.
Pin Configurations
48
4.5.
Pin Circuits
50
4.6.
Electrical Characteristics
50
4.6.1.
Absolute Maximum Ratings
51
4.6.2.
Recommended Operating Conditions (T
A
= 0 to 70
C)
51
4.6.2.1.
General Recommended Operating Conditions
51
4.6.2.2.
Analog Input and Output Recommendations
52
4.6.2.3.
Recommendations for Analog Sound IF Input Signal
53
4.6.2.4.
Crystal Recommendations
54
4.6.3.
Characteristics
54
4.6.3.1.
General Characteristics
55
4.6.3.2.
Digital Inputs, Digital Outputs
56
4.6.3.3.
Reset Input and Power-Up
57
4.6.3.4.
I
2
C-Bus Characteristics
58
4.6.3.5.
I
2
S-Bus Characteristics
60
4.6.3.6.
Analog Baseband Inputs and Outputs, AGNDC
62
4.6.3.7.
Sound IF Inputs
62
4.6.3.8.
Power Supply Rejection
63
4.6.3.9.
Analog Performance
66
4.6.3.10.
Sound Standard Dependent Characteristics
69
5.
Appendix A: Overview of TV-Sound Standards
69
5.1.
NICAM 728
70
5.2.
A2-Systems
71
5.3.
BTSC-Sound System
71
5.4.
Japanese FM Stereo System (EIA-J)
72
5.5.
FM Satellite Sound
72
5.6.
FM-Stereo Radio
MSP 44x8G
PRELIMINARY DATA SHEET
4
Micronas
Contents, continued
Page
Section
Title
73
6.
Appendix B: Manual Mode
73
6.1.
Demodulator Write and Read Registers for Manual Mode
74
6.2.
DSP Write and Read Registers for Manual Mode
74
6.3.
Manual Mode: Description of Demodulator Write Registers
74
6.3.1.
Automatic Switching between NICAM and Analog Sound
74
6.3.1.1.
Function in Automatic Sound Select Mode
75
6.3.1.2.
Function in Manual Mode
76
6.3.2.
A2 Threshold
76
6.3.3.
Carrier-Mute Threshold
77
6.3.4.
DCO-Registers
77
6.4.
Manual Mode: Description of Demodulator Read Registers
78
6.4.1.
NICAM Mode Control/Additional Data Bits Register
78
6.4.2.
Additional Data Bits Register
78
6.4.3.
CIB Bits Register
78
6.4.4.
NICAM Error Rate Register
79
6.5.
Manual Mode: Description of DSP Write Registers
79
6.5.1.
Additional Channel Matrix Modes
79
6.5.2.
FM Fixed Deemphasis
79
6.5.3.
FM Adaptive Deemphasis
79
6.5.4.
NICAM Deemphasis
79
6.5.5.
Identification Mode for A2 Stereo Systems
80
6.6.
Manual Mode: Description of DSP Read Registers
80
6.6.1.
Stereo Detection Register for A2 Stereo Systems
80
6.6.2.
DC Level Register
80
6.7.
Demodulator Source Channels in Manual Mode
80
6.7.1.
Terrestrial Sound Standards
80
6.7.2.
SAT Sound Standards
82
7.
Appendix C: Application Information
82
7.1.
Exclusions of Audio Baseband Features
82
7.2.
Phase Relationship of Analog Outputs
83
7.3.
Application Circuit
84
8.
Data Sheet History
PRELIMINARY DATA SHEET
MSP 44x8G
Micronas
5
Multistandard Sound Processor Family
1. Introduction
The MSP 44x8G family of Multistandard Sound Pro-
cessors covers the sound processing of all analog TV-
Standards worldwide, as well as the NICAM digital
sound standards. The full TV sound processing, start-
ing with analog sound IF signal-in, down to processed
analog AF-out, is performed on a single chip. Fig. 11
shows a simplified functional block diagram of the
MSP 44x8G.
The high-quality A/D and D/A converters offer the full
audio bandwidth of 20 kHz and the backend DSP pro-
cessing is performed at a 48 kHz sample rate.
The MSP 44x8G has been designed for the usage in
hybrid set-top boxes and multimedia applications. Its
asynchronous I
2
S slave interface allows the reception
of digital stereo signals with arbitrary sample rates
ranging from 5 to 50 kHz. Synchronization is per-
formed by means of an adaptive sample rate con-
verter.
This generation of TV sound processing ICs includes
versions for processing the multichannel television
sound (MTS) signal conforming to the standard recom-
mended by the Broadcast Television Systems Commit-
tee (BTSC). The DBX noise reduction, or alternatively,
Micronas Noise Reduction (MNR) is performed align-
ment free.
Other processed standards are the Japanese FM-FM
multiplex standard (EIA-J) and the FM Stereo Radio
standard.
The MSP 44x8G versions are pin and software com-
patible to other MSP families. Standard selection
requires only a single I
2
C transmission.
The MSP 44x8G has built-in automatic functions: The
IC is able to detect the actual sound standard automat-
ically (Automatic Standard Detection). Furthermore,
pilot levels and identification signals can be evaluated
internally with subsequent switching between mono/
stereo/bilingual; no I
2
C interaction is necessary (Auto-
matic Sound Selection).
The ICs are produced in submicron CMOS technology
and are available in the following packages: PQFP80,
PLQFP64, and PSDIP64.
Fig. 11: Simplified functional block diagram of the MSP 44x8G
Sourc
e
Se
le
ct
SCART1
SCART2
SCART1
SCART2
SCART4
SCART3
MONO
Aux
Aux
I
2
S
Sound
Processing
Main
Sound
Processing
DAC
DAC
ADC
Main
DAC
DAC
ADC
I
2
S1
I
2
S2
Sound IF1
Sound IF2
Channel
Channel
I
2
S3
De-
modulator
DAC
Prescale
synchron.
I
2
S
Prescale
asychron.
I
2
S
Pre-
processing
SCART
DSP
Input
Select
SCART
Output
Select
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