MIK7108K
3.5 Digit Watch Circuit For
Duplexed LCD
January 2002
Features
Single chip CMOS construction
Drives 3.5 digit duplexes LCD
Low power dissipation (I
DD
: Max 1.5
A, 1.5 V operation)
Colon display
32,768 Hz Crystal controlled operation
Single 1.5 V battery operation
On-chip capacitive voltage doubler
Debounce circuitry on switch inputs
Protection against static discharge
Trimmer capacitor is use selectable (bonding option)
Functions
5 Function: Month, Date, Hour, Minute, Second
Selective alternation of time-date display mode
4 Year calendar
One touch correction of time error within 30 seconds
2-switch sequential operating
LCD test
Electrical Characteristics
(T
a
= 25
o
C, V
DD
= 0 V, V
SS
= -1.5 V; unless otherwise specified)
Parameter Symbol
Test
conditions
Min
Typ
Max
Units
Operating Voltage
V
SS
1.2
1.5
1.8
V
Supply Current
I
DD
Without Load, V
SS
=-1.5V
1.5
A
Input Low Voltage
V
IL
V
SS
V
SS
+0.3 V
Input High Voltage
V
IH
-0.3
0 V
Oscillator Start Voltage
V
OSC
Within 5 sec
1.45
V
DC-DC Conversion Frequency
F
CON
C
1
= C
2
= 0.1
F
512 Hz
LCD Frequency
FD
32
Hz
Quartz Crystal Parameters: Fp = 32768Hz, C
L
= 12.5pF, C
0
= 1.2pF, C
1
=3.0FF, R
s
= 35K
Application circuit
MIK7108K
Page 1 of 2
MIK7108K
3.5 Digit Watch Circuit For
Duplexed LCD
January 2002
LCD Format
Pad location MIK7108K
20
21
19
3
18
4
17
5
16
6
13
23
12
24
11
1
10
2
7
15
8
14
22
9
Chi p size: 1.28 mm x 1.2 mm
Pad size: 100 m x 100 m
Substrate to V or open
DD
25
MIK7108K
Y
X
0
Coordinates Coordinates
Coordinates
Pad
No
Pad
Name
X
m Y
m
Pad
No
Pad
Name
X
m Y
m
Pad
No
Pad
Name
X
m Y
m
1 B4/C4 146 311 10 F2/E2 1134 309 19 V
CM
516 1054
2 A4/G4 146 146 11 BC1/D2 1134 449 20 V
SS
376 1054
3 F4/E4 286 146 12 COM2 1134 589 21 T1 146 1054
4 B3/C3 426 146 13 OO 1134 729 22 S 146 871
5 AD3/G3 566 146 14 OI 1134 869 23 V
DD
146 731
6 F3/E3 706 146 15 T2 1134 1054 24 D 146 591
7 COL/D4 846 146 16 V
DD
965
1054
25
COM1
146
451
8 B2/C2 986 146 17 V
EE
796
1054
9 A2/G2 1134 146 18 V
CP
656
1054
Page 2 of 2
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