2-269

Features

Input impedance variants:

- 600

- 200

+ 680

// 0.1

- 200

+ 560

// 0.1

Operates with a wide range of battery voltages

Constant current battery feed with constant
voltage fallback for long loop drive capabilities

Overvoltage and short circuit protection

Off-hook detection and LED indicator drive

Dial pulse detection

Ring trip filter with auto ring trip

Ring relay driver plus three more uncommitted
relay drivers

Transformerless 2W to 4W conversion

A/D and D/A conversion

Conforms to A-Law PCM

Analog and digital loopback

Conforms to CCITT k.20 overvoltage surge
requirements with external primary protection
circuitry

Applications

Off premise digital PBX line cards

DID (Direct Inward Dial) line cards

PABX, Key Systems, Central Office Equipment

Description

The Mitel MH89625C SLIC (Subscriber Line
Interface Circuit) provides a complete interface
between an off-premise telephone line and a digital
switching system. All BORSCHT functions of Battery
Feed, Overvoltage Protection, Ringing Feed, Line
Supervision, Codec, 2-4 Wire Hybrid and Test are
provided requiring only a few external components.
The input impedance conforms with Chinese
standard requirements. The device is fabricated
using thick film hybrid technology which incorporates
various technologies for high voltage capability,
optimum circuit design and very high reliability.

Figure 1 - Functional Block Diagram

TIP

RING

RF2

RF1

VBat

LGND

LCA

VREF

DSTo

DSTi

CSTi

F1i

C2i

RD4

RD3

RD2

RD1

SHK

LED

Gain

Adjust

2w/4w

hybrid

Impedance

Matching

Relay

Driver 1

Relay

Driver 2

Relay

Driver 3

Relay

Driver 4

Line

Supervision

Ring

Trip

Filter

Tip

Drive

Current

& Voltage

Sensing

Ring

Drive

Constant
Current &

Voltage

Control

VREF

DSTo

DSTi

CSTi

F1i
CS

SD3

SD2

SD1

SD0

CODEC

ISSUE 4

May 1995

Ordering Information

MH89625C

600

MH89625C- 5

200

+ 680

// 0.1

MH89625C- 6

200

+ 560

// 0.1

40 Pin DIL Package

MH89625C

OPS/DID PCM SLIC

Preliminary Information

2-270

MH89625C

Preliminary Information

Figure 2 - Pin Connections

Pin Description

Pin #

Name

Description

TIP

Tip Lead. Connects to the "Tip" lead of the telephone line.

RING

Ring Lead. Connects to the "Ring" lead of the telephone line.

Internal Connection: This pin is internally connected.

RF1

Ring Feed 1: For OPS operation, connects to the external battery backed ringing
generator, see Figure 2.

RF2

Ring Feed 2: For OPS operation, connects to RING through a normally closed relay
contact (K1), see Figure 2.

Internal Connection. This pin is internally connected.

Negative Supply Voltage: (-5V)

SHK

Switch Hook Detect (Output): A logic low indicates an off-hook condition.

LED

LED Drive (Output): Drives an LED directly through an internal 2.2k

resistor. A logic

low indicates an off-hook condition.

CSTi

Control ST-BUS in (Input): A TTL compatible digital input used to control the function
of the filter/codec. Three modes of operation may be affected by applying to this input
logic high, logic low or an 8-bit serial word, depending on the logic states of CA and F1i.
Functions controlled are: power down, filter gain adjust, loopback, chip testing, and the
SD outputs which control the relay drivers, ring trip circuitry and impedance selection.

DSTi

Data ST-BUS in (Input): A TTL compatible digital input which accepts the 8-bit PCM
word from the incoming PCM bus.

C2i

Clock Input (Input): A TTL compatible digital input which accepts the 2048 kHz clock.

DSTo

Data ST-BUS Out (Output). A three stage TTL compatible digital output which drives
the 8-bit PCM word to the outgoing PCM bus.

F1i

Synchronization Input (Input): A TTL compatible active low digital input enabling (in
conjunction with CA) the PCM input, PCM output and digital control input. It is internally
sampled on every positive edge of the clock, C2i, and provides frame and channel
synchronization.

IC
IC
VBAT
LGND
GS
VAC
IC
LCA
VDD
AGND
IC
IC
IC
IC
IC
VREF
VRLY
RD4
RD3

RING

IC
IC
IC

RF1
RF2

VEE

SHK

LED

CSTi
DSTi

C2i

DSTo

F1i
CA

RGND

RD2
RD1

TIP

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

2-271

Preliminary Information

MH89625C

Control Address (Input): A three-level digital input which enables PCM input and
output, and determines into which control register (A or B) the serial data, presented to
CSTi, is stored.

RGND

Relay Ground: Return path for relay supply voltage.

RD2

Relay Driver 2: Connects to a user provided external relay coil. A logic high at the SD1
output of the internal MT8967 codec activates this driver. An internal clamp diode from
VRLY to RD2 is provided. This relay is typically used for DID reversals.

RD1

Relay Driver 1. Connects to a user provided external relay coil. A logic high at the SD0
output of the internal MT8967 codec activates this driver. An internal clamp diode from
VRLY to RD1 is provided. This relay is typically used for ringing.

RD3

Relay Driver 3. Connects to a user provided external relay coil. A logic high at the SD2
output of the internal MT8967 codec activates this driver. An internal clamp diode from
VRLY to RD3 is provided. This relay is typically used for in-test.

RD4

Relay Driver 4: Connects to a user provided external relay coil. A logic high at the SD3
output of the internal MT8967 codec activates this driver. An internal clamp diode from
VRLY to RD4 is provided. This relay is typically used for out-test.

RLY

Relay Positive Supply Voltage: Normally +5V. Connects to the relay coil and the relay
supply voltage.

Ref

Voltage Reference (Input): +2.50V for the internal codec.

Internal Connection: This pin is internally connected.

Internal Connection: This pin is internally connected

AGND

Analog Ground. Analog and Digital Ground. Connects to System Ground.

Positive Supply Voltage (+5V)

LCA

Loop Current Adjust (Input). The maximum constant loop current is a function of the
resistance connected from this pin to V

. Normally left open

Internal Connection. This pin is internally connected.

VAC

Battery AC Component (Input). AC noise present in the V

BAT

supply, isolated from the

DC component, can be applied to this pin to reduce longitudinal noise on TIP and RING.
To implement this feature, connect a 0.1

F 100V capacitor from V

BAT

to VAC, and a 1k

resistor from VAC to AGND. This pin must be tied to AGND when not used.

Gain Setting (Input). A logic low at this input adds an additional -0.5dB gain in the
receive direction (DSTi to Tip-Ring). This gain is in addition to the gain set by the Codec.
A logic high adds 0dB gain.

LGND

Loop Ground. Return path for the battery (V

BAT

) supply voltage. Connects to System

Ground.

Bat

Battery Supply Voltage. Normally -48V.

Internal Connection: This pin is internally connected

Pin Description (Continued)

Pin #

Name

Description

2-272

MH89625C

Preliminary Information

Functional Description

The Mitel MH89625C OPS SLIC (Off-Premise
Subscriber Line Interface Circuit) provides a
complete interface between an off-premise
telephone line and an digital switching system. All
BORSCHT functions are provided requiring only a
few external components. The input impedance
conforms with Chinese standard requirements.

All functions of the SLIC are controlled by the system
Drive (SD) outputs of the internal Mitel A-Law Codec
MT8967. The SD outputs are controlled by the serial
data input stream at CSTi.

The BORSCHT Functions

The MH89625C performs all of the BORSCHT
functions of Battery Feed, Overvoltage Protection,
Ringing, Supervision, Codec, Hybrid and Test.

Battery Feed

The MH89625C powers the telephone set with
constant DC loop current for short lines and
automatically reverts to constant voltage for long
lines. The constant loop current is a function of the
resistance connected from the LCA pin to V

EE.

Where I

Loop

is the desired constant loop current in mA,

and R is the resistance from pin LCA to pin V

ohms.

Overvoltage Protection

The MH89625C is protected from short term (20ms)
transients (+250V) between TIP and RING, TIP and
ground, and RING and ground. However, additional
protection circuitry may be needed depending on the
requirements which must be met. Normally simple
external shunt protection as shown in Figure 4 is all
that is required.

R (k

)

open

348k

200k

80k

50k

30k

Loop

(mA)

22.0

25.0

27.1

34.0

40.2

49.7

147.2 -I

Loop

(0.0001176 X I

Loop

) -0.002586

R =

Ringing

The ringing insertion circuit has the capability to
provide ringing voltage to a telephone set by simply
adding an external relay, ring generator and a
transient protector. The internal relay driver switches
ringing voltage onto the line via the external ring
relay. A clamp diode is included which suppresses
voltage transients during relay switching caused by
the relay coil. The serial data input at CSTi controls
the internal Codec's SDo output which activates the
ring driver. Refer to Table 1 for control of SLIC
functions.

Supervision

The loop detection circuit determines whether a low
enough resistance is across Tip and Ring to be
recognized as an off-hook condition. When an
off-hook condition occurs, the SHK and LED (the
LED output can drive an LED directly) outputs toggle
to a low level. These outputs also toggle with
incoming dial pulses.

During applied ringing (ring relay driver activated),
the loop detection circuit engages a ringing filter.
This filter prevents false off-hook detection due to
the current associated with the AC ringing voltage as
well as current transients that occur when the ringing
voltage is switched in and out. The ring trip detection
circuitry deactivates the ring relay driver after an
off-hook condition is detected.

Codec

The Codec function of the SLIC is implemented
using the Mitel MT8967 A-Law Codec. This device
provides the conversion interface between the
voiceband analog signals of a telephone subscriber
loop and the digital signals required in a digital PCM
(pulse code modulation) system. Eight-bit PCM
encoded digital data enters and leaves the chip
serially on DSTi and DSTo pins, respectively.

For detailed information on the CODEC portion of
the MH89625C, refer to the MT8967 integrated PCM
Filer/Codec data sheet (Microelectronics Digital
Communications Handbook, Mitel Semiconductor
Issue 9).

2-273

Preliminary Information

MH89625C

* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.

LGND is connected to AGND

LGND is connected to AGND.

Temperature coefficient of V

REF

should be better than 100ppm/C.

Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.

Absolute Maximum Ratings* -

All voltages are with respect to AGND unless otherwise specified.

Parameter

Symbol

Min

Max

Units

DC Supply Voltage

-0.3

0.3

-7

DC Battery Voltage

BAT

0.3

-65

DC Ring Relay Voltage

RLY

-0.3

DC Reference Voltage

REF

-0.3

AC Ring Generator Voltage

150

RMS

DC Digital Input Voltage

GS, CSTi

DSTi, C2i

F1i

-0.3

DC Digital (3-level) Input voltage

Storage Temperature

-40

+125

°C

Recommended Operating Conditions

Parameters

Sym

Min

Typ

Max

Units

Test Conditions

DC Supply Voltages

4.75

-4.75

5.0

-5.0

5.25

-5.25

V
V

DC Battery Voltage

BAT

-39.8

-48

-60

DC Ring Relay Voltage

RLY

5.0

DC Reference Voltage

REF

2.488

2.500

2.512

AC Ringing Generator
Voltage
Ringing Generator
Frequency

90
25

130

RMS

Operating Temperature

°C

2-274

MH89625C

Preliminary Information

DC Electrical Characteristics are over Recommended Operating Conditions with V

at +5.0V ± 5% and V

at -5.0V ±5% unless otherwise

stated.

Typical figures are at 25

C with nominal ± 5V supplies and are for design aid only.

Supply current and power consumption characteristics are over Recommended Operating Conditions with V

at 5.0V, V

at -5.0V

and V

BAT

at -48.0V

The LED output consists of a 2.2k

resistor in series with the SHK HCT output.

NOTE 1: Powerdown mode is activated through the CSTi input data stream. Refer to Table 2.

DC Electrical Characteristics

Characteristics

Sym

Min

Typ

Max

Units

Test Conditions

Supply and Battery Current

Short Loop

Open Loop

BAT

8.7
8.4

23.5

1.5

15
15
28

mA
mA
mA
mA

LCA = Open

Loop

= 0

Loop

= Open

Power Consumption

On-Hook (V

BAT

)

Powerdown (V

and V

)

Off-Hook (V

BAT

)

100
150

1500

mW
mW
mW

LCA = Open
R

Loop

=Open

Loop

= 0

REF

DC Reference Voltage
Mean Current

SHK

Low Level Output Voltage
High level Output Voltage

-0.3

3.7

0.5

5.25

V
V

= 2mA

LED

Low Level Output Voltage

High Level Output Voltage

2.0

3.0

V
V

= 1.1mA

= 0.7mA

RD1
RD2
RD3
RD4

Sink Current, Relay to V

Clamp Diode Current

100

mA
mA

= 1.0V

Low Level Input Voltage
High Level Input Voltage

2.0

0.8

V
V

Low Level Input Current
High Level Input Current

1
1

= 0V

= 5.0V

Low Level Input Voltage
Intermediate Input Voltage
High Level Input Voltage

0.0
2.4

-3.5

0.8

V
V
V

Low Level Input Current
High Level Input Current
High Level Input Current

10
10
10

= 5.0V

= 0.5V

= 5.0V

DSTo

Low Level Output Voltage
High Level Input Voltage
Tri-State Leakage Current

4.0

0.1

0.4

V
V

= 1.6mA

= 0.1mA

CSTi
DSTi

C2i

F1i

Low Level Input Voltage
High Level Input Voltage

2.4

0.8

V
V

Low Level Input Current
High Level Input Current

10
10

= 0V

= 5.0V

2-275

Preliminary Information

MH89625C

Loop Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.

Typical figures are at 25

C with nominal ±5V supplies and are for design aid only.

The SLIC can be loaded with an AC impedance as low as 4000

without generating a false SHK output. Since each REN

represents 8k

, the SLIC can drive a REN of 2 without generating a false SHK output.

This parameter is over Recommended Operating Conditions as well as the specified Operating Loop Resistance.

Off-Hook Detect (SHK) will be detected for loop lengths of 2900

or less.

AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.

Typical figures are at 25

C and are for design aid only.

Three impedance selections of Z

= 600

, Z

=200

+ 560 // 0.1

F, and Z

=200

+ 680 // 0.1

F are available.

Values apply for all three impedances selections; in all three cases Z

= Reference Impedance.

Note 1: All of the above test conditions use 200Hz to 3400 Hz unless otherwise stated.
Note 2: The transmit codec gain is set to 0dB, the receive codec gain is set to 0dB, and the receive gain adjustment is set to 0dB

(GS=5V), unless otherwise specified.

Note 3: With the transmit and receive gains set to 0dB; 0dBmO at the DSTi input will appear as 0dBm at the Tip-Ring output; 0dBm at

the Tip-Ring input will appear as 0dBmO at the DSTo output.

Note 4 All dBm is referenced to 600

Loop Electrical Characteristics

Characteristics

Sym

Min

Typ

Max

Units

Test Conditions

Maximum AC Ringing

Current Rejection

25Hz, V

BAT

= -48V

Ring Trip Detect Time

100

Hook Switch Detect Time:

Off-Hook to On-Hook
On-Hook to Off-Hook

20
20

ms
ms

Operating Loop Currents
Maximum Operating Loop Current

22
50

1850

LCA= Open
LCA= 30k to V

Operating Loop Resistance

0
0

2300

BAT

= -40V

BAT

=-48V

Loop Current at Off-Hook

Detect Threshold

AC Electrical Characteristics

Characteristics

Sym

Min

Typ

Max

Units

Test Conditions

2-wire Input Impedance

600R

(Magnitude) 560 Network
(Magnitude) 680 Network

600
720
813

1020 Hz

Return Loss at 2-Wire

14
18
14

23
24
35

dB
dB
dB

300 Hz
500-2000 Hz
3400 Hz

Longitudinal to Metallic
Balance

40
46

54
51

dB
dB

300-600 Hz
600-3400 Hz

Transhybrid Loss

16
20
16

52
41
52

dB
dB
dB

300 Hz
500-2500 Hz
3400 Hz

Power Supply Rejection Ratio
at 2-Wire and DSTo:

BAT

PSRR

20
20
20

40
30
40

dB
dB
dB

Ripple 50mV
1020 Hz

2-276

MH89625C

Preliminary Information

AC Gain Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.

Typical figures are at 25°C with nominal ± 5V supplies and are for design aid only.

Codec provides adjustment in 1 dB steps.

Note 1: With the transmit gain set to 0dB; 0dBm at the Tip-Ring input will appear as 0dBmO at the DSTo output.
Note 2: The transmit codec gain is set to 0dB unless otherwise specified.
Note 3: All dBm is referenced to 600

Note 4: Refer to table 2 for control of SLIC gain.
Note 5: Loss Distortion with Frequency is equivalent to the negative of Frequency Response Gain.

AC Electrical Characteristics

- Transmit (A/D) Path

Characteristics

Sym

Min

Typ

Max

Units

Test Conditions

Absolute Gain
Default (Codec 0dB)

-0.5

0.5

Input -6dBm
1020 Hz

Gain Programmable Range

1020 Hz

Loss Distortion with Frequency
(relative to level at 1020Hz
with codec at 0dB)

0.0

-0.3
-0.3
-0.3
-0.3
-0.3
-0.3

-
-

1.0

0.75
0.35
0.55

1.5

dB
dB
dB
dB
dB
dB
dB

0-200 Hz
200-300 Hz
300-400 Hz
400-600 Hz
600-2400 Hz
2400-3000 Hz
3000-3400 Hz

Gain Variation with Input Level
(relative to gain at 1020Hz with
-6dBm input)

-0.25
-0.25

-0.5
-1.5

0.25
0.25

0.5
1.5

dB
dB
dB
dB

Input 1020 Hz
0 to + 3dBm
-40 to 0dBm
-50 to -40dBm
-55 to-50dBm

Signal input Overload Level at
2-Wire

3.14

dBm

THD < 5%
Input 1020 Hz

Signal Output Overload Level at
DSTo

3.14

dBm0

THD < 5%
Input 1020 Hz

Signal to Total Distortion Ratio at
DSTo

33.8
28.8
19.5
14.5

dB
dB
dB
dB
dB

Input at 2-Wire
0 to -10dBm
-20dBm
-30dBm
-40dBm
-50dBm

Out-of-Band Discrimination at
DSTo:
Signals in 4.6 -72 kHz band
Signals in 300 -3400 Hz band
other than 1020Hz
Signals in 4.6 -72 kHz band

-50
-40

-25

dBm0
dBm0

dBm0

Input at 2-Wire

-25dBm, 4.6 -72kHz
0dB, 1020 Hz

0dBm, 300-3400 Hz

Harmonic Distortion
(2nd or 3rd Harmonic) at DSTo

-41

Idle Channel Noise at DSTo

-72

-64

dBm0p

2-277

Preliminary Information

MH89625C

AC Gain Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.

Typical figures are at 25

C with nominal ± 5V supplies and are for design aid only.

Codec provides adjustment in 1 dB steps

Note 1: With the transmit gain set it 0dB; 0dBm0 at the DSTi input will appear as 0dBm at the Tip-Ring output.
Note 2: The receive codec gain is set to 0dB; and the receive gain adjustment is set to 0dB (GS =5V), unless otherwise specified.
Note 3: All dBm is referenced to 600

Note 4: Refer to Table 2 for control of SLIC gain.
Note 5: Loss Distortion with Frequency is equivalent to the negative of Frequency Response Gain.

AC Electrical Characteristics

- Receive (D/A) Path

Characteristics

Sym

Min

Typ

Max

Units

Test Conditions

Absolute Gain
Default 1 (Codec 0dB, GS = 5V)
Default 2 (Codec 0dB, GS =oV)

-0.5
-1.0

0.0

-0.5

0.5
0.0

dB
dB

Input -10dBm0
1020 Hz
1020 Hz

Gain Programmable Range
GS = 5V

GS = 0V

-7

-7.5

-0

-0.5

dB
dB

Input -10dBm0
1020 Hz
1020 Hz

Loss Distortion with Frequency
(relative to level at 1020 Hz)
with Codec at 0dB and GS =5V)

-0.3
-0.3
-0.3
-0.3
-0.3
-0.3
-0.3

-
-

1.0

0.75
0.35
0.55

1.5

dB
dB
dB
dB
dB
dB
dB

Input -10dBm0
0-200 Hz
200-300 Hz
300-400 Hz
400-600 Hz
600-2400 Hz
2400-3000 Hz
3000-3400 Hz

Gain Variation with Input Level
(relative to gain to 1020 Hz with
-10dBm0 input)

-0.25
-0.25

-0.5
-1.5

0.25
0.25

0.5
1.5

dB
dB
dB
dB

Input 1020 Hz
0 to +3dBm
-40 to 0dBm
-50 to -40dBm
-55 to -50dBm

Signal Input Overload Level at DSTi

3.14

dBm

THD < 5%
Input 1020 Hz

Signal Output Overload Level at
2-Wire

3.14

dBm0

THD < 5%
Input 1020 Hz

Signal Output to Total
Distortion Ratio at 2-Wire

32.9
24.9
19.9

dB
dB
dB
dB

Input at 2-Wire
0 to -20dBm
-30dBm
-40dBm
-50dBm

Out-of-Band Discrimination at
2-wire

Signals in 4.6 -72kHz band

Signals in 300-3400 Hz band

other than 1020 Hz

Signals in 4.6 -72 kHz band

-50

-40

-25

dBm

Input at DSTi

-25dBm0, 4.6 -72 kHz

0dBm0, 1020 Hz

0dBm0, 300 -3400 Hz

Harmonic Distortion
(2nd or 3rd Harmonic) at 2-Wire

-41

Idle Channel Noise at
2-Wire

-73
-73

-67
-67

dBmp
dBmp

Gain Setting:
-3.5dB
-7dB

2-278

MH89625C

Preliminary Information

Table 2 - Modified Analog Gain* - Which when combined with CODEC gives 0dBm

* All with GS = High and A-Law CODEC (Mitel)

Table 1- Control of SLIC Functions through Codec 8 bit Register B

Bit

Codec Name

(SLIC Name)

Description

7, 6

CODEC
TESTING
CONTROL

Codec Testing Controls. Set bits to 0 for normal operation. For details of testing
functions, see the MT8967 integrated PCM Filter/Codec data sheet.

SD3
(RD4)

When logic `0', SD3 goes to the open state which deactivates the internal relay
driver 4, RD4 output goes to the open state.

SD2
(RD3)

When logic `0' SD2 goes to AGND which deactivates the internal relay driver 3,
RD3 output goes to the open state.

SD1
(RD2)

A logic `0', SD1 goes to AGND which deactivates the internal relay driver 2, RD2
output goes to the open state.
A logic `1', SD1 goes to V

which activates the internal relay driver 2, RD2 output

goes to RGND.

SD0
(RD1)

A logic `0', SD0 goes to AGND which deactivates the internal relay driver 1, RD1
output goes to the open state.
A logic `1', SD0 goes to V

which activates the internal driver 1, RD1 output goes

to RGND.

Variant

Input Impedance

Transmit (A/D)

Path

Receive (D/A)

Path

Units

MH89625C

600R

4.02

-4.02

MH89625C-5

200R + 680R // 0.1

2.72

-2.72

MH89625C-6

200R + 560R // 0.1

3.26

-3.26

2-279

Preliminary Information

MH89625C

Table 3- Control of SLIC Functions through GS and Codec 8 Bit Register

Note:

A transmit gain of 0dB indicates that an analog input signal of 0dBm at Tip-Ring will appear as 0dBmO at the DSTo output. A
receive gain of 0dB indicates that an input signal of 0dBmO will appear as 0dBm at the Tip-Ring output.

Bit 7

Bit 6

Special Function Control

Normal Operation

Digital Loopback

Analog Loopback

Powerdown

Bit 5

Bit 4

Bit 3

Receive (D/A) Gain (dB)

With GS =0

With GA = 1

-0.5

-1

-1.5

-2

-2.5

-3

-3.5

-4

-4.5

-5

-5.5

-6

-6.5

-7

-7.5

Bit 2

Bit 1

Bit 0

Transmit (A/D) Gain (dB)

2-280

MH89625C

Preliminary Information

Hybrid

The 2-4 Wire hybrid circuit separate the 2-wire
balanced full duplex signal at Tip and Ring of the
telephone line into 4-wire receive and transmit
ground referenced analog signals internal to the
SLIC. These analog signals are internally connected
to the MT8967 Filter/Codec which translates the
analog signals to digital PCM. The hybrid also
includes cancellation circuitry which prevents the
input PCM signal at DSTi from appearing at DSTo.
The degree to which the Hybrid minimizes the
contribution of the input signal at DSTi from
appearing at the DSTo output is specified as
transhybrid loss. See the Network Balance section
for maximizing transhybrid loss.

Return Loss

To maximize return loss, the impedance at Tip-Ring
should match the SLIC's input impedance (Z

Network Balance

Transhybrid loss is maximized when the line
termination impedance and the SLIC's network
balance are matched. The MH89625C's network
balance impedance is automatically internally set to
match the SLIC's input impedance (Z

). Therefore,

the SLIC's transhybrid loss is maximized when the
line termination impedance and the SLIC's input
impedance (Z

) are matched.

Tip-Ring Drive Circuit

The PCM input ground referenced signal at DSTi is
converted to a balanced output signal at Tip and
Ring. The Tip-Ring Drive Circuit is optimized for
good 2-wire longitudinal balance.

Tip-Ring Receive Gain

The differential audio signal at Tip and Ring is
converted to a ground referenced PCM signal at the
DSTo output.

Transmit Gain

Transmit Gain (Tip-Ring to DSTo) and Receive Gain
(DSTi to Tip-Ring) are programmed in 1dB steps by
writing to the Codec's Control Register A via the
CSTi serial data stream. In addition, a Receive Gain
adjustment is provided which when activated
provides an additional -0.5dB gain. Refer to control
of SLIC gain.

Short Circuit Protection

The MH89625C is protected from long term (infinite)
short circuit conditions occurring between Tip and
Ring, Tip and AGND, and Ring and AGND.

Protection Circuit Design

The high voltage protection circuit is the MH80625C
which can be used in conjunction with the
MH89625C to meet the CCITT K.20 specification.
See Figures 3 and 4. The protection circuit consists
of 1 MOSFET Transistor (BUZ 22) per 16 lines and 4
voltage clamping diodes (IN4004) per line circuit.
This protection circuit will dissipate the lightning and
AC power energy to protect the line circuit. The
Energy Dump Ground (EDG) is tied to the chassis of
the system ground. The PCB E.D.G. track to the
MOSFET must be run separately. The width of the
ground track should be greater than 0.050 thou and
the resistance should be kept as low as possible,
less than 1 ohm. The MOSFET requires a heat sink
of 9°C/W to dissipate the heat generated by the
overvoltages

Mechanical Data

See Figure 6.

2-281

Preliminary Information

MH89625C

Figure 3 - Typical Line Card Application

Tip

Ring

RF2

RF1

RD4

RD1

RD2

RD3

VRLY

VDD

VEE

AGND RGND

LCA

Bat

LGND

VAC

SHK

LED

DSTi

DSTo

C2i

CSTi

F1i

VREF

TOUT

ROUT

TIN

RIN

Test

Out

Test

Tip

Ring

K4A

K4B

K3A

K3B

K1B

K2B

K1A

K2A

to other

circuit

Heat sink 9

C/W

-48V

VRMS

25Hz

PTC

-48V

290V

TISP

-5V

K4 RELAY

K1 RELAY

K2 RELAY

K3 RELAY

+5V

-5V

Components

D1,D2,D3,D4 IN4004

Q1 = FET BUZ 22 or equivalent

R1 = 10k

+5% 1/4W

R2 = 1k

+ 5% 1/4W

C1 = 0.01

F + 10% 100V

PTC = 55

, 50mA

MH89625C

MH80625C

-48V

2-282

MH89625C

Preliminary Information

Figure 4 - 16 Lines Circuit Configuration

Figure 5 - Solid State External Protection Application Circuit

IN4004

TIP

RING

Heat Sink

C/w

10nF/100V

10K

-48V

E.D.G

TIP

RING

TOUT

ROUT

TOUT

ROUT

TIP1

RING1

LINE 1

MH80625C

MH89625C

MH80625C

MH89625C

TIP 16

RING 16

LINE 16

Energy Dump Ground (E.D.G)

Tip

Ring

To Tip and Ring

Telephone Line

Tip

Ring

To Tip and Ring

SLIC Circuitry

Notes

1) F1, 2

W 250V Slow Blow Fuse (Littlefuse 229.250 or 230.250).

2) R1, 2 5ohm 5% 1W Carbon Composition Resistor.

3) This protection circuit is available as a hybrid circuit with Mitel part number MH80625C.

MH80625C

Protection Circuit

2-283

Preliminary Information

MH89625C

Figure 6 - Mechanical Data

AAAA

AAA

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MH89625C

Notes:
1) Row pitch is to the centre of the pins.
2) All dimensions are typical and in inches (mm).
3) Not to scale.

0.10 + 0.01

(2.5 + 0.2)

0.180 (4.5)

0.020 + 0.002

(0.51 + 0.051)

0.08

(2.0)

2.0

(50.8)

0.20 + 0.01

(5.0 + 0.2)

1.30 +0.03
(33.0+0.8)

(7.8 +0.5)

0.30 +0.02

0.020 + 0.005

(0.51 + 0.13)

Note 1

AAAA

AAA

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