MITSUMI
System Reset PST573
System Reset
Monolithic IC PST573
Outline
This IC functions in a variety of CPU systems and other logic systems, to detect power supply voltage and
reset the system accurately when power is turned on or interrupted. This ultra-low current consumption high
reset type system reset IC was developed using high resistance process and low current circuit design
technology.
Features
1. Ultra-low current consumption
I
CCH
=450A typ. I
CCL
=1A typ.
2. Low operating limit voltage
0.65V typ.
3. Output current high for ON
-6mA typ.
4. Hysteresis voltage provided in detection voltage
50mV typ.
5. 10 ranks of detection voltage
PST573
C : 4.5V typ.
H : 3.1V typ.
D : 4.2V typ.
I : 2.9V typ.
E : 3.9V typ.
J : 2.7V typ.
F : 3.6V typ.
K : 2.5V typ.
G : 3.3V typ.
L : 2.3V typ.
Package
MMP-3A (PST573 M)
TO-92A (PST573 )
*
contains detection voltage rank .
Applications
1. Reset circuits in microcomputers, CPUs and MPUs.
2. Logic circuit reset circuits.
3. Battery voltage check circuits.
4. Back-up power supply switching circuits.
5. Level detection circuits.
Pin Assignment
1
2
3
TO-92A
1
V
CC
2
GND
3
V
OUT
3
1
2
MMP-3A
1
V
CC
2
GND
3
V
OUT
MITSUMI
System Reset PST573
Equivalent Circuit Diagram
Absolute Maximum Ratings
(Ta=25C)
Item
Symbol
Rating
Units
Storage temperature
T
STG
-40~+125
C
Operating temperature
T
OPR
-20~+75
C
Power supply voltage
V
CC
max.
-0.3~10
V
Allowable loss
Pd
200(MMP-3A)
mW
300(TO-92A)
Electrical Characteristics
(Ta=25C) (Except where noted otherwise, resistance unit is
)
Item
Symbol
Measurement
Measurement conditions
Min.
Typ.
Max.
Units
circuit
PST573C
4.3
4.5
4.7
PST573D
4.0
4.2
4.4
PST573E
3.7
3.9
4.1
R
L
=4.7k
PST573F
3.4
3.6
3.8
Detection voltage
V
S
1
V
OL
<
= V
CC
-0.4V
PST573G
3.1
3.3
3.5
V
V
CC
=H L
PST573H
2.9
3.1
3.3
PST573I
2.75
2.90
3.05
PST573J
2.55
2.70
2.85
PST573K
2.35
2.50
2.65
PST573L
2.15
2.30
2.45
Hysteresis voltage
V
S
1
R
L
=4.7k
25
50
100
mV
V
CC
=L H L
Detection voltage
R
L
=4.7k
V
S
/ T
1
0.01
%/C
temperature coefficient
Ta=-20C~+75C
High level output voltage
V
OH
1
V
CC
=V
S
min. -0.05V
V
CC
V
R
L
=4.7k
-0.4
Output leakage current
I
OH
1
V
CC
=7.5V
0.1
A
Circuit current while on
I
CCL
1
V
CC
=V
S
min. -0.05V
450
700
A
R
L
=
Circuit current while off
I
CCH
1
V
CC
=V
S
typ. /0.85V
1.0
1.8
A
R
L
=
"H"transport delay time
tpLH
2
R
L
=4.7k
*
1
25
60
S
C
L
=100pF
"L"transport delay time
tpHL
2
R
L
=4.7k
*
1
8
20
S
C
L
=100pF
Operation limit voltage
VopL
1
R
L
=4.7k
0.65
0.85
V
V
OL
>
= V
CC
-0.4V
Output current while on I
I
OL
I
1
V
CC
=V
S
min.-0.05V
-2.0
-6.0
mA
R
L
=0
Output current while on II
I
OL
II
1
Ta=-20C~+75C
*
2
-1.5
mA
R
L
=0
*
1 : tpLH : V
CC
=(V
S
typ.-0.4V) (V
S
typ.+0.4V), tpHL : V
CC
=(V
S
typ.+0.4V) (V
S
typ.-0.4V)
*
2 : V
CC
=V
S
min.-0.15V
MITSUMI
System Reset PST573
Measuring Circuit
[1]
[2]
INPUT PULSE
4.1V
4.9V
0V
0.8V
V
S
0V
4.9
4.1
Note: Input model is an example for PST573C.
Characteristics
(Example: PST573C)
V
CC
vs. V
OUT
V
CC
vs. I
CC
8
7
6
5
4
3
2
1
0
1
2
3
4
5
6
7
8
V
OUT
(V)
V
CC
(V)
Ta=-20
C
Ta=25
C
Ta=75
C
600
500
400
300
200
100
0
0
1
2
3
4
5
6
7
8
I
CC
(
A)
V
CC
(V)
Ta=-20
C
Ta=25
C
Ta=75
C
MITSUMI
System Reset PST573
V
S
vs. Ta
V
S
vs. Ta
-40
-20
0
20
40
60
80
4.47
4.48
4.49
4.50
4.51
4.52
4.53
V
S
(V)
Ta (
C)
V
S
(mV)
Ta (
C)
-40
-20
0
20
40
60
80
20
30
40
50
60
70
80
I
OL
vs. Ta
V
OH
vs. Ta
-8
-9
-7
-6
-5
-4
-3
-40
-20
0
20
40
60
80
I
O
L
(mA)
Ta (
C)
-40
-20
0
20
40
60
80
4.95
4.00
4.05
4.10
4.15
4.20
4.25
V
O
H
(V)
Ta (
C)
I
CCH
vs. Ta
I
CCL
vs. Ta
1.8
1.6
1.4
1.2
1.0
0.8
0.6
-40
-20
0
20
40
60
80
I
CC
H
(
A)
Ta (
C)
600
700
500
400
300
200
100
-40
-20
0
20
40
60
80
l
CCL
(
A)
Ta (
C)
C
L
(R
L
) vs.
t
PLH
Pd vs. Ta
V
S
(CPU)=0.7V
CC
10.0
7
5
3
2
1.0
7
5
3
2
0.1
0.01
7
5
3
2
2 3 4 5 7
C
L
(
F)
1
2 3 4 5 7
10
2 3 4 5 7
100
1000
T
PL
H
(mS)
R
L
=10k
R
L
=100k
R
L
=470k
300
200
0
0
25
50
75
100
125
100
Pd
(mW)
Ta (
C)
MITSUMI
System Reset PST573
Timing Chart
6
5
7
4
3
2
1
0
V
CC
/V
OUT
(V)
RESET
V
CC
V
OUT
V
S
V
S
(CPU)
Time
ON
OFF
Undefined
Application circuits
1. Normal hard reset
Delay time (tpLH)
.
=. C
L
R
L
ln
V
CC
-0.2
+0.025 (mS)
Vscpu
C
L
: F
R
L
: k
Vs cpu :
Reset threshold voltage of
CPU, MPU, etc.
Voltage: V
Note: Connect a capacitor between IC pins 1 and 2
if V
CC
line impedance is high.
[
]
2. Manual reset added
Note 1: Use R
L
, C
L
and Rm to prevent manual switch
chattering.
Note that Rm should be set to the following
conditions.
Rm <
= 1/20R
L
Note 2: Connect a capacitor between IC pins 1 and 2
if V
CC
line impedance is high.
3. Battery checker (LED ON for high voltage)
Note: Connect a capacitor between IC pins 1 and 2 if
V
CC
line impedance is high.
MITSUMI
System Reset PST573
4 Battery checker (LED ON for low voltage)
Note: Connect a capacitor between IC pins 1 and 2 if
V
CC
line impedance is high.
5. Hysteresis voltage UP method
When increasing hysteresis voltage for stable system
operation, determine RH as follows and connect
externally.
However, I
CCH
is -5000PPM/C, so perform
temperature compensation at RH when using over a
wide temperature range.
Hysteresis voltage UP amount ( Vsup) is
Vsup
.
=. RH I
CCL
Total hysteresis voltage ( Vstotal) is
Vstotal
.
=. Vs + Vsup
Note: Connect a capacitor between IC pins 1 and 2 if
V
CC
line impedance is high.
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