MC68HC908MR16/MC68HC908MR32 -- Rev. 5.0
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MOTOROLA
3
MC68HC908MR32
MC68HC908MR16
Technical Summary
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Motorola, Inc., 2001
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MC68HC908MR16/MC68HC908MR32 -- Rev. 5.0
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MOTOROLA
Revision History
To provide the most up-to-date information, the revision of our
documents on the World Wide Web will be the most current. Your printed
copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://www.motorola.com/semiconductors/
The following revision history table summarizes changes contained in
this document. For your convenience, the page number designators
have been linked to the appropriate location.
Revision History
Date
Revision
Level
Description
Page
Number(s)
August,
2001
3
Figure 2-1. Memory Map
-- Added FLASH Block Protect Register
(FLBPR) at address location $FF7E
41
Figure A-1. MC68HC908MR16 Memory Map
-- Added FLASH Block
Protect Register (FLBPR) at address location $FF7E
388
October,
2001
4
19.4.3 Conversion Time
-- Reworked equations and text for clarity.
346
December,
2001
5
Figure 10-1. Monitor Mode Circuit
-- PTA7 and connecting circuitry
added
187
Table 10-2. Monitor Mode Signal Requirements and Options
-- Switch
locations added to column headings for clarity
189
Section 11. Timer Interface A (TIMA)
-- Timer discrepancies corrected
throughout this section.
199
Section 12. Timer Interface B (TIMB)
-- Timer discrepancies corrected
throughout this section.
225
MC68HC908MR16/MC68HC908MR32 -- Rev. 5.0
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MOTOROLA
List of Sections
5
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List of Sections
Section 1. General Description . . . . . . . . . . . . . . . . . . . . 29
Section 2. Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Section 3. Random-Access Memory (RAM) . . . . . . . . . . 55
Section 4. FLASH Memory . . . . . . . . . . . . . . . . . . . . . . . . 57
Section 5. Configuration Register (CONFIG) . . . . . . . . . 67
Section 6. Central Processor Unit (CPU) . . . . . . . . . . . . 71
Section 7. System Integration Module (SIM) . . . . . . . . . 89
Section 8. Clock Generator Module (CGM) . . . . . . . . . . 109
Section 9. Pulse-Width Modulator
for Motor Control (PWMMC) . . . . . . . . . . . 135
Section 10. Monitor ROM (MON) . . . . . . . . . . . . . . . . . . 185
Section 11. Timer Interface A (TIMA). . . . . . . . . . . . . . . 199
Section 12. Timer Interface B (TIMB). . . . . . . . . . . . . . . 225
Section 13. Serial Peripheral Interface Module (SPI) . . 249
Section 14. Serial Communications Interface
Module (SCI) . . . . . . . . . . . . . . . . . . . . . . . . 279
Section 15. Input/Output (I/O) Ports . . . . . . . . . . . . . . . 309
Section 16. Computer Operating Properly (COP) . . . . 325
Section 17. External Interrupt (IRQ) . . . . . . . . . . . . . . . 331
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