MTV512M
8051 Embedded Monitor Controller 64K Flash Type
Myson Century, Inc.
No. 2, Industry East Rd. III,
Science-Based Industrial Park, Hsin-Chu, Taiwan
Tel: 886-3-578-4866 Fax: 886-3-578-4349
sales@myson.com.tw
www.myson.com.tw
Rev. 1.0 October, 2003
page 1 of 26
GENERAL DESCRIPTIONS
The MTV512M micro-controller is an 8051 CPU core
embedded device especially tailored for flat panel
display applications. It includes an 8051 CPU core,
768-byte SRAM, 4 channels of 6-bit ADC, 3 external
counters/timers, 6 channels of PWM DAC, VESA
DDC interface, and a 64K-byte internal program
Flash-ROM memory in 44-pin PLCC package.
FEATURES
8051 core, 12MHz operating frequency with
single/double CPU clock option
0.35um process; 3.3V power supply
768-byte RAM; 64K-byte program Flash memory
Maximum 6 channels of PWM DAC
Compliant with VESA DDC1/2B/2Bi/2B+ standard
Dual slave IIC addresses; two H/W auto transfer
DDC1/DDC2x data for both D-sub and DVI
interfaces
Watchdog timer with programmable interval
Support external counters/timers, 1 & 2
Single/double frequency clock output
Two external interrupts, INT1 is shared with Slave
IIC interrupt source.
Maximum 4 channels of 6-bit ADC
Flash-ROM code protection selection
44-pin PLCC package
BLOCK DIAGRAM
**This datasheet is the confidential information of
MYSON CENTURY, INC.
and is subject to various privileges
against unauthorized disclosure. Recipient shall not disclose this confidential information to any other person,
nor shall one use the confidential information for the purpose of competing with
MYSON CENTURY, INC.
P0.0-7
P2.0-3
RD
WR
ALE
INT1
8051
CORE
P1.0-7
P3.0-3.4
RST
X1
X2
ADC
AD0-3
PWM DAC
DA0-5
XFR
P0.0-7
P2.0-7
RD
WR
ALE
INT1
AUXRAM &
DDCRAM1 &
DDCRAM2
DDC & IIC
INTERFACE
HSCL1
HSDA1
HSCL2
HSDA2
P6.0-7
P5.0-6
AUX
I/O
P7.6-7
CKO
CONFIDENTIAL
PDF 
ZIP