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Электронный компонент: 100363F

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100363
Low Power Dual 8-Input Multiplexer
General Description
The 100363 is a dual 8-input multiplexer. The Data Select
(S
n
) inputs determine which bit (A
n
and B
n
) will be presented
at the outputs (Z
a
and Z
b
respectively). The same bit (07)
will be selected for both the Z
a
and Z
b
output. All inputs have
50 k
pulldown resistors.
Features
n
50% power reduction of the 100163
n
2000V ESD protection
n
Pin/function compatible with 100163
n
Voltage compensated operating range = -4.2V to -5.7V
n
Standard Microcircuit Drawing
(SMD) 5962-9165501
Logic Symbol
Pin Names
Description
S
0
S
2
Data Select Inputs
A
0
A
7
A Data Inputs
B
0
B
7
B Data Inputs
Z
a
, Z
b
Data Outputs
Connection Diagrams
DS100310-1
24-Pin Quad Cerpak
DS100310-3
24-Pin DIP
DS100310-2
August 1998
100363
Low
Power
Dual
8-Input
Multiplexer
1998 National Semiconductor Corporation
DS100310
www.national.com
Logic Diagram
DS100310-5
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2
Truth Table
Inputs
Outputs
Select
Data
S
2
S
1
S
0
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
Z
a
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
Z
b
L
L
L
L
L
L
L
L
H
H
L
L
H
L
L
L
L
H
H
H
L
H
L
L
L
L
H
L
H
H
L
H
H
L
L
L
H
H
H
H
H
L
L
L
L
H
L
L
H
H
H
L
H
L
L
H
L
H
H
H
H
H
L
L
L
H
H
L
H
H
H
H
H
L
L
H
H
H
H
H
H = HIGH Voltage Level
L = LOW Voltage Level
Blank = X = Don't Care
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3
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Above which the useful life may be impared
Storage Temperature (T
STG
)
-65C to +150C
Maximum Junction Temperature (T
J
)
Ceramic
+175C
V
EE
Pin Potential to Ground Pin
-7.0V to +0.5V
Input Voltage (DC)
V
EE
to + 0.5V
Output Current (DC Output HIGH)
-50 mA
ESD (Note 2)
2000V
Recommended Operating
Conditions
Case Temperature (T
C
)
Military
-55C to +125C
Supply Voltage (V
EE
)
-5.7V to -4.2V
Note 1: Absolute maximum ratings are those values beyond which the de-
vice may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Military Version
DC Electrical Characteristics
V
EE
= -4.2V to -5.7V, V
CC
= V
CCA
= GND, T
C
= -55C to +125C
Symbol
Parameter
Min
Max
Units
T
C
Conditions
Note
V
OH
Output HIGH Voltage
-1025
-870
mV
0C to
+125C
-1085
-870
mV
-55C
V
IN
= V
IH
(Max)
Loading with
(Notes 3, 4, 5)
V
OL
Output LOW Voltage
-1830
-1620
mV
0C to
or V
IL
(Min)
50
to -2.0V
+125C
-1830
-1555
mV
-55C
V
OHC
Output HIGH Voltage
-1035
mV
0C to
+125C
-1085
mV
-55C
V
IN
= V
IH
(Min)
Loading with
(Notes 3, 4, 5)
V
OLC
Output LOW Voltage
-1610
mV
0C to
or V
IL
(Max)
50
to -2.0V
+125C
-1555
mV
-55C
V
IH
Input HIGH Voltage
-1165
-870
mV
-55C to
Guaranteed HIGH Signal for All
Inputs
(Notes 3, 4, 5, 6)
+125C
V
IL
Input LOW Voltage
-1830
-1475
mV
-55C to
Guaranteed LOW Signal for All Inputs
(Notes 3, 4, 5, 6)
+125C
I
IL
Input LOW Current
0.50
A
-55C to
V
EE
= -4.2V
(Notes 3, 4, 5)
+125C
V
IN
= V
IL
(Min)
I
IH
Input HIGH Current
S
n
265
A
0C to
A
n
, B
n
340
+125C
V
EE
= -5.7V
(Notes 3, 4, 5)
S
n
385
A
-55C
V
IN
= V
IH
(Max)
A
n
, B
n
490
I
EE
Power Supply
Current
-87
-30
mA
-55C to
Inputs Open
(Notes 3, 4, 5)
+125C
Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides "cold start" specs which can be considered a worst case
condition at cold temperatures.
Note 4: Screen tested 100% on each device at -55C, +25C, and +125C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at -55C, +25C, and +125C, Subgroups A1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing V
OH
/V
OL
.
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4
AC Electrical Characteristics
V
EE
= -4.2V to -5.7V, V
CC
= V
CCA
= GND
Symbol
Parameter
T
C
= -55C
T
C
= +25C
T
C
=
+125C
Units
Conditions
Notes
Min
Max
Min
Max
Min
Max
t
PLH
Propagation Delay
0.50
2.40
0.60
2.30
0.70
3.00
ns
t
PHL
A
0
A
7
, B
0
B
7
to Output
(Notes 7, 8, 9)
t
PLH
Propagation Delay
0.80
3.00
0.90
2.80
0.80
3.40
ns
Figure 1 and
t
PHL
S
0
S
2
to Output
Figure 2
t
TLH
Transition Time
0.30
1.90
0.30
1.80
0.30
2.10
ns
(Note 10)
t
THL
20% to 80%, 80% to 20%
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals -55C), then testing immediately
after power-up. This provides "cold start" specs which can be considered a worst case condition at cold temperatures.
Note 8: Screen tested 100% on each device at +25C temperature only, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25C, Subgroup A9, and at +125C and -55C, temperatures, Subgroups A10 and A11.
Note 10: Not tested at +25C, +125C, and -55C temperature (design characterization data).
Test Circuitry
DS100310-6
Notes:
V
CC
, V
CCA
= +2V, V
EE
= -2.5V
L1 and L2 = equal length 50
impedance lines
R
T
= 50
terminator internal to scope
Decoupling 0.1 F from GND to V
CC
and V
EE
All unused outputs are loaded with 50
to GND
C
L
= Fixture and stray capacitance
3 pF
Pin numbers shown are for flatpak; for DIP see logic symbol
FIGURE 1. AC Test Circuit
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