TL D 10329
27C16
16384-Bit
(2048
x
8
)
U
V
Erasable
CMOS
PROM
Military
Qualified
January 1989
27C16
16 384-Bit (2048 x 8) UV Erasable CMOS PROM
Military Qualified
General Description
The 27C16 is a high speed 16K UV erasable and electrically
reprogrammable CMOS EPROM ideally suited for applica-
tions where fast turnaround pattern experimentation and
low power consumption are important requirements
The 27C16 is packaged in a 24-pin dual-in-line package with
transparent lid The transparent lid allows the user to ex-
pose the chip to ultraviolet light to erase the bit pattern A
new pattern can then be written into the device by following
the programming procedure
This EPROM is fabricated with the reliable high volume
time proven P
2
CMOS
TM
silicon gate technology
The 27C16 specified on this data sheet is fully compliant
with MIL-STD-883 Revision C
Features
Y
Access time down to 450 ns
Y
Low CMOS power consumption
Active Power 26 25 mW max
Standby Power 0 53 mW max (98% savings)
Y
Performance compatible to NSC800
TM
CMOS micro-
processor
Y
Single 5V power supply
Y
Pin compatible to MM2716 and higher density EPROMs
Y
Static
no clocks required
Y
TTL compatible inputs outputs
Y
TRI-STATE
output
Y
Windowed DIP Package
Y
Specifications guaranteed over full military temperature
range (
b
55 C to
a
125 C)
Block Diagram
TL D 10329 1
Pin Names
A0 A10
Addresses
CE
Chip Enable
OE
Output Enable
O
0
O
7
Outputs
PGM
Program
NC
No Connect
TRI-STATE
is a registered trademark of National Semiconductor Corporation
NS800
TM
are P
2
CMOS
TM
trademarks of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Connection Diagram
27C256
27C128
27C64
27C32
27256
27128
2764
2732
V
PP
V
PP
V
PP
A12
A12
A12
A7
A7
A7
A7
A6
A6
A6
A6
A5
A5
A5
A5
A4
A4
A4
A4
A3
A3
A3
A3
A2
A2
A2
A2
A1
A1
A1
A1
A0
A0
A0
A0
O
0
O
0
O
0
O
0
O
1
O
1
O
1
O
1
O
2
O
2
O
2
O
2
GND
GND
GND
GND
Dual-In-Line Package
27C16Q
TL D 10329 2
Top View
27C32
27C64
27C128
27256
2732
2764
27128
27256
V
CC
V
CC
V
CC
PGM
PGM
A14
V
CC
NC
A13
A13
A8
A8
A8
A8
A9
A9
A9
A9
A11
A11
A11
A11
OE V
PP
OE
OE
OE
A10
A10
A10
A10
CE
CE
CE
CE
O
7
O
7
O
7
O
7
O
6
O
6
O
6
O
6
O
5
O
5
O
5
O
5
O
4
O
4
O
4
O
4
O
3
O
3
O
3
O
3
Note
Socket compatible EPROM pin configurations are shown in the blocks adjacent to the 27C16 pins
Military Temp Range (
b
55 C to
a
125 C) V
CC
e
5V
g
10%
Parameter Order Number
Access Time (ns)
27C16Q450 883
450
27C16Q550 883
550
2
Absolute Maximum Ratings
(Note 1)
Temperature Under Bias
b
55 C to
a
125 C
Storage Temperature
b
65 C to
a
125 C
All Input Voltages with
Respect to Ground
a
6 5V to
b
0 3V
All Output Voltages with
Respect to Ground (Note 11) V
CC
a
0 3V to GND
b
0 3V
V
PP
Supply Voltage
with Respect to Ground
during Programming
a
26 5V to
b
0 3V
Power Dissipation
1 0W
Lead Temperature
(Soldering 10 Seconds)
300 C
Operating Conditions
(Note 9)
Temperature Range (T
case
)
b
55 C to
a
125 C
V
CC
Power Supply (Notes 2 and 3)
5V
a
10%
V
PP
Power Supply (Note 3)
V
CC
READ OPERATION
DC Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 4)
I
LI
Input Load Current
V
IN
e
V
CC
or V
IL
10
m
A
I
LO
Output Leakage Current
V
OUT
e
V
CC
or V
IL
CE
e
V
IH
10
m
A
I
CC1
V
CC
Current (Active)
OE
e
CE
e
V
IL
f
e
1 MHz
2
30
mA
(Note 3)
TTL Inputs
Inputs
e
V
IH
or V
IL
I O
e
0 mA
I
CC2
V
CC
Current (Active)
OE
e
CE
e
V
IL
f
e
1 MHz
1
25
mA
(Note 3)
CMOS Inputs
Inputs
e
V
CC
or GND I O
e
0 mA
I
CCSB1
V
CC
Current (Standby)
CE
e
V
IH
0 1
1
mA
TTL Inputs
I
CCSB2
V
CC
Current (Standby)
CE
e
V
CC
0 01
0 1
mA
CMOS Inputs
V
IL
Input Low Voltage
b
0 1
0 8
V
V
IH
Input High Voltage
2 2
V
CC
a
1
V
V
OL1
Output Low Voltage
I
OL
e
2 1 mA
0 45
V
V
OH1
Output High Voltage
I
OH
e b
400 mA
2 4
V
V
OL2
Output Low Voltage
I
OL
e
0 mA
0 1
V
V
OH2
Output High Voltage
I
OH
e
0 mA
4 4
V
AC Electrical Characteristics
27C16
Symbol
Parameter
Conditions
450
550
Units
Min
Max
Min
Max
t
ACC
Address to Output Delay
CE
e
OE
e
V
IL
450
550
ns
t
CE
CE to Output Delay
OE
e
V
IL
450
550
ns
t
OE
OE to Output Delay
CE
e
V
IL
120
120
ns
t
DF
OE High to Output Float
CE
e
V
IL
0
100
0
100
ns
t
OH
Output Hold from Addresses
CE
e
OE
e
V
IL
(Note 5)
CE or OE Whichever
0
0
ns
Occurred First
3
Capacitance
T
A
e a
25 C f
e
1 MHz (Note 5)
Symbol
Parameter
Conditions
Typ
Max
Units
C
IN
Input Capacitance
V
IN
e
0V
4
10
pF
C
OUT
Output Capacitance
V
OUT
e
0V
8
12
pF
AC Test Conditions
Output Load
1 TTL Gate and C
L
e
100 pF
Input Rise and Fall Times
s
20 ns
Input Pulse Levels
0 8V to 2 2V
Timing Measurement Reference Level
Inputs
1V and 2V
Outputs
0 8V and 2V
AC Waveforms
(Notes 2 8 9 10)
TL D 10329 3
Note 1
Stresses above those listed under ``Absolute Maximum Ratings'' may cause permanent damage to the device This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied Exposure to absolute
maximum rating conditions for extended periods may affect device reliability
Note 2
V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
Note 3
V
PP
may be connected to V
CC
except during programming I
CC1
s
the sum of the I
CC
active and I
PP
read currents
Note 4
Typical values are for T
A
e a
25 C and nominal supply voltages
Note 5
This parameter is only sampled and is not 100% tested
Note 6
OE may be delayed up to t
ACC
b
t
OE
after the falling edge of CE without impact on t
ACC
Note 7
The t
DF
compare level is determined as follows
High to TRI-STATE the measured V
OH1
(DC)
b
0 10V
Low to TRI-STATE the measured V
OL1
(DC)
a
0 10V
Note 8
TRI-STATE may be attained using OE or CE
Note 9
The power switching characteristics of EPROMs require careful device decoupling It is recommended that a 0 1 mF ceramic capacitor be used on every
device between V
CC
and GND
Note 10
The 27C16 requires one address transition after initial power-up to reset the outputs
Note 11
The outputs must be restricted to V
CC
a
0 3V to avoid latch-up and device damage
4
PROGRAMMING CHARACTERISTICS
(Note 1)
DC Programming Characteristics
(Notes 2
3)
(T
A
e a
25 C
g
5 C V
CC
e
5V
g
10% V
PP
e
25V
g
1V)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
I
LI
Input Current (for Any Input)
V
IN
e
V
CC
or GND
10
m
A
I
PP
V
PP
Supply Current during
CE PGM
e
V
IH
30
mA
Programming Pulse
I
CC
V
CC
Supply Current
10
mA
V
IL
Input Low Level
b
0 1
0 8
V
V
IH
Input High Level
2 0
V
CC
a
1
V
AC Programming Characteristics
(Notes 2
3)
(T
A
e a
25 C
g
5 C V
CC
e
5V
g
10% V
PP
e
25V
g
1V)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
AS
Address Setup Time
2
m
s
t
OES
OE Setup Time
2
m
S
t
DS
Data Setup Time
2
m
s
t
AH
Address Hold Time
2
m
s
t
OEH
OE Hold Time
2
m
s
t
DH
Data Hold Time
2
m
s
t
DF
Output Enable to Output Float Delay
CE PGM
e
V
IL
0
120
ns
t
OE
Output Enable to Output Delay
CE PGM
e
V
IL
100
ns
t
PW
Program Pulse Width
45
50
55
ms
t
PRT
Program Pulse Rise Time
5
ns
t
PFT
Program Pulse Fall Time
5
ns
AC Test Conditions
V
CC
5V
g
10%
V
PP
25V
g
1V
Input Rise and Fall Times
s
20 ns
Input Pulse Levels
0 8V to 2 2V
Timing Measurement Reference Level
Inputs
1V and 2V
Outputs
0 8V and 2V
5
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