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Электронный компонент: 54ABT16374

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54ABT16374
16-Bit D Flip-Flop with TRI-STATE
Outputs
General Description
The ABT16374 contains sixteen non-inverting D flip-flops
with TRI-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
Features
n
Separate control logic for each byte
n
16-bit version of the ABT374
n
Edge-triggered D-type inputs
n
Buffered Positive edge-triggered clock
n
High impedance glitch free bus loading during entire
power up and power down cycle
n
Non-destructive hot insertion capability
n
Guaranteed latch-up protection
n
Standard Microcircuit Drawing (SMD) 5962-9320101
Ordering Code:
Commercial
Package
Package Description
Number
54ABT16374W-QML
WA48A
48-Lead Cerpack
Connection Diagram
Logic Symbol
Pin Description
Pin
Description
Names
OE
n
TRI-STATE Output Enable Input (Active Low)
CP
n
Clock Pulse Input (Active Rising Edge)
D
0
D
15
Data Inputs
O
0
O
15
TRI-STATE Outputs
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
Pin Assignment for Cerpack
DS100224-2
DS100224-1
July 1998
54ABT16374
16-Bit
D
Flip-Flop
with
TRI-ST
A
T
E
Outputs
2004 National Semiconductor Corporation
DS100224
www.national.com
Functional Description
The ABT16374 consists of sixteen edge-triggered flip-flops
with individual D-type inputs and TRI-STATE true outputs.
The device is byte controlled with each byte functioning
identically, but independent of the other. The control pins can
be shorted together to obtain full 16-bit operation. Each byte
has a buffered clock and buffered Output Enable common to
all flip-flops within that byte. The description which follows
applies to each byte. Each flip-flop will store the state of their
individual D inputs that meet the setup and hold time require-
ments on the LOW-to-HIGH Clock (CP
n
) transition. With the
Output Enable (OE
n
) LOW, the contents of the flip-flops are
available at the outputs. When OE
n
is HIGH, the outputs go
to the high impedance state. Operation of the OE
n
input
does not affect the state of the flip-flops.
Truth Tables
Inputs
Outputs
CP
1
OE
1
D
0
D
7
O
0
O
7
N
L
H
H
N
L
L
L
L
L
X
(Previous)
X
H
X
Z
Inputs
Outputs
CP
2
OE
2
D
8
D
15
O
8
O
15
N
L
H
H
N
L
L
L
L
L
X
(Previous)
X
H
X
Z
H = High Voltage Level
L = Low Voltage Level
X = Immaterial
Z = High Impedance
Logic Diagrams
Byte 1 (0:7)
DS100224-3
Byte 2 (8:15)
DS100224-4
54ABT16374
www.national.com
2
Absolute Maximum Ratings
(Note 1)
Storage Temperature
-65C to +150C
Ambient Temperature under Bias
-55C to +125C
Junction Temperature under Bias
Ceramic
-55C to +175C
V
CC
Pin Potential to
Ground Pin
-0.5V to +7.0V
Input Voltage (Note 2)
-0.5V to +7.0V
Input Current (Note 2)
-30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State
-0.5V to 5.5V
in the HIGH State
-0.5V to V
CC
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
DC Latchup Source Current:
OE Pin
-350 mA
(Across Comm Operating Range)
Other Pins
-500 mA
Over Voltage Latchup (I/O)
10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
-55C to +125C
Supply Voltage
Military
+4.5V to +5.5V
Minimum Input Edge Rate
(
V/t)
Data Input
50 mV/ns
Enable Input
20 mV/ns
Clock Input
100mV/ns
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
ABT16374
Units
V
CC
Conditions
Min
Typ Max
V
IH
Input HIGH Voltage
2.0
V
Recognized HIGH Signal
V
IL
Input LOW Voltage
0.8
V
Recognized LOW Signal
V
CD
Input Clamp Diode Voltage
-1.2
V
Min
I
IN
= -18 mA
V
OH
Output HIGH Voltage
54ABT
2.5
V
Min
I
OH
= -3 mA
54ABT
2.0
V
Min
I
OH
= -24 mA
V
OL
Output LOW Voltage
54ABT
0.55
V
Min
I
OL
= 48 mA
I
IH
Input HIGH Current
5
A
Max
V
IN
= 2.7V (Note 4)
5
V
IN
= V
CC
I
BVI
Input HIGH Current Breakdown Test
7
A
Max
V
IN
= 7.0V
I
IL
Input LOW Current
-5
A
Max
V
IN
= 0.5V (Note 4)
-5
V
IN
= 0.0V
V
ID
Input Leakage Test
4.75
V
0.0
I
ID
= 1.9 A
All Other Pins Grounded
I
OZH
Output Leakage Current
50
A
0-5.5V
V
OUT
= 2.7V; OE = 2.0V
I
OZL
Output Leakage Current
-50
A
0-5.5V
V
OUT
= 0.5V; OE = 2.0V
I
OS
Output Short-Circuit Current
-100
-275
mA
Max
V
OUT
= 0.0V
I
CEX
Output High Leakage Current
50
A
Max
V
OUT
= V
CC
I
ZZ
Bus Drainage Test
100
A
0.0
V
OUT
= 5.5V; All Others V
CC
or GND
I
CCH
Power Supply Current
2.0
mA
Max
All Outputs HIGH
I
CCL
Power Supply Current
62
mA
Max
All Outputs LOW
I
CCZ
Power Supply Current
2.0
mA
Max
OE = V
CC
; All Others at V
CC
or GND
I
CCT
Additional I
CC
/Input
Outputs Enabled
2.5
mA
V
I
= V
CC
- 2.1V
Outputs TRI-STATE
2.5
mA
Max
Enable Input V
I
= V
CC
- 2.1V
Outputs TRI-STATE
2.5
mA
Data Input V
I
= V
CC
- 2.1V
All Others at V
CC
or GND
I
CCD
Dynamic I
CC
No Load
mA/
Max
Outputs Open
(Note 4)
0.30
MHz
OE = GND, (Note 3)
One Bit Toggling, 50% Duty Cycle
Note 3: For 8-bit toggling, I
CCD
<
0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
54ABT16374
www.national.com
3
DC Electrical Characteristics
Conditions
Symbol
Parameter
Min
Max
Units
V
CC
C
L
= 50 pF,
R
L
= 500
V
OLP
Quiet Output Maximum Dynamic V
OL
1.1
V
5.0
T
A
= 25C (Note 5)
V
OLV
Quiet Output Minimum Dynamic V
OL
-0.45
V
5.0
T
A
= 25C(Note 5)
Note 5: Max number of outputs defined as (n). n - 1 data inputs are driven 0V to 3V. One output at LOW.
AC Electrical Characteristics
Symbol
Parameter
54ABT
Units
T
A
= -55C to +125C
V
CC
= 4.5V to 5.5V
C
L
= 50 pF
Min
Max
f
max
Max Clock
150
MHz
Frequency
t
PLH
Propagation Delay
1.5
6.9
ns
t
PHL
CP to O
n
1.5
6.9
t
PZH
Output Enable Time
0.8
6.5
ns
t
PZL
1.2
6.5
t
PHZ
Output Disable Time
1.5
9.6
ns
t
PLZ
1.5
7.2
AC Operating Requirements
54ABT
T
A
= -55C to +125C
Symbol
Parameter
V
CC
= 4.5V to 5.5V
Units
C
L
= 50 pF
Min
Max
t
s
(H)
Setup Time, HIGH
1.3
ns
t
s
(L)
or LOW D
n
to CP
1.3
t
h
(H)
Hold Time, HIGH
1.5
ns
t
h
(L)
or LOW D
n
to CP
1.5
t
w
(H)
Pulse Width, CP
3.3
ns
t
w
(L)
HIGH or LOW
3.3
Capacitance
Symbol
Parameter
Typ
Units
Conditions (T
A
= 25C)
C
IN
Input Capacitance
5.0
pF
V
CC
= 0V
C
OUT
(Note 6)
Output Capacitance
11.0
pF
V
CC
= 5.0V
Note 6: C
OUT
is measured at frequency f = 1 MHz, per MIL-STD-883B, Method 3012.
54ABT16374
www.national.com
4
AC Loading
DS100224-6
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
DS100224-7
FIGURE 2. Propagation Delay Waveforms
for Inverting and Non-Inverting Functions
DS100224-8
FIGURE 3. Test Input Pulse Requirements
Amplitude
Rep Rate
t
W
t
r
t
f
3.0V
1 MHz
500 ns
2.5 ns
2.5 ns
FIGURE 4. Test Input Signal Requirements
DS100224-10
FIGURE 5. Propagation Delay,
Pulse Width Waveforms
DS100224-11
FIGURE 6. Setup Time, Hold Time
and Recovery Time Waveforms
DS100224-12
FIGURE 7. TRI-STATE Output HIGH
and LOW Enable and Disable Times
54ABT16374
www.national.com
5