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Электронный компонент: 74ACT164SCX

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TL F 11553
74ACT164
Serial-In
Parallel-Out
Shift
Register
November 1993
74ACT164
Serial-In Parallel-Out Shift Register
General Description
The 74ACT164 is a high-speed 8-bit serial-in parallel-out
shift register Serial data is entered through a 2-input AND
gate synchronous with the Low-to-High transition of the
clock The device features an asynchronous Master Reset
which clears the register setting all outputs Low indepen-
dent of the clock
Features
Y
Outputs source sink 24 mA
Y
'ACT has TTL-compatible inputs
Logic Symbol
TL F 11553 1
Pin Names
Description
A B
Data Inputs
CP
Clock Pulse Input (Active Rising Edge)
MR
Master Reset Input (Active Low)
Q
0
Q
7
Outputs
Connection Diagram
Pin Assignment
for SOIC
TL F 11553 2
FACT
TM
is a trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M75 Printed in U S A
Functional Description
The 74ACT164 is an edge-triggered 8-bit shift register with
serial data entry and an output from each of the eight
stages Data is entered serially through one of two inputs (A
or B) either of these inputs can be used as an active High
Enable for data entry through the other input An unused
input must be tied High
Each Low-to-High transition on the Clock (CP) input shifts
data one place to the right and enters into Q
0
the logical
AND of the two data inputs (A
B) that existed before the
rising clock edge A Low level on the Master Reset (MR)
input overrides all other inputs and clears the register asyn-
chronously forcing all Q outputs Low
Function Table
Operating
Inputs
Outputs
Mode
MR
A
B
Q
0
Q
1
Q
7
Reset (Clear)
L
X
X
L
L L
Shift
H
L
L
L
Q
0
Q
6
H
L
H
L
Q
0
Q
6
H
H
L
L
Q
0
Q
6
H
H
H
H
Q
0
Q
6
H
e
High Voltage Levels
L
e
Low Voltage Levels
X
e
Immaterial
Q
e
Lower case letters indicate the state of the referenced input or
output one setup time prior to the Low-to-High clock transition
Logic Diagram
TL F 11553 3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2
Absolute Maximum Ratings
(Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (V
CC
)
b
0 5V to
a
7 0V
DC Input Diode Current (I
IK
)
V
I
e b
0 5V
b
20 mA
V
I
e
V
CC
a
0 5V
a
20 mA
DC Input Voltage (V
I
)
b
0 5V to V
CC
a
0 5V
DC Output Diode Current (I
OK
)
V
O
e b
0 5V
b
20 mA
V
O
e
V
CC
a
0 5V
a
20 mA
DC Output Voltage (V
O
)
b
0 5V to V
CC
a
0 5V
DC Output Source
or Sink Current (I
O
)
g
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
g
50 mA
Storage Temperature (T
STG
)
b
65 C to
a
150 C
Junction Temperature (T
J
)
SOIC
140 C
Note 1
Absolute maximum ratings are values beyond which damage to the
device may occur The databook specifications should be met without ex-
ception to ensure that the system design is reliable over its power supply
temperature and output input loading variables National does not recom-
mend operation of FACT
TM
circuits outside databook specifications
Recommended Operating
Conditions
Supply Voltage (V
CC
)
'ACT
4 5V to 5 5V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
74ACT
b
40 C to
a
85 C
Minimum Input Edge Rate (DV Dt)
'ACT Devices
V
IN
from 0 8V to 2 0V
V
CC
4 5V 5 5V
125 mV ns
DC Characteristics for 'ACT Family Devices
Symbol
Parameter
V
CC
(V)
74ACT
74ACT
Units
Conditions
T
A
e a
25 C
T
A
e
b
40 C to
a
85 C
Typ
Guaranteed Limits
V
IH
Minimum High Level
4 5
1 5
2 0
2 0
V
V
OUT
e
0 1V
Input Voltage
5 5
1 5
2 0
2 0
or V
CC
b
0 1V
V
IL
Maximum Low Level
4 5
1 5
0 8
0 8
V
V
OUT
e
0 1V
Input Voltage
5 5
1 5
0 8
0 8
or V
CC
b
0 1V
V
OH
Minimum High Level
4 5
4 49
4 4
4 4
V
I
OUT
e b
50 mA
Output Voltage
5 5
5 49
5 4
5 4
V
IN
e
V
IL
or V
IH
4 5
3 86
3 76
V
I
OH
b
24 mA
5 5
4 86
4 76
b
24 mA
V
OL
Maximum Low Level
4 5
0 001
0 1
0 1
V
I
OUT
e
50 mA
Output Voltage
5 5
0 001
0 1
0 1
V
IN
e
V
IL
or V
IH
4 5
0 36
0 44
V
I
OL
24 mA
5 5
0 36
0 44
24 mA
I
IN
Maximum Input
5 5
g
0 1
g
1 0
m
A
V
I
e
V
CC
GND
Leakage Current
I
CCT
Maximum I
CC
Input
5 5
0 6
1 5
mA
V
I
e
V
CC
b
2 1V
I
OLD
Minimum Dynamic
5 5
75
mA
V
OLD
e
1 65V Max
I
OHD
Output Current
5 5
b
75
mA
V
OHD
e
3 85V Min
I
CC
Maximum Quiescent
5 5
4 0
40 0
m
A
V
IN
e
V
CC
Supply Current
or GND
All outputs loaded thresholds on input associated with output under test
Maximum test duration 2 0 ms one output loaded at a time
3
AC Electrical Characteristics
Symbol
Parameter
V
CC
(V)
74ACT
74ACT
Units
T
A
e a
25 C
T
A
e b
40 C
C
L
e
50 pF
to
a
85 C
C
L
e
50 pF
Min
Typ
Max
Min
Max
f
max
Maximum Clock
5 0
100
80
MHz
Frequency
t
PLH
Propagation Delay
5 0
1 0
6 0
11 5
1 0
12 5
ns
CP to Q
n
t
PHL
Propagation Delay
5 0
1 0
6 0
11 5
1 0
12 5
ns
CP to Q
n
t
PHL
Propagation Delay
5 0
1 0
6 0
13 0
1 0
14 5
ns
MR to Q
n
Voltage Range 5 0 is 5 0V
g
0 5V
AC Operating Requirements
Symbol
Parameter
V
CC
(V)
74ACT
74ACT
Units
T
A
e a
25 C
T
A
e b
40 C
C
L
e
50 pF
to
a
85 C
C
L
e
50 pF
Typ
Guaranteed Minimum
t
S
Set-Up Time HIGH or LOW
5 0
0 5
7 0
8 0
ns
A or B to CP
t
H
Hold Time HIGH or LOW
5 0
0 0
1 5
1 5
ns
CP to A or B
t
W
Pulse Width HIGH or LOW
5 0
0 5
7 0
8 0
ns
CP to MR
t
REC
Recovery Time
5 0
0 5
2 0
2 0
ns
MR to CP
Voltage Range 5 0 is 5 0V
g
0 5V
Capacitance
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4 5
pF
V
CC
e
OPEN
C
PD
Power Dissipation
45 0
pF
V
CC
e
5 0V
Capacitance
4
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows
74ACT
164
S
C
X
Temperature Range Family
Special Variations
74ACT
e
Commercial TTL-Compatible
X
e
Devices Shipped in 13 reels
Device Type
Temperature Range
C
e
Commercial (
b
40 C to
a
85 C)
Package Code
S
e
Small Outline Package (SOIC)
5
74ACT164
Serial-In
Parallel-Out
Shift
Register
Physical Dimensions
inches (millimeters)
14-Lead Small Outline Integrated Circuit (S)
NS Package Number M14A
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NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION As used herein
1 Life support devices or systems are devices or
2 A critical component is any component of a life
systems which (a) are intended for surgical implant
support device or system whose failure to perform can
into the body or (b) support or sustain life and whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system or to affect its safety or
with instructions for use provided in the labeling can
effectiveness
be reasonably expected to result in a significant injury
to the user
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