TL F 9493
54F74F189
64-Bit
Random
Access
Memory
with
TRI-STATE
Outputs
August 1995
54F 74F189 64-Bit Random Access
Memory with TRI-STATE
Outputs
General Description
The 'F189 is a high-speed 64-bit RAM organized as a 16-
word by 4-bit array Address inputs are buffered to minimize
loading and are fully decoded on-chip The outputs are TRI-
STATE and are in the high impedance state whenever the
Chip Select (CS) input is HIGH The outputs are active only
in the Read mode and the output data is the complement of
the stored data
Features
Y
TRI-STATE outputs for data bus applications
Y
Buffered inputs minimize loading
Y
Address decoding on-chip
Y
Diode clamped inputs minimize ringing
Y
Available in SOIC (300 mil only)
Commercial
Military
Package
Package Description
Number
74F189PC
N16E
16-Lead (0 300 Wide) Molded Dual-In-Line
54F189DL (Note 2)
J16A
16-Lead Ceramic Dual-In-Line
74F189SC (Note 1)
M16A
16-Lead (0 150 Wide) Molded Small Outline JEDEC
74F189SJ (Note 1)
M16D
16-Lead (0 300 Wide) Molded Small Outline EIAJ
54F189FL (Note 2)
W16A
16-Lead Cerpack
54F189LL (Note 2)
E20A
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1
Devices also available in 13
reel Use suffix
e
SCX and SJX
Note 2
Military grade device with environmental and burn-in processing Use suffix
e
DLQB FLQB and LLQB
Logic Symbols
Connection Diagrams
TL F 9493 1
IEEE IEC
TL F 9493 4
Pin Assignment
for DIP SOIC and Flatpak
TL F 9493 2
Pin Assignment
for LCC
TL F 9493 3
TRI-STATE
is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Unit Loading Fan Out
54F 74F
Pin Names
Description
U L
Input I
IH
I
IL
HIGH LOW
Output I
OH
I
OL
A
0
A
3
Address Inputs
1 0 1 0
20 mA
b
0 6 mA
CS
Chip Select Input (Active LOW)
1 0 1 0
20 mA
b
1 2 mA
WE
Write Enable Input (Active LOW)
1 0 1 0
20 mA
b
0 6 mA
D
0
D
3
Data Inputs
1 0 1 0
20 mA
b
0 6 mA
O
0
O
3
Inverted Data Outputs
150 40 (33 3)
b
3 0 mA 24 mA (20 mA)
Function Table
Inputs
Operation
Condition of Outputs
CS
WE
L
L
Write
High Impedance
L
H
Read
Complement of Stored Data
H
X
Inhibit
High Impedance
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Block Diagram
TL F 9493 5
2
Absolute Maximum Ratings
(Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Storage Temperature
b
65 C to
a
150 C
Ambient Temperature under Bias
b
55 C to
a
125 C
Junction Temperature under Bias
b
55 C to
a
175 C
Plastic
b
55 C to
a
150 C
V
CC
Pin Potential to
Ground Pin
b
0 5V to
a
7 0V
Input Voltage (Note 2)
b
0 5V to
a
7 0V
Input Current (Note 2)
b
30 mA to
a
5 0 mA
Voltage Applied to Output
in HIGH State (with V
CC
e
0V)
Standard Output
b
0 5V to V
CC
TRI-STATE Output
b
0 5V to
a
5 5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
Note 1
Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired Functional operation under
these conditions is not implied
Note 2
Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
b
55 C to
a
125 C
Commercial
0 C to
a
70 C
Supply Voltage
Military
a
4 5V to
a
5 5V
Commercial
a
4 5V to
a
5 5V
DC Electrical Characteristics
Symbol
Parameter
54F 74F
Units
V
CC
Conditions
Min
Typ
Max
V
IH
Input HIGH Voltage
2 0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0 8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
b
1 2
V
Min
I
IN
e b
18 mA
V
OH
Output HIGH
54F 10% V
CC
2 5
I
OH
e b
1 mA
Voltage
54F 10% V
CC
2 4
I
OH
e b
3 mA
74F 10% V
CC
2 5
V
Min
I
OH
e b
1 mA
74F 10% V
CC
2 4
I
OH
e b
3 mA
74F 5% V
CC
2 7
I
OH
e b
1 mA
74F 5% V
CC
2 7
I
OH
e b
3 mA
V
OL
Output LOW
54F 10% V
CC
0 5
V
Min
I
OL
e
20 mA
Voltage
74F 10% V
CC
0 5
I
OL
e
24 mA
I
IH
Input HIGH
54F
20 0
m
A
Max
V
IN
e
2 7V
Current
74F
5 0
I
BVI
Input HIGH Current
54F
100
m
A
Max
V
IN
e
7 0V
Breakdown Test
74F
7 0
I
CEX
Output HIGH
54F
250
m
A
Max
V
OUT
e
V
CC
Leakage Current
74F
50
V
ID
Input Leakage
74F
4 75
V
0 0
I
ID
e
1 9 mA
Test
All Other Pins Grounded
I
OD
Output Leakage
74F
3 75
m
A
0 0
V
IOD
e
150 mV
Circuit Current
All Other Pins Grounded
I
IL
Input LOW Current
b
0 6
mA
Max
V
IN
e
0 5V (except CS)
b
1 2
V
IN
e
0 5V (CS)
I
OZH
Output Leakage Current
50
m
A
Max
V
OUT
e
2 7V
I
OZL
Output Leakage Current
b
50
m
A
Max
V
OUT
e
0 5V
I
OS
Output Short-Circuit Current
b
60
b
150
mA
Max
V
OUT
e
0V
I
ZZ
Bus Drainage Test
500
m
A
0 0V
V
OUT
e
5 25V
I
CCZ
Power Supply Current
37
55
mA
Max
V
O
e
HIGH Z
3
AC Electrical Characteristics
74F
54F
74F
T
A
e a
25 C
T
A
V
CC
e
Mil
T
A
V
CC
e
Com
Symbol
Parameter
V
CC
e a
5 0V
C
L
e
50 pF
C
L
e
50 pF
Units
C
L
e
50 pF
Min
Typ
Max
Min
Max
Min
Max
t
PLH
Access Time HIGH or LOW
10 0
18 5
26 0
9 0
32 0
10 0
27 0
ns
t
PHL
A
n
to O
n
8 0
13 5
19 0
8 0
23 0
8 0
20 0
t
PZH
Access Time HIGH or LOW
3 5
6 0
8 5
3 5
10 5
3 5
9 5
ns
t
PZL
CS to O
n
5 0
9 0
13 0
5 0
15 0
5 0
14 0
t
PHZ
Disable Time HIGH or LOW
2 0
4 0
6 0
2 0
8 0
2 0
7 0
ns
t
PLZ
CS to O
n
3 0
5 5
8 0
2 5
10 0
3 0
9 0
t
PZH
Write Recovery Time
6 5
15 0
28 0
6 5
37 5
6 5
29 0
ns
t
PZL
HIGH or LOW WE to O
n
6 5
11 0
15 5
6 5
17 5
6 5
16 5
t
PHZ
Disable Time HIGH or LOW
4 0
7 0
10 0
3 5
12 0
4 0
11 0
ns
t
PLZ
WE to O
n
5 0
9 0
13 0
5 0
15 0
5 0
14 0
AC Operating Requirements
74F
54F
74F
Symbol
Parameter
T
A
e a
25 C
T
A
V
CC
e
Mil
T
A
V
CC
e
Com
Units
V
CC
e a
5 0V
Min
Max
Min
Max
Min
Max
t
s
(H)
Setup Time HIGH or LOW
0
0
0
t
s
(L)
A
n
to WE
0
0
0
t
h
(H)
Hold Time HIGH or LOW
2 0
2 0
2 0
ns
t
h
(L)
A
n
to WE
2 0
2 0
2 0
t
s
(H)
Setup Time HIGH or LOW
10 0
11 0
10 0
t
s
(L)
D
n
to WE
10 0
11 0
10 0
t
h
(H)
Hold Time HIGH or LOW
0
2 0
0
ns
t
h
(L)
D
n
to WE
0
2 0
0
t
s
(L)
Setup Time LOW
0
0
0
CS to WE
t
h
(L)
Hold Time LOW
6 0
7 5
6 0
ns
CS to WE
t
w
(L)
WE Pulse Width LOW
6 0
15 0
6 0
ns
T
A
e b
55 C to
a
125 C
4
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows
74F
189
S
C
X
Temperature Range Family
Special Variations
74F
e
Commercial
X
e
Devices shipped in 13 reels
54F
e
Military
QB
e
Military grade with environmental
and burn-in processing shipped
Device Type
in tubes
Package Code
Temperature Range
P
e
Plastic DIP
C
e
Commercial (0 C to
a
70 C)
D
e
Ceramic DIP
L
e
Military (
b
40 C to
a
125 C)
F
e
Flatpak
L
e
Leadless Ceramic Chip Carrier (LCC)
S
e
Small Outline SOIC JEDEC
SJ
e
Small Outline SOIC EIAJ
Physical Dimensions
inches (millimeters)
20-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
5
Physical Dimensions
inches (millimeters) (Continued)
16-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J16A
16-Lead (0 150 Wide) Molded Small Outline Package JEDEC (S)
NS Package Number M16A
6
Physical Dimensions
inches (millimeters) (Continued)
16-Lead (0 300 Wide) Molded Dual-In-Line Package (P)
NS Package Number N16E
16-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ)
NS Package Number M16D
7
54F74F189
64-Bit
Random
Access
Memory
with
TRI-STATE
Outputs
Physical Dimensions
inches (millimeters) (Continued)
16 Lead Ceramic Flatpak (F)
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION As used herein
1 Life support devices or systems are devices or
2 A critical component is any component of a life
systems which (a) are intended for surgical implant
support device or system whose failure to perform can
into the body or (b) support or sustain life and whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system or to affect its safety or
with instructions for use provided in the labeling can
effectiveness
be reasonably expected to result in a significant injury
to the user
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