TL F 9595
54F74F821
10-Bit
D-Type
Flip-Flop
December 1994
54F 74F821
10-Bit D-Type Flip-Flop
General Description
The 'F821 is a 10-bit D-type flip-flop with TRI-STATE
true
outputs arranged in a broadside pinout The 'F821 is func-
tionally and pin compatible with the AMD's Am29821
Features
Y
TRI-STATE Outputs
Y
Direct replacement for AMD's Am29821
Commercial
Military
Package
Package Description
Number
74F821SPC
N24C
24-Lead (0 300 Wide) Molded Dual-In-Line
54F821SDM (Note 2)
J24F
24-Lead (0 300 Wide) Ceramic Dual-In-Line
74F821SC (Note 1)
M24B
24-Lead (0 300 Wide) Molded Small Outline JEDEC
54F821FM (Note 2)
W24C
24-Lead Cerpack
54F821LM (Note 2)
E28A
24-Lead Ceramic Leadless Chip Carrier Type C
Note 1
Devices also available in 13
reel Use suffix
e
SCX
Note 2
Military grade device with environmental and burn-in processing Use suffix
e
SDMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
TL F 9595 1
IEEE IEC
TL F 9595 5
Pin Assignment
for DIP SOIC and Flatpak
TL F 9595 2
Pin Assignment
for LCC
TL F 9595 3
TRI-STATE
is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation
RRD-B30M75 Printed in U S A
Unit Loading Fan Out
54F 74F
Pin Names
Description
U L
Input I
IH
I
IL
HIGH LOW
Output I
OH
I
OL
D
0
D
9
Data Inputs
1 0 1 0
20 mA
b
0 6 mA
OE
Output Enable
1 0 1 0
20 mA
b
0 6 mA
TRI-STATE Input
CP
Clock Input
1 0 1 0
20 mA
b
0 6 mA
O
0
O
9
TRI-STATE Outputs
150 40 (33 3)
b
3 0 mA 24 mA (20 mA)
Functional Description
The 'F821 consists of ten D-type edge-triggered flip-flops
This device has TRI-STATE true outputs for bus systems
organized in a broadside pinning The buffered Clock (CP)
and buffered Output Enable (OE) are common to all flip-
flops The flip-flops will store the state of their individual D
inputs that meet the setup and hold times requirements on
the LOW-to-HIGH CP transition With the OE LOW the con-
tent of the flip-flops are available at the outputs When the
OE is HIGH the outputs go to the high impedance state
Operation of the OE input does not affect the state of the
flip-flops
Function Table
Inputs
Internal
Output
Function
OE
CP
D
Q
O
H
H
X
NC
Z
Hold
H
L
X
NC
Z
Hold
H
L
L
H
Z
Load
H
L H
L
Z
Load
L
L
L
H
L
Data Available
L
L H
L
H
Data Available
L
H
X
NC
NC
No Change in Data
L
L
X
NC
NC
No Change in Data
L
e
LOW Voltage Level
H
e
HIGH Voltage Level
X
e
Immaterial
Z
e
High Impedance
L
e
LOW-to-HIGH Transition
NC
e
No Change
Logic Diagram
TL F 9595 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2
Absolute Maximum Ratings
(Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Storage Temperature
b
65 C to
a
150 C
Ambient Temperature under Bias
b
55 C to
a
125 C
Junction Temperature under Bias
b
55 C to
a
175 C
Plastic
b
55 C to
a
150 C
V
CC
Pin Potential to
Ground Pin
b
0 5V to
a
7 0V
Input Voltage (Note 2)
b
0 5V to
a
7 0V
Input Current (Note 2)
b
30 mA to
a
5 0 mA
Voltage Applied to Output
in HIGH State (with V
CC
e
0V)
Standard Output
b
0 5V to V
CC
TRI-STATE Output
b
0 5V to
a
5 5V
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
Note 1
Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired Functional operation under
these conditions is not implied
Note 2
Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
b
55 C to
a
125 C
Commercial
0 C to
a
70 C
Supply Voltage
Military
a
4 5V to
a
5 5V
Commercial
a
4 5V to
a
5 5V
DC Electrical Characteristics
Symbol
Parameter
54F 74F
Units
V
CC
Conditions
Min
Typ
Max
V
IH
Input HIGH Voltage
2 0
V
Recognized as a HIGH Signal
V
IL
Input LOW Voltage
0 8
V
Recognized as a LOW Signal
V
CD
Input Clamp Diode Voltage
b
1 2
V
Min
I
IN
e b
18 mA
V
OH
Output HIGH
54F 10% V
CC
2 5
I
OH
e b
1 mA
Voltage
54F 10% V
CC
2 4
I
OH
e b
3 mA
74F 10% V
CC
2 5
V
Min
I
OH
e b
1 mA
74F 10% V
CC
2 4
I
OH
e b
3 mA
74F 5% V
CC
2 7
I
OH
e b
1 mA
74F 5% V
CC
2 7
I
OH
e b
3 mA
V
OL
Output LOW
54F 10% V
CC
0 5
V
Min
I
OL
e
20 mA
Voltage
74F 10% V
CC
0 5
I
OL
e
24 mA
I
IH
Input HIGH Current
54F
20 0
m
A
Max
V
IN
e
2 7V
74F
5 0
I
BVI
Input HIGH Current
54F
100
m
A
Max
V
IN
e
7 0V
Breakdown Test
74F
7 0
I
CEX
Output HIGH
54F
250
m
A
Max
V
OUT
e
V
CC
Leakage Current
74F
50
V
ID
Input Leakage Test
74F
4 75
V
0 0
I
ID
e
1 9 mA
All Other Pins Grounded
I
OD
Output Leakage
74F
3 75
m
A
0 0
V
IOD
e
150 mV
Circuit Current
All Other Pins Grounded
I
IL
Input LOW Current
b
0 6
mA
Max
V
IN
e
0 5V
I
OZH
Output Leakage Current
50
m
A
Max
V
OUT
e
2 7V
I
OZL
Output Leakage Current
b
50
m
A
Max
V
OUT
e
0 5V
I
OS
Output Short-Circuit Current
b
60
b
150
mA
Max
V
OUT
e
0V
I
CCZ
Power Supply Current
78
100
mA
Max
V
O
e
HIGH Z
3
AC Electrical Characteristics
74F
54F
74F
T
A
e a
25 C
T
A
V
CC
e
Mil
T
A
V
CC
e
Com
Symbol
Parameter
V
CC
e a
5 0V
C
L
e
50 pF
C
L
e
50 pF
Units
C
L
e
50 pF
Min
Typ
Max
Min
Max
Min
Max
f
max
Maximum Clock Frequency
100
150
60
70
MHz
t
PLH
Propagation Delay
2 0
6 4
9 5
2 0
10 5
2 0
10 5
ns
t
PHL
CP to O
n
2 0
6 2
9 5
2 0
10 5
2 0
10 5
t
PZH
Output Enable Time
2 0
5 8
10 5
2 0
13 0
2 0
11 5
t
PZL
OE to O
n
2 0
6 3
10 5
2 0
13 0
2 0
11 5
ns
t
PHZ
Output Disable Time
1 5
3 4
7 0
1 0
7 5
1 5
7 5
t
PLZ
OE to O
n
1 5
3 5
7 0
1 0
7 5
1 5
7 5
AC Operating Requirements
74F
54F
74F
Symbol
Parameter
T
A
e a
25 C
T
A
V
CC
e
Mil
T
A
V
CC
e
Com
Units
V
CC
e a
5 0V
Min
Max
Min
Max
Min
Max
t
s
(H)
Setup Time HIGH or LOW
2 5
4 0
3 0
t
s
(L)
D
n
to CP
2 5
4 0
3 0
ns
t
h
(H)
Hold Time HIGH or LOW
2 5
2 5
2 5
t
h
(L)
D
n
to CP
2 5
2 5
2 5
t
w
(H)
CP Pulse Width
5 0
6 0
6 0
ns
t
w
(L)
HIGH or LOW
5 0
6 0
6 0
4
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows
74F
821
S
C
X
Temperature Range Family
Special Variations
74F
e
Commercial FAST
QB
e
Military grade device with
54F
e
Military FAST
environmental and burn-in
processing
Device Type
X
e
Devices ship in 13 reel
Package Code
Temperature Range
SP
e
Slim Plastic DIP
C
e
Commercial (0 C to
a
70 C)
SD
e
Slim Ceramic DIP
M
e
Military (
b
55 C to
a
125 C)
F
e
Flatpak
L
e
Leadless Chip Carrier (LCC)
S
e
Small Outline (SOIC)
5
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