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Электронный компонент: 74LS42

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TL F 6365
54LS42DM54LS42DM74LS42
BCDDecimal
Decoders
June 1989
54LS42 DM54LS42 DM74LS42 BCD Decimal Decoders
General Description
These BCD-to-decimal decoders consist of eight inverters
and ten four-input NAND gates The inverters are connect-
ed in pairs to make BCD input data available for decoding
by the NAND gates Full decoding of input logic ensures
that all outputs remain off for all invalid (10 15) input condi-
tions
Features
Y
Diode clamped inputs
Y
Also for applications as 4-line-to-16-line decoders 3-
line-to-8-line decoders
Y
All outputs are high for invalid input conditions
Y
Alternate Military Aerospace device (54LS42) is avail-
able Contact a National Semiconductor Sales Office
Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL F 6365 1
Order Number 54LS42DMQB 54LS42FMQB
DM54LS42J DM54LS42W DM74LS42M or DM74LS42N
See NS Package Number J16A M16A N16E or W16A
Function Table
No
BCD Inputs
Decimal Outputs
D
C
B
A
0
1
2
3
4
5
6
7
8
9
0
L
L
L
L
L
H
H
H
H
H
H
H
H
H
1
L
L
L
H
H
L
H
H
H
H
H
H
H
H
2
L
L
H
L
H
H
L
H
H
H
H
H
H
H
3
L
L
H
H
H
H
H
L
H
H
H
H
H
H
4
L
H
L
L
H
H
H
H
L
H
H
H
H
H
5
L
H
L
H
H
H
H
H
H
L
H
H
H
H
6
L
H
H
L
H
H
H
H
H
H
L
H
H
H
7
L
H
H
H
H
H
H
H
H
H
H
L
H
H
8
H
L
L
L
H
H
H
H
H
H
H
H
L
H
9
H
L
L
H
H
H
H
H
H
H
H
H
H
L
I
H
L
H
L
H
H
H
H
H
H
H
H
H
H
N
H
L
H
H
H
H
H
H
H
H
H
H
H
H
V
H
H
L
L
H
H
H
H
H
H
H
H
H
H
A
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
I
H
H
H
H
H
H
H
H
H
H
H
H
H
H
D
H
e
High Level
L
e
Low Level
Logic Diagram
TL F 6365 2
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
DM54LS and 54LS
b
55 C to
a
125 C
DM74LS
0 C to
a
70 C
Storage Temperature Range
b
65 C to
a
150 C
Note
The ``Absolute Maximum Ratings'' are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ``Electrical Characteristics''
table are not guaranteed at the absolute maximum ratings
The ``Recommended Operating Conditions'' table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
DM54LS42
DM74LS42
Units
Min
Nom
Max
Min
Nom
Max
V
CC
Supply Voltage
4 5
5
5 5
4 75
5
5 25
V
V
IH
High Level Input Voltage
2
2
V
V
IL
Low Level Input Voltage
0 7
0 8
V
I
OH
High Level Output Current
b
0 4
b
0 4
mA
I
OL
Low Level Output Current
4
8
mA
T
A
Free Air Operating Temperature
b
55
125
0
70
C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
V
I
Input Clamp Voltage
V
CC
e
Min I
I
e b
18 mA
b
1 5
V
V
OH
High Level Output
V
CC
e
Min I
OH
e
Max
DM54
2 5
3 4
V
Voltage
V
IL
e
Max V
IH
e
Min
DM74
2 7
3 4
V
OL
Low Level Output
V
CC
e
Min I
OL
e
Max
DM54
0 25
0 4
Voltage
V
IL
e
Max V
IH
e
Min
DM74
0 35
0 5
V
I
OL
e
4 mA V
CC
e
Min
DM74
0 25
0 4
I
I
Input Current
Max
V
CC
e
Max V
I
e
7V
0 1
mA
Input Voltage
I
IH
High Level Input Current
V
CC
e
Max V
I
e
2 7V
20
m
A
I
IL
Low Level Input Current
V
CC
e
Max V
I
e
0 4V
b
0 4
mA
I
OS
Short Circuit
V
CC
e
Max
DM54
b
20
b
100
mA
Output Current
(Note 2)
DM74
b
20
b
100
I
CC
Supply Current
V
CC
e
Max (Note 3)
7
13
mA
Note 1
All typicals are at V
CC
e
5V T
A
e
25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3
I
CC
is measured with all outputs open and all inputs grounded
2
Switching Characteristics
at V
CC
e
5V and T
A
e
25 C (See Section 1 for Test Waveforms and Output Load)
From (Input)
R
L
e
2 kX
Symbol
Parameter
To (Output)
C
L
e
15 pF
C
L
e
50 pF
Units
Min
Max
Min
Max
t
PHL
Propagation Delay Time
A B C or D (2 Levels
25
30
ns
High to Low Level Output
of Logic) to Output
t
PHL
Propagation Delay Time
A B C or D (3 Levels
30
35
ns
High to Low Level Output
of Logic) to Output
t
PLH
Propagation Delay Time
A B C or D (2 Levels
25
30
ns
Low to High Level Output
of Logic) to Output
t
PLH
Propagation Delay Time
A B C or D (3 Levels
30
35
ns
Low to High Level Output
of Logic) to Output
3
Physical Dimensions
inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 54LS42DMQB or DM54LS42J
NS Package Number J16A
4
Physical Dimensions
inches (millimeters) (Continued)
16-Lead Small Outline Molded Package (M)
Order Number DM74LS42M
NS Package Number M16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS42N
NS Package Number N16E
5