TL F 10208
9308DM9308
Dual
4-Bit
Latch
June 1989
9308 DM9308 Dual 4-Bit Latch
General Description
The 9308 is a dual 4-bit D-type latch designed for general
purpose storage applications in digital systems Each latch
contains both an active LOW Master Reset input an active
LOW Enable inputs The 74116 is a pin for pin equivalent of
the 9308
Connection Diagram
Dual-In-Line Package
TL F 10208 1
Order Number 9308DMQB 9308FMQB or DM9308N
See NS Package Number J24A N24A or W24C
Logic Symbol
TL F 10208 2
V
CC
e
Pin 24
GND
e
Pin 12
Pin Names
Description
D
0a
D
3a
Parallel Latch Inputs
D
0b
D
3b
(
E
0a
E
1a
E
0b
E
1b
AND Enable Inputs (Active LOW)
MR
a
MR
b
Master Reset Inputs (Active LOW)
Q
0a
Q
3a
Parallel Latch Outputs
Q
0b
Q
3b
(
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Note)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
5 5V
Operating Free Air Temperature Range
MIL
b
55 C to
a
125 C
COM
0 C to
a
70 C
Storage Temperature Range
b
65 C to
a
150 C
Note
The ``Absolute Maximum Ratings'' are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ``Electrical Characteristics''
table are not guaranteed at the absolute maximum ratings
The ``Recommended Operating Conditions'' table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
Military
Commercial
Units
Min
Nom
Max
Min
Nom
Max
V
CC
Supply Voltage
4 5
5
5 5
4 75
5
5 25
V
V
IH
High Level Input
2
2
V
Voltage
V
IL
Low Level Input
0 8
0 8
V
Voltage
I
OH
High Level Output
b
0 8
b
0 8
mA
Current
I
OL
Low Level Output
16
16
mA
Current
T
A
Free Air Operating
b
55
125
0
70
C
Temperature
t
s
(H)
Setup Time HIGH D
n
to E
n
6
10
ns
t
h
(H)
Hold Time HIGH D
n
to E
n
4
b
2 0
ns
t
s
(L)
Setup Time LOW D
n
to E
n
10
12
ns
t
h
(L)
Hold Time LOW D
n
to E
n
4
8
ns
t
w
(L)
E
n
Pulse Width LOW
18
18
ns
t
w
(L)
MR Pulse Width LOW
18
18
ns
t
rec
Recovery Time MR to E
n
10
8
ns
Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
V
I
Input Clamp Voltage
V
CC
e
Min I
I
e b
18 mA
b
1 5
V
V
OH
High Level Output
V
CC
e
Min I
OH
e
Max
2 4
V
Voltage
V
IL
e
Max V
IH
e
Min
V
OL
Low Level Output
V
CC
e
Min I
OL
e
Max
0 4
V
Voltage
V
IH
e
Min V
IL
e
Max
I
I
Input Current
Max
V
CC
e
Max V
I
e
5 5V
1
mA
Input Voltage
I
IH
High Level Input
V
CC
e
Max V
I
e
2 4V
40
m
A
Current
I
IL
Low Level Input
V
CC
e
Max V
I
e
0 4V
b
1 6
mA
Current
I
OS
Short Circuit
V
CC
e
Max
MIL
b
20
b
70
mA
Output Current
(Note 2)
COM
b
20
b
57
I
CC
Supply Current
V
CC
e
Max (Note 3)
100
mA
Note 1
All typicals are at V
CC
e
5V T
A
e
25 C
Note 2
Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3
I
CC
is measured with all outputs open and all inputs grounded
2
Functional Description
Data can be entered into the latch when both of the enable
inputs are LOW As long as this logic condition exists the
output of the latch will follow the input If either of the enable
inputs goes HIGH the data present in the latch at that time
is held in the latch and is no longer affected by data input
The master reset overrides all other input conditions and
forces the outputs of all the latches LOW when a LOW sig-
nal is applied to the Master Reset input
Truth Table
MR
E0
E1
D
Qn
Operation
H
L
L
L
L
Data Entry
H
L
L
H
H
Data Entry
H
L
H
X
Qn
b
1
Hold
H
H
L
X
Qn
b
1
Hold
H
H
H
X
Qn
b
1
Hold
L
X
X
X
L
Reset
Q
n
b
1
e
Previous Output State
Q
n
e
Present Output State
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Logic Diagram
TL F 10208 3
Switching Characteristics
V
CC
e a
5 0V T
A
e a
25 C (See Section 5 for test waveforms and output load )
9308
Symbol
Parameter
C
L
e
15 pF
Units
R
L
e
400X
Min
Max
t
PLH
Propagation Delay
30
ns
t
PHL
En to Qn
22
t
PLH
Propagation Delay
15
ns
t
PHL
Dn to Qn
18
t
PHL
Propagation Delay
22
ns
MR to Qn
3
4
Physical Dimensions
inches (millimeters)
24-Lead Ceramic Dual-In-Line Package (J)
Order Number 9308DMQB
NS Package Number J24A
24-Lead Molded Dual-In-Line Package (N)
Order Number DM9308N
NS Package Number N24A
5
9308DM9308
Dual
4-Bit
Latch
Physical Dimensions
inches (millimeters) (Continued)
24-Lead Ceramic Flat Package (W)
Order Number 9308FMQB
NS Package Number W24C
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION As used herein
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support device or system whose failure to perform can
into the body or (b) support or sustain life and whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system or to affect its safety or
with instructions for use provided in the labeling can
effectiveness
be reasonably expected to result in a significant injury
to the user
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