ADC082S021
2 Channel, 200 KSPS, 8-Bit A/D Converter
General Description
The ADC082S021 is a low-power, two-channel CMOS 8-bit
analog-to-digital converter with a high-speed serial interface.
Unlike the conventional practice of specifying performance
at a single sample rate only, the ADC082S021 is fully speci-
fied over a sample rate range of 50 kSPS to 200 kSPS. The
converter is based on a successive-approximation register
architecture with an internal track-and-hold circuit. It can be
configured to accept one or two input signals at inputs IN1
and IN2.
The output serial data is straight binary, and is compatible
with several standards, such as SPI
TM
, QSPI
TM
, MICROW-
IRE, and many common DSP serial interfaces.
The ADC082S021 operates with a single supply that can
range from +2.7V to +5.25V. Normal power consumption
using a +3V or +5V supply is 1.6 mW and 5.8 mW, respec-
tively. The power-down feature reduces the power consump-
tion to just 0.12 W using a +3V supply, or 0.35 W using a
+5V supply.
The ADC082S021 is packaged in an 8-lead MSOP package.
Operation over the industrial temperature range of -40C to
+85C is guaranteed.
Features
n
Specified over a range of sample rates.
n
Two input channels
n
Variable power management
n
Single power supply with 2.7V - 5.25V range
Key Specifications
n
DNL
0.04 LSB (typ)
n
INL
0.04 LSB (typ)
n
SNR
49.6 dB (typ)
n
Power Consumption
-- 3V Supply
1.6 mW (typ)
-- 5V Supply
5.8 mW (typ)
Applications
n
Portable Systems
n
Remote Data Aquisitions
n
Instrumentation and Control Systems
Pin-Compatible Alternatives by Resolution and Speed
All devices are fully pin and function compatible.
Resolution
Specified for Sample Rate Range of:
50 to 200 kSPS
200 to 500 kSPS
500 kSPS to 1 MSPS
12-bit
ADC122S021
ADC122S051
ADC122S101
10-bit
ADC102S021
ADC102S051
ADC102S101
8-bit
ADC082S021
ADC082S051
ADC082S101
Connection Diagram
20124805
Ordering Information
Order Code
Temperature Range
Description
Top Mark
ADC082S021CIMM
-40C to +85C
8-Lead MSOP Package
X16C
ADC082S021CIMMX
-40C to +85C
8-Lead MSOP Package, Tape & Reel
X16C
ADC082S021EVAL
Evaluation Board
TRI-STATE
is a trademark of National Semiconductor Corporation
QSPI
TM
and SPI
TM
are trademarks of Motorola, Inc.
April 2005
ADC082S021
2
Channel,
200
KSPS,
8-Bit
A/D
Converter
2005 National Semiconductor Corporation
DS201248
www.national.com
Block Diagram
20124807
Pin Descriptions and Equivalent Circuits
Pin No.
Symbol
Description
ANALOG I/O
5,4
IN1 and IN2
Analog inputs. These signals can range from 0V to V
A
.
DIGITAL I/O
8
SCLK
Digital clock input. This clock directly controls the conversion
and readout processes.
7
DOUT
Digital data output. The output samples are clocked out of this
pin on falling edges of the SCLK pin.
6
DIN
Digital data input. The ADC082S021's Control Register is
loaded through this pin on rising edges of the SCLK pin.
1
CS
Chip select. On the falling edge of CS, a conversion process
begins. Conversions continue as long as CS is held low.
POWER SUPPLY
2
V
A
Positive supply pin. This pin should be connected to a quiet
+2.7V to +5.25V source and bypassed to GND with a 1 F
capacitor and a 0.1 F monolithic capacitor located within 1
cm of the power pin.
3
GND
The ground return for the analog supply and signals.
ADC082S021
www.national.com
2
Absolute Maximum Ratings
(Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Analog Supply Voltage V
A
-0.3V to 6.5V
Voltage on Any Pin to GND
-0.3V to V
A
+0.3V
Input Current at Any Pin (Note 3)
10 mA
Package Input Current (Note 3)
20 mA
Power Consumption at T
A
= 25C
See (Note 4)
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
2500V
250V
Junction Temperature
+150C
Storage Temperature
-65C to +150C
Operating Ratings
(Notes 1, 2)
Operating Temperature Range
-40C
T
A
+85C
V
A
Supply Voltage
+2.7V to +5.25V
Digital Input Pins Voltage Range
-0.3V to V
A
Clock Frequency
0.8 MHz to 3.2 MHz
Analog Input Voltage
0V to V
A
Package Thermal Resistance
Package
JA
8-lead MSOP
250C / W
Soldering process must comply with National Semiconduc-
tor's Reflow Temperature Profile specifications. Refer to
www.national.com/packaging.(Note 6)
ADC082S021 Converter Electrical Characteristics
(Note 9)
The following specifications apply for V
A
= +2.7V to 5.25V, GND = 0V, f
SCLK
= 0.8 MHz to 3.2 MHz,
f
SAMPLE
= 50 kSPS to 200 kSPS, C
L
= 50 pF, unless otherwise noted. Boldface limits apply for T
A
= T
MIN
to T
MAX
: all other
limits T
A
= 25C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
8
Bits
INL
Integral Non-Linearity
0.04
0.2
LSB (max)
DNL
Differential Non-Linearity
0.04
0.2
LSB (max)
V
OFF
Offset Error
+0.52
0.7
LSB (max)
OEM
Channel to Channel Offset Error
Match
0.01
0.3
LSB (max)
FSE
Full-Scale Error
+0.51
0.7
LSB (max)
FSEM
Channel to Channel Full-Scale Error
Match
+0.01
0.3
LSB (max)
DYNAMIC CONVERTER CHARACTERISTICS
SINAD
Signal-to-Noise Plus Distortion Ratio
V
A
= +2.7 to 5.25V
f
IN
= 39.9 kHz, -0.02 dBFS
49.6
49.1
dB (min)
SNR
Signal-to-Noise Ratio
V
A
= +2.7 to 5.25V
f
IN
= 39.9 kHz, -0.02 dBFS
49.6
49.2
dB (min)
THD
Total Harmonic Distortion
V
A
= +2.7 to 5.25V
f
IN
= 39.9 kHz, -0.02 dBFS
-76
-62
dB (max)
SFDR
Spurious-Free Dynamic Range
V
A
= +2.7 to 5.25V
f
IN
= 39.9 kHz, -0.02 dBFS
68
63
dB (min)
ENOB
Effective Number of Bits
V
A
= +2.7 to 5.25V
f
IN
= 39.9 kHz, -0.02 dBFS
7.9
7.9
Bits (min)
Channel-to-Channel Crosstalk
V
A
= +5.25V
f
IN
= 40.2 kHz
-73
dB
IMD
Intermodulation Distortion, Second
Order Terms
V
A
= +5.25V
f
a
= 40.161 kHz, f
b
= 41.015 kHz
-78
dB
Intermodulation Distortion, Third
Order Terms
V
A
= +5.25V
f
a
= 40.161 kHz, f
b
= 41.015 kHz
-73
dB
FPBW
-3 dB Full Power Bandwidth
V
A
= +5V
11
MHz
V
A
= +3V
8
MHz
ADC082S021
www.national.com
3
ADC082S021 Converter Electrical Characteristics
(Note 9) (Continued)
The following specifications apply for V
A
= +2.7V to 5.25V, GND = 0V, f
SCLK
= 0.8 MHz to 3.2 MHz,
f
SAMPLE
= 50 kSPS to 200 kSPS, C
L
= 50 pF, unless otherwise noted. Boldface limits apply for T
A
= T
MIN
to T
MAX
: all other
limits T
A
= 25C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
ANALOG INPUT CHARACTERISTICS
V
IN
Input Range
0 to V
A
V
I
DCL
DC Leakage Current
1
A (max)
C
INA
Input Capacitance
Track Mode
33
pF
Hold Mode
3
pF
DIGITAL INPUT CHARACTERISTICS
V
IH
Input High Voltage
V
A
= +5.25V
2.4
V (min)
V
A
= +3.6V
2.1
V (min)
V
IL
Input Low Voltage
0.8
V (max)
I
IN
Input Current
V
IN
= 0V or V
IN
= V
A
10
A (max)
C
IND
Digital Input Capacitance
2
4
pF (max)
DIGITAL OUTPUT CHARACTERISTICS
V
OH
Output High Voltage
I
SOURCE
= 200 A
V
A
- 0.03
V
A
- 0.5
V (min)
I
SOURCE
= 1 mA
V
A
- 0.1
V
OL
Output Low Voltage
I
SINK
= 200 A
0.03
0.4
V (max)
I
SINK
= 1 mA
0.1
I
OZH
,
I
OZL
TRI-STATE
Leakage Current
0.01
1
A (max)
C
OUT
TRI-STATE
Output Capacitance
2
4
pF (max)
Output Coding
Straight (Natural) Binary
POWER SUPPLY CHARACTERISTICS (C
L
= 10 pF)
V
A
Analog Supply Voltage
2.7
V (min)
5.25
V (max)
I
A
Supply Current, Normal Mode
(Operational, CS low)
V
A
= +5.25V,
f
SAMPLE
= 200 kSPS, f
IN
= 40 kHz
1.1
1.7
mA (max)
V
A
= +3.6V,
f
SAMPLE
= 200 kSPS, f
IN
= 40 kHz
0.45
0.8
mA (max)
Supply Current, Shutdown (CS high)
V
A
= +5.25V,
f
SAMPLE
= 0 kSPS
200
nA
V
A
= +3.6V,
f
SAMPLE
= 0 kSPS
200
nA
P
D
Power Consumption, Normal Mode
(Operational, CS low)
V
A
= +5.25V
5.8
8.9
mW (max)
V
A
= +3.6V
1.6
2.9
mW (max)
Power Consumption, Shutdown (CS
high)
V
A
= +5.25V
1.05
W
V
A
= +3.6V
0.72
W
AC ELECTRICAL CHARACTERISTICS
f
SCLK
Maximum Clock Frequency
(Note 8)
0.8
MHz (min)
3.2
MHz (max)
f
S
Sample Rate
(Note 8)
50
kSPS (min)
200
kSPS (max)
t
CONV
Conversion Time
13
SCLK cycles
DC
SCLK Duty Cycle
f
SCLK
= 3.2 MHz
50
30
% (min)
70
% (max)
t
ACQ
Track/Hold Acquisition Time
Full-Scale Step Input
3
SCLK cycles
Throughput Time
Acquisition Time + Conversion Time
16
SCLK cycles
ADC082S021
www.national.com
4
ADC082S021 Timing Specifications
The following specifications apply for V
A
= +2.7V to 5.25V, GND = 0V, f
SCLK
= 0.8 MHz to 3.2 MHz,
f
SAMPLE
= 50 kSPS to 200 kSPS, C
L
= 50 pF, Boldface limits apply for T
A
= T
MIN
to T
MAX
: all other limits T
A
= 25C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
t
CSU
Setup Time SCLK High to CS Falling Edge
(Note 10)
V
A
= +3.0V
-3.5
10
ns (min)
V
A
= +5.0V
-0.5
t
CLH
Hold time SCLK Low to CS Falling Edge
(Note 10)
V
A
= +3.0V
+4.5
10
ns (min)
V
A
= +5.0V
+1.5
t
EN
Delay from CS Until DOUT active
V
A
= +3.0V
+4
30
ns
(max)
V
A
= +5.0V
+2
t
ACC
Data Access Time after SCLK Falling Edge
V
A
= +3.0V
+16.5
30
ns
(max)
V
A
= +5.0V
+15
t
SU
Data Setup Time Prior to SCLK Rising Edge
+3
10
ns (min)
t
H
Data Valid SCLK Hold Time
+3
10
ns (min)
t
CH
SCLK High Pulse Width
0.5 x
t
SCLK
0.3 x
t
SCLK
ns (min)
t
CL
SCLK Low Pulse Width
0.5 x
t
SCLK
0.3 x
t
SCLK
ns (min)
t
DIS
CS Rising Edge to DOUT High-Impedance
Output Falling
V
A
= +3.0V
1.7
20
ns
(max)
V
A
= +5.0V
1.2
Output Rising
V
A
= +3.0V
1.0
V
A
= +5.0V
1.0
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supply (that is, V
IN
<
GND or V
IN
>
V
A
), the current at that pin should be limited to 10 mA. The 20
mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two. The Absolute
Maximum Rating specification does not apply to the V
A
pin. The current into the V
A
pin is limited by the Analog Supply Voltage specification.
Note 4: The absolute maximum junction temperature (T
J
max) for this device is 150C. The maximum allowable power dissipation is dictated by T
J
max, the
junction-to-ambient thermal resistance (
JA
), and the ambient temperature (T
A
), and can be calculated using the formula P
D
MAX = (T
J
max - T
A
)/
JA
. The values
for maximum power dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven
beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k
resistor. Machine model is 220 pF discharged through zero ohms
Note 6: Reflow temperature profiles are different for lead-free and non-lead-free packages.
Note 7: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 8: This is the frequency range over which the electrical performance is guaranteed. The device is functional over a wider range which is specified under
Operating Ratings.
Note 9: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: Clock may be in any state (high or low) when CS is asserted, with the restrictions on setup and hold time given by t
CSU
and t
CLH
.
ADC082S021
www.national.com
5
PDF 
ZIP