ADC78H90
8-Channel, 500 kSPS, 12-Bit A/D Converter
General Description
The ADC78H90 is a low-power, eight-channel CMOS 12-bit
analog-to-digital converter with a conversion throughput of
500 kSPS. The converter is based on a successive-
approximation register architecture with an internal track-
and-hold circuit. It can be configured to accept up to eight
input signals at inputs AIN1 through AIN8.
The output serial data is straight binary, and is compatible
with several standards, such as SPI
TM
, QSPI
TM
, MICROW-
IRE
TM
, and many common DSP serial interfaces.
The ADC78H90 may be operated with independent analog
and digital supplies. The analog supply (AV
DD
) can range
from +2.7V to +5.25V, and the digital supply (DV
DD
) can
range from +2.7V to AV
DD
. Normal power consumption using
a +3V or +5V supply is 1.5 mW and 8.3 mW, respectively.
The power-down feature reduces the power consumption to
just 0.3 W using a +3V supply, or 0.5 W using a +5V
supply.
The ADC78H90 is packaged in a 16-lead TSSOP package.
Operation over the industrial temperature range of -40C to
+85C is guaranteed.
Features
n
Eight input channels
n
Variable power management
n
Independent analog and digital supplies
n
SPI
TM
/QSPI
TM
/MICROWIRE
TM
/DSP compatible
n
Packaged in 16-lead TSSOP
Key Specifications
n
Conversion Rate
500 kSPS
n
DNL
1 LSB (max)
n
INL
1 LSB (max)
n
Power Consumption
-- 3V Supply
1.5 mW (typ)
-- 5V Supply
8.3 mW (typ)
Applications
n
Automotive Navigation
n
Portable Systems
n
Medical Instruments
n
Mobile Communications
n
Instrumentation and Control Systems
Connection Diagram
20079305
Ordering Information
Order Code
Temperature Range
Description
ADC78H90CIMT
-40C to +85C
16-Lead TSSOP Package
ADC78H90CIMTX
-40C to +85C
16-Lead TSSOP Package, Tape & Reel
ADC78H90EVAL
Evaluation Board
TRI-STATE
is a trademark of National Semiconductor Corporation.
MICROWIRE
TM
is a trademark of National Semiconductor Corporation.
QSPI
TM
and SPI
TM
are trademarks of Motorola, Inc.
March 2005
ADC78H90
8-Channel,
500
kSPS,
12-Bit
A/D
Converter
2005 National Semiconductor Corporation
DS200793
www.national.com
Block Diagram
20079307
Pin Descriptions and Equivalent Circuits
Pin No.
Symbol
Equivalent Circuit
Description
ANALOG I/O
4 - 11
AIN1 to AIN8
Analog inputs. These signals can range from 0V to AV
DD
.
DIGITAL I/O
16
SCLK
Digital clock input. The range of frequencies for this input is
50 kHz to 8 MHz, with guaranteed performance at 8 MHz.
This clock directly controls the conversion and readout
processes.
15
DOUT
Digital data output. The output samples are clocked out of this
pin on falling edges of the SCLK pin.
14
DIN
Digital data input. The ADC78H90's Control Register is
loaded through this pin on rising edges of the SCLK pin.
1
CS
Chip select. On the falling edge of CS, a conversion process
begins. Conversions continue as long as CS is held low.
POWER SUPPLY
2
AV
DD
Positive analog supply pin. This pin should be connected to a
quiet +2.7V to +5.25V source and bypassed to GND with a 1
F tantalum capacitor and a 0.1 F ceramic monolithic
capacitor located within 1 cm of the power pin.
13
DV
DD
Positive digital supply pin. This pin should be connected to a
+2.7V to AV
DD
supply, and bypassed to GND with a 0.1 F
ceramic monolithic capacitor located within 1 cm of the power
pin.
3
AGND
The ground return for the analog supply and signals.
12
DGND
The ground return for the digital supply and signals.
ADC78H90
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2
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Analog Supply Voltage AV
DD
-0.3V to 6.5V
Digital Supply Voltage DV
DD
-0.3V to AV
DD
+
0.3V, max 6.5V
Voltage on Any Pin to GND
-0.3V to AV
DD
+0.3V
Input Current at Any Pin (Note 3)
10 mA
Package Input Current(Note 3)
20 mA
Power Dissipation at T
A
= 25C
See (Note 4)
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
2500V
250V
Soldering Temperature, Infrared,
10 seconds (Note 6)
260C
Junction Temperature
+150C
Storage Temperature
-65C to +150C
Operating Ratings
(Notes 1, 2)
Operating Temperature Range
-40C
T
A
+85C
AV
DD
Supply Voltage
+2.7V to +5.25V
DV
DD
Supply Voltage
+2.7V to AV
DD
Digital Input Pins Voltage Range
-0.3V to AV
DD
Clock Frequency
50 kHz to 8 MHz
Analog Input Voltage
0V to AV
DD
Package Thermal Resistance
Package
JA
16-lead TSSOP on
4-layer, 2 oz. PCB
96C / W
ADC78H90 Converter Electrical Characteristics
(Note 8)
The following specifications apply for AV
DD
= DV
DD
= +2.7V to 5.25V, AGND = DGND = 0V, f
SCLK
= 8 MHz, f
SAMPLE
= 500
KSPS, unless otherwise noted. Boldface limits apply for T
A
= T
MIN
to T
MAX
: all other limits T
A
= 25C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
12
Bits
INL
Integral Non-Linearity
AV
DD
= +5.0V, DV
DD
= +3.0V
1
LSB (max)
DNL
Differential Non-Linearity
AV
DD
= +5.0V, DV
DD
= +3.0V
1
LSB (max)
V
OFF
Offset Error
AV
DD
= +5.0V, DV
DD
= +3.0V
2
LSB (max)
OEM
Offset Error Match
AV
DD
= +5.0V, DV
DD
= +3.0V
2
LSB (max)
GE
Gain Error
AV
DD
= +5.0V, DV
DD
= +3.0V
3
LSB (max)
GEM
Gain Error Match
AV
DD
= +5.0V, DV
DD
= +3.0V
3
LSB (max)
DYNAMIC CONVERTER CHARACTERISTICS
SINAD
Signal-to-Noise Plus Distortion Ratio
AV
DD
= +5.0V, DV
DD
= +3.0V,
f
IN
= 40.2 kHz, -0.02 dBFS
73
70
dB (min)
SNR
Signal-to-Noise Ratio
AV
DD
= +5.0V, DV
DD
= +3.0V,
f
IN
= 40.2 kHz, -0.02 dBFS
73
70.8
dB (min)
THD
Total Harmonic Distortion
AV
DD
= +5.0V, DV
DD
= +3.0V,
f
IN
= 40.2 kHz, -0.02 dBFS
-86
-74
dB (max)
SFDR
Spurious-Free Dynamic Range
AV
DD
= +5.0V, DV
DD
= +3.0V,
f
IN
= 40.2 kHz, -0.02 dBFS
88
75.6
dB (min)
ENOB
Effective Number of Bits
AV
DD
= +5.0V, DV
DD
= +3.0V,
11.8
11.3
Bits (min)
Channel-to-Channel Crosstalk
AV
DD
= +5.0V, DV
DD
= +3.0V,
f
IN
= 40.2 kHz
-82
dB
IMD
Intermodulation Distortion, Second
Order Terms
AV
DD
= +5.0V, DV
DD
= +3.0V,
f
a
= 40.161 kHz, f
b
= 41.015 kHz
-93
dB
Intermodulation Distortion, Third
Order Terms
AV
DD
= +5.0V, DV
DD
= +3.0V,
f
a
= 40.161 kHz, f
b
= 41.015 kHz
-90
dB
FPBW
-3 dB Full Power Bandwidth
AV
DD
= +5V
11
MHz
AV
DD
= +3V
8
MHz
ADC78H90
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3
ADC78H90 Converter Electrical Characteristics
(Note 8) (Continued)
The following specifications apply for AV
DD
= DV
DD
= +2.7V to 5.25V, AGND = DGND = 0V, f
SCLK
= 8 MHz, f
SAMPLE
= 500
KSPS, unless otherwise noted. Boldface limits apply for T
A
= T
MIN
to T
MAX
: all other limits T
A
= 25C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
ANALOG INPUT CHARACTERISTICS
V
IN
Input Range
0 to AV
DD
V
I
DCL
DC Leakage Current
1
A (max)
C
INA
Input Capacitance
Track Mode
33
pF
Hold Mode
3
pF
DIGITAL INPUT CHARACTERISTICS
V
IH
Input High Voltage
DV
DD
= +4.75Vto +5.25V
2.4
V (min)
DV
DD
= +2.7V to +3.6V
2.1
V (min)
V
IL
Input Low Voltage
DV
DD
= +2.7V to +5.25V
0.8
V (max)
I
IN
Input Current
V
IN
= 0V or DV
DD
0.01
1
A (max)
C
IND
Digital Input Capacitance
2
4
pF (max)
DIGITAL OUTPUT CHARACTERISTICS
V
OH
Output High Voltage
I
SOURCE
= 200 A, DV
DD
= +2.7V to
+5.25V
DV
DD
-0.5
V (min)
V
OL
Output Low Voltage
I
SINK
= 200 A
0.4
V (max)
I
OZH
,
I
OZL
TRI-STATE
Leakage Current
1
A (max)
C
OUT
TRI-STATE
Output Capacitance
2
4
pF (max)
Output Coding
Straight (Natural) Binary
POWER SUPPLY CHARACTERISTICS (C
L
= 10 pF)
AV
DD
,
DV
DD
Analog and Digital Supply Voltages
AV
DD
DV
DD
2.7
V (min)
5.25
V (max)
I
A
+ I
D
Total Supply Current, Normal Mode
(Operational, CS low)
AV
DD
= DV
DD
= +4.75V to +5.25V,
f
SAMPLE
= 500 kSPS, f
IN
= 40 kHz
1.65
2.3
mA (max)
AV
DD
= DV
DD
= +2.7V to +3.6V,
f
SAMPLE
= 500 kSPS, f
IN
= 40 kHz
0.5
2.3
mA (max)
Total Supply Current, Shutdown (CS
high)
AV
DD
= DV
DD
= +4.75V to +5.25V,
f
SAMPLE
= 0 kSPS
200
nA
AV
DD
= DV
DD
= +2.7V to +3.6V,
f
SAMPLE
= 0 kSPS
200
nA
P
D
Power Consumption, Normal Mode
(Operational, CS low)
\AV
DD
= DV
DD
= +4.75V to +5.25V
8.3
12
mW (max)
AV
DD
= DV
DD
= +2.7V to +3.6V
1.5
8.3
mW (max)
Power Consumption, Shutdown (CS
high)
AV
DD
= DV
DD
= +4.75V to +5.25V
0.5
W
AV
DD
= DV
DD
= +2.7V to +3.6V
0.3
W
AC ELECTRICAL CHARACTERISTICS
f
SCLK
Maximum Clock Frequency
8
MHz (min)
f
SMIN
Minimum Clock Frequency
50
kHz
f
S
Maximum Sample Rate
500
KSPS (min)
t
CONV
Conversion Time
13
SCLK cycles
DC
SCLK Duty Cycle
50
40
% (min)
60
% (max)
t
ACQ
Track/Hold Acquisition Time
Full-Scale Step Input
3
SCLK cycles
Throughput Time
Acquisition Time + Conversion Time
16
SCLK cycles
f
RATE
Throughput Rate
500
kSPS (min)
t
AD
Aperture Delay
4
ns
ADC78H90
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4
ADC78H90 Timing Specifications
The following specifications apply for AV
DD
= DV
DD
= +2.7V to 5.25V, AGND = DGND = 0V, f
SCLK
= 8 MHz, f
SAMPLE
= 500
KSPS, C
L
= 50 pF, Boldface limits apply for T
A
= T
MIN
to T
MAX
: all other limits T
A
= 25C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 7)
Units
t
1a
Setup Time SCLK High to CS
Falling Edge
(Note 9)
10
ns (min)
t
1b
Hold time SCLK Low to CS Falling
Edge
(Note 9)
10
ns (min)
t
2
Delay from CS Until DOUT active
30
ns (max)
t
3
Data Access Time after SCLK
Falling Edge
30
ns (max)
t
4
Data Setup Time Prior to SCLK
Rising Edge
10
ns (min)
t
5
Data Valid SCLK Hold Time
10
ns (min)
t
6
SCLK High Pulse Width
0.4 x
t
SCLK
ns (min)
t
7
SCLK Low Pulse Width
0.4 x
t
SCLK
ns (min)
t
8
CS Rising Edge to DOUT
High-Impedance
20
ns (max)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, V
IN
<
AGND or V
IN
>
V
A
or V
D
), the current at that pin should be limited to 10 mA.
The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two.
Note 4: The absolute maximum junction temperature (T
J
max) for this device is 150C. The maximum allowable power dissipation is dictated by T
J
max, the
junction-to-ambient thermal resistance (
JA
), and the ambient temperature (T
A
), and can be calculated using the formula P
D
MAX = (T
J
max - T
A
)/
JA
. In the 16-pin
TSSOP,
JA
is 96C/W, so P
D
MAX = 1,200 mW at 25C and 625 mW at the maximum operating ambient temperature of 85C. Note that the power consumption of
this device under normal operation is a maximum of 12 mW. The values for maximum power dissipation listed above will be reached only when the ADC78H90 is
operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously,
such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 k
resistor. Machine model is 220 pF discharged through ZERO ohms
Note 6: See AN450, "Surface Mounting Methods and Their Effect on Product Reliability", or the section entitled "Surface Mount" found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 8: Data sheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: Clock may be in any state (high or low) when CS is asserted, with the restrictions on setup and hold time given by t
1a
and t
1b
.
ADC78H90
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