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Электронный компонент: CD4042BM

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TL F 5966
CD4042BMCD4042BC
Quad
Clocked
D
Latch
March 1988
CD4042BM CD4042BC Quad Clocked D Latch
General Description
The CD4042BM CD4042BC quad clocked ``D'' latch is a
monolithic complementary MOS (CMOS) integrated circuit
constructed with P- and N-channel enhancement mode
transistors The outputs Q and Q either latch or follow the
data input depending on the clock level which is pro-
grammed by the polarity input For polarity
e
0 the informa-
tion present at the data input is transferred to Q and Q
during 0 clock level and for polarity
e
1 the transfer occurs
during the 1 clock level When a clock transition occurs
(positive for polarity
e
0 and negative for polarity
e
1) the
information present at the input during the clock transition is
retained at the outputs until an opposite clock transition oc-
curs
Features
Y
Wide supply voltage range
3 0V to 15V
Y
High noise immunity
0 45 V
DD
(typ )
Y
Low power TTL
Fan out of 2 driving 74L
compatibility
or 1 driving 74LS
Y
Clock polarity control
Y
Fully buffered data inputs
Y
Q and Q outputs
Connection Diagram
Dual-In-Line Package
TL F 5966 1
Top View
Truth Table
Clock
Polarity
Q
0
0
D
L
0
Latch
1
1
D
K
1
Latch
Order Number CD4042B
Logic Diagrams
TL F 5966 2
TL F 5966 3
TL F 5966 4
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Ratings
(Notes 1 and 2)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (V
DD
)
b
0 5V to
a
18V
Input Voltage (V
IN
)
b
0 5V to V
DD
a
0 5V
Storage Temperature Range (T
S
)
b
65 C to
a
150 C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260 C
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
DD
)
3V to 15V
Input Voltage (V
IN
)
0V to V
DD
Operating Temperature Range (T
A
)
CD4042BM
b
55 C to
a
125 C
CD4042BC
b
40 C to
a
85 C
DC Electrical Characteristics
CD4042BM (Note 2)
Symbol
Parameter
Conditions
b
55 C
a
25 C
a
125 C
Units
Min
Max
Min
Typ
Max
Min
Max
I
DD
Quiescent Device Current V
DD
e
5V
1
0 02
1
30
m
A
V
DD
e
10V
2
0 02
2
60
m
A
V
DD
e
15V
4
0 02
4
120
m
A
V
OL
Low Level Output Voltage
l
I
O
l
k
1 mA V
IH
e
V
DD
V
IL
e
0V
V
DD
e
5V
0 05
0
0 05
0 05
V
V
DD
e
10V
0 05
0
0 05
0 05
V
V
DD
e
15V
0 05
0
0 05
0 05
V
V
OH
High Level Output Voltage
l
I
O
l
k
1 mA V
IH
e
V
DD
V
IL
e
0V
V
DD
e
5V
4 95
4 95
5
4 95
V
V
DD
e
10V
9 95
9 95
10
9 95
V
V
DD
e
15V
14 95
14 95
15
14 95
V
V
IL
Low Level Input Voltage
l
I
O
l
k
1 mA
V
DD
e
5V V
O
e
0 5V or 4 5V
1 5
2 25
1 5
1 5
V
V
DD
e
10V V
O
e
1V or 9V
3 0
4 5
3 0
3 0
V
V
DD
e
15V V
O
e
1 5V or 13 5V
4 0
6 75
4 0
4 0
V
V
IH
High Level Input Voltage
l
I
O
l
k
1 mA
V
DD
e
5V V
O
e
0 5V or 4 5V
3 5
3 5
2 75
3 5
V
V
DD
e
10V V
O
e
1V or 9V
7 0
7 0
5 5
7 0
V
V
DD
e
15V V
O
e
1 5V or 13 5V
11 0
11 0
8 25
11 0
V
I
OL
Low Level Output Current
V
IH
e
V
DD
V
IL
e
0V
(Note 4)
V
DD
e
5V V
O
e
0 4V
0 64
0 51
0 88
0 36
mA
V
DD
e
10V V
O
e
0 5V
1 6
1 3
2 25
0 9
mA
V
DD
e
15V V
O
e
1 5V
4 2
3 4
8 8
2 4
mA
I
OH
High Level Output Current V
IH
e
V
DD
V
IL
e
0V
(Note 4)
V
DD
e
5V V
O
e
4 6V
b
0 64
b
0 51
b
0 88
b
0 36
mA
V
DD
e
10V V
O
e
9 5V
b
1 6
b
1 3
b
2 25
b
0 9
mA
V
DD
e
15V V
O
e
13 5V
b
4 2
b
3 4
b
8 8
b
2 4
mA
I
IN
Input Curent
V
DD
e
15V V
IN
e
0V
b
0 1
b
10
b
5
b
0 1
b
1 0
m
A
V
DD
e
15V V
IN
e
15V
0 1
10
b
5
0 1
1 0
m
A
Note 1
``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices
should be operated at these limits The tables of ``Recommended Operating Conditions'' and ``Electrical Characteristics'' provide conditions for actual device
operation
Note 2
V
SS
e
0V unless otherwise specified
Note 3
Being a latch the CD4042BM CD4042BC is not clock rise and fall time sensitive
Note 4
I
OH
and I
OL
are tested one output at a time
2
DC Electrical Characteristics
CD4042BC (Note 2)
Symbol
Parameter
Conditions
b
40 C
a
25 C
a
85 C
Units
Min
Max
Min
Typ
Max
Min
Max
I
DD
Quiescent Device Current V
DD
e
5V
4
0 02
4
30
m
A
V
DD
e
10V
8
0 02
8
60
m
A
V
DD
e
15V
16
0 02
16
120
m
A
V
OL
Low Level Output Voltage
l
I
O
l
k
1 mA V
IH
e
V
DD
V
IL
e
0V
V
DD
e
5V
0 05
0
0 05
0 05
V
V
DD
e
10V
0 05
0
0 05
0 05
V
V
DD
e
15V
0 05
0
0 05
0 05
V
V
OH
High Level Output Voltage
l
I
O
l
k
1 mA V
IH
e
V
DD
V
IL
e
0V
V
DD
e
5V
4 95
4 95
5
4 95
V
V
DD
e
10V
9 95
9 95
10
9 95
V
V
DD
e
15V
14 95
14 95
15
14 95
V
V
IL
Low Level Input Voltage
l
I
O
l
k
1 mA
V
DD
e
5V V
O
e
0 5V or 4 5V
1 5
2 25
1 5
1 5
V
V
DD
e
10V V
O
e
1V or 9V
3 0
4 5
3 0
3 0
V
V
DD
e
15V V
O
e
1 5V or 13 5V
4 0
6 75
4 0
4 0
V
V
IH
High Level Input Voltage
l
I
O
l
k
1 mA
V
DD
e
5V V
O
e
0 5V or 4 5V
3 5
3 5
2 75
3 5
V
V
DD
e
10V V
O
e
1V or 9V
7 0
7 0
5 5
7 0
V
V
DD
e
15V V
O
e
1 5V or 13 5V
11 0
11 0
8 25
11 0
V
I
OL
Low Level Output Current
V
IH
e
V
DD
V
IL
e
0V
(Note 4)
V
DD
e
5V V
O
e
0 4V
0 52
0 44
0 88
0 36
mA
V
DD
e
10V V
O
e
0 5V
1 3
1 1
2 25
0 9
mA
V
DD
e
15V V
O
e
1 5V
3 6
3 0
8 8
2 4
mA
I
OH
High Level Output Current V
IH
e
V
DD
V
IL
e
0V
(Note 4)
V
DD
e
5V V
O
e
4 6V
b
0 52
b
0 44
b
0 88
b
0 36
mA
V
DD
e
10V V
O
e
9 5V
b
1 3
b
1 1
b
2 25
b
0 9
mA
V
DD
e
15V V
O
e
13 5V
b
3 6
b
3 0
b
8 8
b
2 4
mA
I
IN
Input Curent
V
DD
e
15V V
IN
e
0V
b
0 3
b
10
b
5
b
0 3
b
1 0
m
A
V
DD
e
15V V
IN
e
15V
0 3
10
b
5
0 3
1 0
m
A
Note 1
``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices
should be operated at these limits The tables of ``Recommended Operating Conditions'' and ``Electrical Characteristics'' provide conditions for actual device
operation
Note 2
V
SS
e
0V unless otherwise specified
Note 3
Being a latch the CD4042BM CD4042BC is not clock rise and fall time sensitive
Note 4
I
OH
and I
OL
are tested one output at a time
3
AC Electrical Characteristics
T
A
e
25 C C
L
e
50 pF R
L
e
200k Input t
r
e
t
f
e
20 ns unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PHL
t
PLH
Propagation Delay Time Data In to Q
V
DD
e
5V
175
350
ns
V
DD
e
10V
75
150
ns
V
DD
e
15V
60
120
ns
t
PHL
t
PLH
Propagation Delay Time Data In to Q
V
DD
e
5V
150
300
ns
V
DD
e
10V
75
150
ns
V
DD
e
15V
50
100
ns
t
PHL
t
PLH
Propagation Delay Time Clock to Q
V
DD
e
5V
250
500
ns
V
DD
e
10V
100
200
ns
V
DD
e
15V
80
160
ns
t
PHL
t
PLH
Propagation Delay Time Clock to Q
V
DD
e
5V
250
500
ns
V
DD
e
10V
115
230
ns
V
DD
e
15V
90
180
ns
t
H
Minimum Hold Time
V
DD
e
5V
60
120
ns
V
DD
e
10V
30
60
ns
V
DD
e
15V
25
50
ns
t
SU
Minimum Setup Time
V
DD
e
5V
0
50
ns
V
DD
e
10V
0
30
ns
V
DD
e
15V
0
25
ns
t
W
Minimum Clock Pulse Width
V
DD
e
5V
100
200
ns
V
DD
e
10V
50
100
ns
V
DD
e
15V
30
60
ns
t
THL
t
TLH
Transition Time
V
DD
e
5V
125
250
ns
V
DD
e
10V
60
125
ns
V
DD
e
15V
50
100
ns
C
IN
Input Capacitance
Any Input
5 0
7 5
pF
AC Parameters are guaranteed by DC correlated testing
Note 1
``Absolute Maximum Ratings'' are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the
devices should be operated at these limits The tables of ``Recommended Operating Conditions'' and ``Electrical Characteristics'' provide conditions for actual
device operation
Note 2
V
SS
e
0V unless otherwise specified
Note 3
Being a latch the CD4042BM CD4042BC is not clock rise and fall time sensitive
Note 4
I
OH
and I
OL
are tested one output at a time
4
Switching Time Waveforms
TL F 5966 5
5
CD4042BMCD4042BC
Quad
Clocked
D
Latch
Physical Dimensions
inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD4042BMJ or CD4042BCJ
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number CD4042BMN or CD4042BCN
NS Package Number N16E
LIFE SUPPORT POLICY
NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION As used herein
1 Life support devices or systems are devices or
2 A critical component is any component of a life
systems which (a) are intended for surgical implant
support device or system whose failure to perform can
into the body or (b) support or sustain life and whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system or to affect its safety or
with instructions for use provided in the labeling can
effectiveness
be reasonably expected to result in a significant injury
to the user
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National Semiconductor
National Semiconductor
National Semiconductor
Corporation
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National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications