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Электронный компонент: DM74ALS390N

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TL F 9169
DM54ALS390DM74ALS390
Dual
4-Bit
Decade
Counters
PRELIMINARY
April 1987
DM54ALS390 DM74ALS390 Dual 4-Bit Decade Counters
General Description
Each of these monolithic counters contains eight master-
slave flip-flops and additional gating to implement two inde-
pendent four bit counters in a single package
To use their maximum count length the B input is connect-
ed to the QA output The input count pulses are applied to
input A and the outputs are as described in the appropriate
truth table A symmetrical divide-by-ten count can be ob-
tained by connecting the QD output to the A input and ap-
plying the input count to the B input
Features
Y
Switching specifications at 50 pF
Y
Switching specifications guaranteed over full tempera-
ture and V
CC
range
Y
Advanced oxide-isolated
ion-implanted Schottky TTL
process
Y
Individual clocks for A and B flip-flops provide dual di-
vide-by-2 and divide-by-5 counters
Y
Direct clear for each 4-bit counter
Connection Diagram
TL F 9169 1
Order Number DM54ALS390J DM74ALS390M or
DM74ALS390N
See NS Package Number J16A M16A or N16A
Function Tables
BCD Count Sequence
(See Note 2)
Count
Output
QD
QC
QB
QA
0
L
L
L
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
L
H
L
H
6
L
H
H
L
7
L
H
H
H
8
H
L
L
L
9
H
L
L
H
Bi-Quinary (5-2)
(See Note 3)
Count
Output
QA
QD
QC
QB
0
L
L
L
L
1
L
L
L
H
2
L
L
H
L
3
L
L
H
H
4
L
H
L
L
5
H
L
L
L
6
H
L
L
H
7
H
L
H
L
8
H
L
H
H
9
H
H
L
L
Note 2
Output QA is connected to input B for BCD count
Note 3
Output QD is connected to input A for bi-quinary count
H
e
High Logic Level L
e
Low Logic Level
This document contains information on a product under development NSC reserves the right to change or discontinue this product without notice
C1995 National Semiconductor Corporation
RRD-B30M105 Printed in U S A
Absolute Maximum Rating
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
DM54ALS
b
55 C to
a
125 C
DM74ALS
0 C to
a
70 C
Storage Temperature Range
b
65 C to
a
150 C
Note
The ``Absolute Maximum Ratings'' are those values
beyond which the safety of the device cannot be guaran-
teed The device should not be operated at these limits The
parametric values defined in the ``Electrical Characteristics''
table are not guaranteed at the absolute maximum ratings
The ``Recommended Operating Conditions'' table will define
the conditions for actual device operation
Recommended Operating Conditions
Symbol
Parameter
DM54ALS390
DM74ALS390
Units
Min
Nom
Max
Min
Nom
Max
V
CC
Supply Voltage
4 5
5
5 5
4 5
5
5 5
V
V
IH
High Level Input Voltage
2
2
V
V
IL
Low Level Input Voltage
0 7
0 8
V
I
OH
High Level Output Current
b
0 4
b
0 4
mA
I
OL
Low Level Output Current
4
8
mA
f
COUNT
Count Frequency
A Input
0
0
MHz
B Input
0
0
t
W
Pulse Width
A Input High
A Input Low
ns
B Input High
Clear High
t
SU
Clear Inactive-State Setup Time
ns
T
A
Free Air Operating Temperature
b
55
125
0
70
C
Electrical Characteristics
over recommended free air temperature range
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
V
IC
Input Clamp Voltage
V
CC
e
Min I
I
e b
18 mA
b
1 5
V
V
OH
High Level Output Voltage
V
CC
e
4 5V to 5 5V I
OH
e b
0 4 mA
V
CC
b
2
V
V
OL
Low Level Output
V
CC
e
Min
54 74ALS
0 25
0 4
Voltage
I
OL
e
4 mA
V
74ALS
0 35
0 5
I
OL
e
8 mA
I
I
Input Current at Max V
I
e
7V
V
CC
e
Max V
I
e
7V
Clear
100
Input Voltage
Input A
200
m
A
Input B
300
I
IH
High Level Input
V
CC
e
Max V
I
e
2 7V
Clear
20
Current
Input A
40
m
A
Input B
60
I
IL
Low Level Input
V
CC
e
Max V
I
e
0 4V
Clear
b
100
Current
Input A
b
200
m
A
Input B
b
300
I
O
Output Drive Current
V
CC
e
Max V
O
e
2 25V
b
30
b
112
mA
(B Bus Ports Only)
I
CC
Supply Current
V
CC
e
Max (Note 1)
mA
2
Switching Characteristics
over recommended operating free air temperature range
Symbol
Parameter
Conditions
From (Input)
DM54ALS390
DM74ALS390
Units
To (Output)
Min
Max
Min
Max
f
max
Maximum Clock Frequency
V
CC
e
4 5 to 5 5V
A to QA
MHz
R
L
e
500 X
B to QB
t
PLH
Propagation Delay Time
C
L
e
50 pF
A to QA
ns
Low to High Level Output
T
A
e
Min to Max
t
PHL
Propagation Delay Time
(Note 2)
A to QA
ns
High to Low Level Output
t
PLH
Propagation Delay Time
A to QC
ns
Low to High Level Output
t
PHL
Propagation Delay Time
A to QC
ns
High to Low Level Output
t
PLH
Propagation Delay Time
B to QB
ns
Low to High Level Output
t
PHL
Propagation Delay Time
B to QB
ns
High to Low Level Output
t
PLH
Propagation Delay Time
B to QC
ns
Low to High Level Output
t
PHL
Propagation Delay Time
B to QC
ns
High to Low Level Output
t
PLH
Propagation Delay Time
B to QD
ns
Low to High Level Output
t
PHL
Propagation Delay Time
B to QD
ns
High to Low Level Output
t
PHL
Propagation Delay Time
Clear to
ns
High to Low Level Output
Any Q
Note 1
I
CC
is measured with all outputs open both clear inputs grounded following momentary connection to 4 5V and all other inputs grounded
Note 2
See Section 5 for test waveforms and output load
3
Logic Diagram
TL F 9169 2
4
Physical Dimensions
inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number DM54ALS390J
NS Package Number J16A
S O Package (M)
Order Number DM74ALS390M
NS Package Number M16A
5