1997 National Semiconductor Corporation
DP83959 8-P
or
t Lite Ethernet Repeater Interface Contr
oller
www.national.com
DP83959
8-Port Lite Ethernet Repeater Interface Controller
General Description
The DP83959 8-Port Lite Ethernet Repeater Interface
Controller (LERIC8) is a single chip solution for unman-
aged 10BASE-T Ethernet repeater (hub) products. By inte-
grating electronics needed to support eight 10BASE-T
ports, a full level/drive compatible AUI port for a backbone
connection, and an internal power on reset circuit, a
LERIC8 based design requires only the addition of a few
passive components: crystal, transformers, connectors
and a power source.
The LERIC8 provides on-chip LED drivers that connect di-
rectly to LEDs via series resistors. In addition to the Link
OK, Port Partition, Global Activity and Global Collision LED
outputs, the LERIC8 provides an on chip network traffic
level monitor circuit with 8 LED outputs to drive a bargraph
type display.
The LERIC8 also provides an LED and Inter Repeater Bus
interface that is compatible with the DP83955/6 LERICTM
products.
Features
s
Fully IEEE 802.3 Ethernet Repeater compliant
s
Eight IEEE 802.3 10BASE-T compliant ports with
on-chip transmit filters
s
One IEEE 802.3 compatible AUI port
s
Direct drive status LED outputs
s
Network traffic level monitor with direct drive LED
outputs
s
Automatic internal power-on reset function. External
TTL compatible reset pin provided for device testing if
required
s
Inter-LERICTM bus for cascading up to 3 devices on a
single board
s
Register/LED status interface compatible with
DP83955/6 LERICTM products
s
Single 20 MHz crystal or external 20 MHz oscillator
module operation
s
Single 5V supply
s
160 pin PQFP package
1.0
System Diagram
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
LERIC
TM
and Inter-LERIC
TM
are trademarks of National Semiconductor Corporation.
Transformer
10BASE-T
Port 1
AUI
Port
DP83959 LERIC8
Status LEDs (Optional)
Inter Repeater Bus
(Optional)
Per 10BASE-T Port Link & Partition
AUI Port Partition
Global Activity, Global Collision
Network Traffic Bargraph
Alert (High Traffic or Long Partition)
20MHz
Oscillator
or Crystal
10BASE-T
Port 2
10BASE-T
Port 3
10BASE-T
Port 4
10BASE-T
Port 5
10BASE-T
Port 6
10BASE-T
Port 7
10BASE-T
Port 8
8-Port Lite Ethernet Repeater Interface Controller
Transformer
Transformer
Transformer
Transformer
Transformer
Transformer
Transformer
Transformer
October 1997
3
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Table of Contents
1.0
System Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2.0
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3.0
Pin Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 4
4.0
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4.1
AUI Port (Port 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4.2
Twisted Pair Ports (Ports 1 - 8) . . . . . . . . . . . . . . . . 5
4.3
Status LED Interface . . . . . . . . . . . . . . . . . . . . . . . . 7
4.4
Inter-LERIC Bus Interface . . . . . . . . . . . . . . . . . . . . 9
4.5
Clock Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.6
Register/Configuration Interface . . . . . . . . . . . . . . 11
4.7
Miscellaneous Pins . . . . . . . . . . . . . . . . . . . . . . . . 12
4.8
Power and Ground Pins . . . . . . . . . . . . . . . . . . . . . 13
5.0
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1
Repeater Main State Machine & Timers . . . . . . . . 14
5.2
Port State Machines . . . . . . . . . . . . . . . . . . . . . . . . 14
5.3
Receive Multiplexer . . . . . . . . . . . . . . . . . . . . . . . . 14
5.4
Manchester Decoder 1 . . . . . . . . . . . . . . . . . . . . . . . 4
5.5
Elasticity Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.6
Transmit DE-Multiplexer & Manchester Encoder . . 15
5.7
Inter-LERIC Bus Interface . . . . . . . . . . . . . . . . . . . 15
5.8
Clock Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.9
Reset Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.10
Traffic Monitor LED Interface . . . . . . . . . . . . . . . . . 16
5.11
Port Status LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.12
Configuration/Register Interface . . . . . . . . . . . . . . 18
5.13
Min/Max Mode LED Interface . . . . . . . . . . . . . . . . 19
5.14
AUI Port 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.15
10BASE-T Ports 1-8 . . . . . . . . . . . . . . . . . . . . . . . 19
6.0
LERIC8 Registers 22
6.1
Register Address Map . . . . . . . . . . . . . . . . . . . . . 22
6.2
LERIC8 Status Register . . . . . . . . . . . . . . . . . . . . 23
6.3
Port 0 (AUI) Status/Configuration Register . . . . . . 24
6.4
Ports 1-8 (10BASE-T) Status/Configuration
Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.0
System Considerations . . . . . . . . . . . . . . . . . . . . . . . . 26
7.1
Cascading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.2
IEEE Conformance . . . . . . . . . . . . . . . . . . . . . . . . 26
8.0
DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
9.0
Switching Characteristics . . . . . . . . . . . . . . . . . . . . . . 28
9.1
Port Arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
9.2
Receive - AUI Port . . . . . . . . . . . . . . . . . . . . . . . . 28
9.3
Receive - 10BASE-T Ports . . . . . . . . . . . . . . . . . . 29
9.4
Transmit - AUI Port . . . . . . . . . . . . . . . . . . . . . . . . 29
9.5
Transmit - 10BASE-T Ports . . . . . . . . . . . . . . . . . 30
9.6
Collision - AUI Port . . . . . . . . . . . . . . . . . . . . . . . . 30
9.7
Collision - 10BASE-T Ports . . . . . . . . . . . . . . . . . 31
9.8
Collision - All Ports - Inter-LERIC Bus . . . . . . . . . 32
9.9
Collision - All Ports - One Port Left . . . . . . . . . . . . 32
9.10
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
9.11
LED Strobe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
9.12
Register Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9.13
Register Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
9.14
Inter-LERIC Bus (Packet Output) . . . . . . . . . . . . . 36
9.15
Inter-LERIC Bus (Packet Input) . . . . . . . . . . . . . . 36
10.0
AC Timing Test Conditions . . . . . . . . . . . . . . . . . . . . . 37
10.1
General Test Conditions . . . . . . . . . . . . . . . . . . . . 37
10.2
Capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
11.0
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5
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4.0
Pin Descriptions
Key to Pin Type:
4.1
AUI PORT (PORT 0)
4.2
TWISTED PAIR PORTS (PORTS 1 - 8)
O = TTL Compatible Output
I/O = TTL Compatible Input/Output
O (ECL) = ECL Compatible Output
I/O (O.D.) = TTL Compatible Input/Open Drain Output
I = TTL Compatible Input
TPO = Twisted Pair Interface Compatable Output
I (ECL) = ECL Compatible Input
TPI = Twisted Pair Interface Compatable Input
OZ = TTL Compatible TRI-STATE
Output
AI = Analog Input
O (O.D.) = Open Drain Output
Signal Name
Type
Pin #
Description
TX0+
O
(ECL)
68
AUI Transmit +: The AUI transmit path includes National Semiconductor's
patented low power dissipation differential drivers that do not need external load
resistors. This output should be connected directly to the AUI isolation transformer.
TX0-
O
(ECL)
69
AUI Transmit -: The AUI transmit path includes National Semiconductor's patented
low power dissipation differential drivers that do not need external load resistors.
This output should be connected directly to the AUI isolation transformer.
RX0+
I
(ECL)
72
AUI Receive +: This input should be terminated with 39
to GND via a series DC
blocking capacitor (shared with RX0-). Refer to Figure 8.
RX0-
I
(ECL)
73
AUI Receive -: This input should be terminated with 39
to GND via a series DC
blocking capacitor (shared with RX0+). Refer to Figure 8.
CD0+
I
(ECL)
70
AUI Collision Detect +: This input should be terminated with 39
to GND via a
series DC blocking capacitor (shared with CD0-). Refer to Figure 8.
CD0-
I
(ECL)
71
AUI Collision Detect -: This input should be terminated with 39
to GND via a
series DC blocking capacitor (shared with CD0+). Refer to Figure 8.
Signal Name
Type
Pin #
Description
REQ
AI
108
Equalization Resistor: A resistor connected between this pin and GND or V
CC
adjusts the equalization step amplitude on the 10BASE-T Manchester encoded
transmit data for all eight 10BASE-T ports. No resistor is required for operation with
cable length of up to 100 meters.
RTX
AI
107
Extended Cable Resistor: A resistor connected between this pin and GND or V
CC
adjusts the amplitude of the differential transmit outputs for all eight 10BASE-T
ports. No resistor is required for operation with cable length of up to 100 meters.
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